Add resets and remove qdsp6ss clcok controller for audioreach based platforms.
Changes since v3:
-- Remove duplicate clock resets patch.
-- Add binding headers for q6 clocks.
-- Create new patch for merging lpasscc q6 clocks into lpass_aon.
-- Create new patches for handling conflicts of ADSP and bypass solution.
Changes since v2:
-- Revert removing qdsp6ss clock control.
-- Add Conditional check for qdsp6ss clock registration.
Changes since v1:
-- Update commit message.
-- Remove qdsp6ss clock control.
Srinivasa Rao Mandadapu (6):
dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode
property
dt-bindings: clock: lpassaudiocc-sc7280: Add binding headers for
lpasscc
clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration
clk: qcom: lpasscorecc-sc7280: Skip lpasscorecc registration
clk: qcom: lpassaudiocc-sc7280: Merge lpasscc into lpass_aon
clk: qcom: lpassaudiocc-sc7280: Skip lpass_aon_cc_pll config
.../bindings/clock/qcom,sc7280-lpasscc.yaml | 7 +++++++
drivers/clk/qcom/lpassaudiocc-sc7280.c | 23 ++++------------------
drivers/clk/qcom/lpasscc-sc7280.c | 12 ++++++-----
drivers/clk/qcom/lpasscorecc-sc7280.c | 3 +++
.../dt-bindings/clock/qcom,lpassaudiocc-sc7280.h | 2 ++
5 files changed, 23 insertions(+), 24 deletions(-)
--
2.7.4
The qdsp6ss memory region is being shared by ADSP remoteproc device and
lpasscc clock device, hence causing memory conflict.
As the qdsp6ss clocks are being enabled in remoteproc driver, skip qdsp6ss
clock registration if "qcom,adsp-pil-mode" is enabled.
Fixes: 4ab43d171181 ("clk: qcom: Add lpass clock controller driver for SC7280")
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Tested-by: Mohammad Rafi Shaik <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
---
drivers/clk/qcom/lpasscc-sc7280.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/qcom/lpasscc-sc7280.c b/drivers/clk/qcom/lpasscc-sc7280.c
index 5c1e17b..85dd5b9 100644
--- a/drivers/clk/qcom/lpasscc-sc7280.c
+++ b/drivers/clk/qcom/lpasscc-sc7280.c
@@ -118,12 +118,14 @@ static int lpass_cc_sc7280_probe(struct platform_device *pdev)
goto destroy_pm_clk;
}
- lpass_regmap_config.name = "qdsp6ss";
- desc = &lpass_qdsp6ss_sc7280_desc;
+ if (!of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode")) {
+ lpass_regmap_config.name = "qdsp6ss";
+ desc = &lpass_qdsp6ss_sc7280_desc;
- ret = qcom_cc_probe_by_index(pdev, 0, desc);
- if (ret)
- goto destroy_pm_clk;
+ ret = qcom_cc_probe_by_index(pdev, 0, desc);
+ if (ret)
+ goto destroy_pm_clk;
+ }
lpass_regmap_config.name = "top_cc";
desc = &lpass_cc_top_sc7280_desc;
--
2.7.4
Skip lpass_aon_cc_pll configuration for ADSP based platforms
based on qcom,adsp-pil-mode property.
This is to avoid ADSP out of reset fail.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Tested-by: Mohammad Rafi Shaik <[email protected]>
---
drivers/clk/qcom/lpassaudiocc-sc7280.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c
index 18f7a50..e135c09 100644
--- a/drivers/clk/qcom/lpassaudiocc-sc7280.c
+++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c
@@ -826,7 +826,8 @@ static int lpass_aon_cc_sc7280_probe(struct platform_device *pdev)
goto exit;
}
- clk_lucid_pll_configure(&lpass_aon_cc_pll, regmap, &lpass_aon_cc_pll_config);
+ if (!of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode"))
+ clk_lucid_pll_configure(&lpass_aon_cc_pll, regmap, &lpass_aon_cc_pll_config);
ret = qcom_cc_really_probe(pdev, &lpass_aon_cc_sc7280_desc, regmap);
if (ret) {
--
2.7.4