2023-06-01 10:09:00

by Ism Hong

[permalink] [raw]
Subject: [PATCH] riscv: perf: Fix callchain parse error with kernel tracepoint events

For RISC-V, when tracing with tracepoint events, the IP and status are
set to 0, preventing the perf code parsing the callchain and resolving
the symbols correctly.

./ply 'tracepoint:kmem/kmem_cache_alloc { @[stack]=count(); }'
@:
{ <STACKID4294967282> }: 1

The fix is to implement perf_arch_fetch_caller_regs for riscv, which
fills several necessary registers used for callchain unwinding,
including epc, sp, s0 and status. It's similar to commit b3eac0265bf6
("arm: perf: Fix callchain parse error with kernel tracepoint events")
and commit 5b09a094f2fb ("arm64: perf: Fix callchain parse error with
kernel tracepoint events").

With this patch, callchain can be parsed correctly as:

./ply 'tracepoint:kmem/kmem_cache_alloc { @[stack]=count(); }'
@:
{
__traceiter_kmem_cache_alloc+68
__traceiter_kmem_cache_alloc+68
kmem_cache_alloc+354
__sigqueue_alloc+94
__send_signal_locked+646
send_signal_locked+154
do_send_sig_info+84
__kill_pgrp_info+130
kill_pgrp+60
isig+150
n_tty_receive_signal_char+36
n_tty_receive_buf_standard+2214
n_tty_receive_buf_common+280
n_tty_receive_buf2+26
tty_ldisc_receive_buf+34
tty_port_default_receive_buf+62
flush_to_ldisc+158
process_one_work+458
worker_thread+138
kthread+178
riscv_cpufeature_patch_func+832
}: 1

This patch works both on RV32/RV64.

Signed-off-by: Ism Hong <[email protected]>
---
arch/riscv/include/asm/perf_event.h | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/arch/riscv/include/asm/perf_event.h b/arch/riscv/include/asm/perf_event.h
index d42c901f9a97..665bbc9b2f84 100644
--- a/arch/riscv/include/asm/perf_event.h
+++ b/arch/riscv/include/asm/perf_event.h
@@ -10,4 +10,11 @@

#include <linux/perf_event.h>
#define perf_arch_bpf_user_pt_regs(regs) (struct user_regs_struct *)regs
+
+#define perf_arch_fetch_caller_regs(regs, __ip) { \
+ (regs)->epc = (__ip); \
+ (regs)->s0 = (unsigned long) __builtin_frame_address(0); \
+ (regs)->sp = current_stack_pointer; \
+ (regs)->status = SR_PP; \
+}
#endif /* _ASM_RISCV_PERF_EVENT_H */
--
2.37.2



Subject: Re: [PATCH] riscv: perf: Fix callchain parse error with kernel tracepoint events

Hello:

This patch was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <[email protected]>:

On Thu, 1 Jun 2023 17:53:55 +0800 you wrote:
> For RISC-V, when tracing with tracepoint events, the IP and status are
> set to 0, preventing the perf code parsing the callchain and resolving
> the symbols correctly.
>
> ./ply 'tracepoint:kmem/kmem_cache_alloc { @[stack]=count(); }'
> @:
> { <STACKID4294967282> }: 1
>
> [...]

Here is the summary with links:
- riscv: perf: Fix callchain parse error with kernel tracepoint events
https://git.kernel.org/riscv/c/9a7e8ec0d4cc

You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



2023-06-02 15:38:56

by Palmer Dabbelt

[permalink] [raw]
Subject: Re: [PATCH] riscv: perf: Fix callchain parse error with kernel tracepoint events


On Thu, 01 Jun 2023 17:53:55 +0800, Ism Hong wrote:
> For RISC-V, when tracing with tracepoint events, the IP and status are
> set to 0, preventing the perf code parsing the callchain and resolving
> the symbols correctly.
>
> ./ply 'tracepoint:kmem/kmem_cache_alloc { @[stack]=count(); }'
> @:
> { <STACKID4294967282> }: 1
>
> [...]

Applied, thanks!

[1/1] riscv: perf: Fix callchain parse error with kernel tracepoint events
https://git.kernel.org/palmer/c/9a7e8ec0d4cc

Best regards,
--
Palmer Dabbelt <[email protected]>