2023-09-22 03:14:44

by Ravi Gunasekaran

Subject: [PATCH 1/3] arm64: dts: ti: Add USB Type C swap defines for J721S2 SoC

From: Sinthu Raja <[email protected]>

Lanes 0 and 2 of the J721S2 SerDes WIZ are reserved for USB type-C
lane swap. Update the macro definition for it.

Signed-off-by: Sinthu Raja <[email protected]>
Signed-off-by: Ravi Gunasekaran <[email protected]>
---
arch/arm64/boot/dts/ti/k3-serdes.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-serdes.h b/arch/arm64/boot/dts/ti/k3-serdes.h
index 29167f85c1f6..21b4886c47ba 100644
--- a/arch/arm64/boot/dts/ti/k3-serdes.h
+++ b/arch/arm64/boot/dts/ti/k3-serdes.h
@@ -111,7 +111,7 @@

#define J721S2_SERDES0_LANE2_EDP_LANE2 0x0
#define J721S2_SERDES0_LANE2_PCIE1_LANE2 0x1
-#define J721S2_SERDES0_LANE2_IP3_UNUSED 0x2
+#define J721S2_SERDES0_LANE2_USB_SWAP 0x2
#define J721S2_SERDES0_LANE2_IP4_UNUSED 0x3

#define J721S2_SERDES0_LANE3_EDP_LANE3 0x0
--
2.17.1

2023-09-22 22:43:51

by Rob Herring (Arm)

Subject: Re: [PATCH 1/3] arm64: dts: ti: Add USB Type C swap defines for J721S2 SoC

On Thu, 21 Sep 2023 15:30:37 +0530, Ravi Gunasekaran wrote:
> From: Sinthu Raja <[email protected]>
>
> Lanes 0 and 2 of the J721S2 SerDes WIZ are reserved for USB type-C
> lane swap. Update the macro definition for it.
>
> Signed-off-by: Sinthu Raja <[email protected]>
> Signed-off-by: Ravi Gunasekaran <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-serdes.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>

Acked-by: Rob Herring <[email protected]>