RK3128's reference design uses sdmmc_pwren pincontrol as GPIO - see [0].
Let's change it in the SoC DT as well.
[0] https://github.com/rockchip-linux/kernel/commit/8c62deaf6025
Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <[email protected]>
---
This should have been part of my XPI-3128 board submission - it uses this
pin as GPIO and adapts the reference design in this regard.
Originally I had this as an override in the board DT, but later noticed
this relatively new commit in vendor's kernel. I simply forgot to add
that commit.
arch/arm/boot/dts/rockchip/rk3128.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index 4e8b38604ecd..b16786e81c08 100644
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -859,7 +859,7 @@ sdmmc_wp: sdmmc-wp {
};
sdmmc_pwren: sdmmc-pwren {
- rockchip,pins = <1 RK_PB6 1 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_default>;
};
sdmmc_bus4: sdmmc-bus4 {
--
2.43.0
On Mon, 27 Nov 2023 19:46:44 +0100, Alex Bee wrote:
> RK3128's reference design uses sdmmc_pwren pincontrol as GPIO - see [0].
>
> Let's change it in the SoC DT as well.
>
> [0] https://github.com/rockchip-linux/kernel/commit/8c62deaf6025
>
>
> [...]
Applied, thanks!
[1/1] ARM: dts: rockchip: Fix sdmmc_pwren's pinmux setting for RK3128
commit: 0c349b5001f8bdcead844484c15a0c4dfb341157
Best regards,
--
Heiko Stuebner <[email protected]>