2023-11-30 06:25:40

by claudiu beznea

[permalink] [raw]
Subject: [PATCH v2 0/6] net: ravb: Fixes for the ravb driver

From: Claudiu Beznea <[email protected]>

Hi,

This series adds some fixes for ravb driver. Patches in this series
were initilly part of series at [1].

Changes in v2:
- in description of patch 1/6 documented the addition of
out_free_netdev goto label
- collected tags
- s/out_runtime_disable/out_rpm_disable in patch 2/6
- fixed typos in description of patch 6/6

Changes since [1]:
- addressed review comments
- added patch 6/6

[1] https://lore.kernel.org/all/[email protected]/

Claudiu Beznea (6):
net: ravb: Check return value of reset_control_deassert()
net: ravb: Use pm_runtime_resume_and_get()
net: ravb: Make write access to CXR35 first before accessing other
EMAC registers
net: ravb: Start TX queues after HW initialization succeeded
net: ravb: Stop DMA in case of failures on ravb_open()
net: ravb: Keep reverse order of operations in ravb_remove()

drivers/net/ethernet/renesas/ravb_main.c | 58 ++++++++++++++----------
1 file changed, 35 insertions(+), 23 deletions(-)

--
2.39.2


2023-11-30 06:38:50

by claudiu beznea

[permalink] [raw]
Subject: [PATCH v2 3/6] net: ravb: Make write access to CXR35 first before accessing other EMAC registers

From: Claudiu Beznea <[email protected]>

Hardware manual of RZ/G3S (and RZ/G2L) specifies the following on the
description of CXR35 register (chapter "PHY interface select register
(CXR35)"): "After release reset, make write-access to this register before
making write-access to other registers (except MDIOMOD). Even if not need
to change the value of this register, make write-access to this register
at least one time. Because RGMII/MII MODE is recognized by accessing this
register".

The setup procedure for EMAC module (chapter "Setup procedure" of RZ/G3S,
RZ/G2L manuals) specifies the E-MAC.CXR35 register is the first EMAC
register that is to be configured.

Note [A] from chapter "PHY interface select register (CXR35)" specifies
the following:
[A] The case which CXR35 SEL_XMII is used for the selection of RGMII/MII
in APB Clock 100 MHz.
(1) To use RGMII interface, Set ‘H’03E8_0000’ to this register.
(2) To use MII interface, Set ‘H’03E8_0002’ to this register.

Take into account these indication.

Fixes: 1089877ada8d ("ravb: Add RZ/G2L MII interface support")
Reviewed-by: Sergey Shtylyov <[email protected]>
Signed-off-by: Claudiu Beznea <[email protected]>
---

Changes in v2:
- none

Changes since [1]:
- collected Rb tag

[1] https://lore.kernel.org/all/[email protected]/


drivers/net/ethernet/renesas/ravb_main.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
index 0af2ace286be..62a986b5de41 100644
--- a/drivers/net/ethernet/renesas/ravb_main.c
+++ b/drivers/net/ethernet/renesas/ravb_main.c
@@ -515,6 +515,15 @@ static void ravb_emac_init_gbeth(struct net_device *ndev)
{
struct ravb_private *priv = netdev_priv(ndev);

+ if (priv->phy_interface == PHY_INTERFACE_MODE_MII) {
+ ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_MII, CXR35);
+ ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, 0);
+ } else {
+ ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_RGMII, CXR35);
+ ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1,
+ CXR31_SEL_LINK0);
+ }
+
/* Receive frame limit set register */
ravb_write(ndev, GBETH_RX_BUFF_MAX + ETH_FCS_LEN, RFLR);

@@ -537,14 +546,6 @@ static void ravb_emac_init_gbeth(struct net_device *ndev)

/* E-MAC interrupt enable register */
ravb_write(ndev, ECSIPR_ICDIP, ECSIPR);
-
- if (priv->phy_interface == PHY_INTERFACE_MODE_MII) {
- ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, 0);
- ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_MII, CXR35);
- } else {
- ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1,
- CXR31_SEL_LINK0);
- }
}

static void ravb_emac_init_rcar(struct net_device *ndev)
--
2.39.2

2023-11-30 10:21:37

by patchwork-bot+netdevbpf

[permalink] [raw]
Subject: Re: [PATCH v2 0/6] net: ravb: Fixes for the ravb driver

Hello:

This series was applied to netdev/net.git (main)
by Paolo Abeni <[email protected]>:

On Tue, 28 Nov 2023 10:04:33 +0200 you wrote:
> From: Claudiu Beznea <[email protected]>
>
> Hi,
>
> This series adds some fixes for ravb driver. Patches in this series
> were initilly part of series at [1].
>
> [...]

Here is the summary with links:
- [v2,1/6] net: ravb: Check return value of reset_control_deassert()
https://git.kernel.org/netdev/net/c/d8eb6ea4b302
- [v2,2/6] net: ravb: Use pm_runtime_resume_and_get()
https://git.kernel.org/netdev/net/c/88b74831faae
- [v2,3/6] net: ravb: Make write access to CXR35 first before accessing other EMAC registers
https://git.kernel.org/netdev/net/c/d78c0ced60d5
- [v2,4/6] net: ravb: Start TX queues after HW initialization succeeded
https://git.kernel.org/netdev/net/c/6f32c0866020
- [v2,5/6] net: ravb: Stop DMA in case of failures on ravb_open()
https://git.kernel.org/netdev/net/c/eac16a733427
- [v2,6/6] net: ravb: Keep reverse order of operations in ravb_remove()
https://git.kernel.org/netdev/net/c/edf9bc396e05

You are awesome, thank you!
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