8180 has quite a big of bugs, this series fixes some of them.
clk_ignore_unused & d_ignore_unused are no longer necessary (at least
as far as I could test, through remote console access..)
p1 for Georgi, rest for qcom
The keen-eyed among you (hi Krzysztof) will notice that there are no
bindings updates, mostly because half of 8180x is undocumented.. I
intend to help fix that up in a separate series, hopefully soon :)
Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (6):
interconnect: qcom: sc8180x: Mark CO0 BCM keepalive
arm64: dts: qcom: sc8180x: Add UFS GDSC
arm64: dts: qcom: sc8180x: Add missing MDP clocks
arm64: dts: qcom: sc8180x: Add interconnects to UFS
arm64: dts: qcom: sc8180x: Describe the GIC redistributor
arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting
arch/arm64/boot/dts/qcom/sc8180x-primus.dts | 6 ++++++
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 19 +++++++++++++++++--
drivers/interconnect/qcom/sc8180x.c | 1 +
3 files changed, 24 insertions(+), 2 deletions(-)
---
base-commit: 11651f8cb2e88372d4ed523d909514dc9a613ea3
change-id: 20231214-topic-sc8180_fixes-7847a108d352
Best regards,
--
Konrad Dybcio <[email protected]>
The CO0 BCM needs to be up at all times, otherwise some hardware (like
the UFS controller) loses its connection to the rest of the SoC,
resulting in a hang of the platform, accompanied by a spectacular
logspam.
Mark it as keepalive to prevent such cases.
Fixes: 9c8c6bac1ae8 ("interconnect: qcom: Add SC8180x providers")
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/interconnect/qcom/sc8180x.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/interconnect/qcom/sc8180x.c b/drivers/interconnect/qcom/sc8180x.c
index 20331e119beb..03d626776ba1 100644
--- a/drivers/interconnect/qcom/sc8180x.c
+++ b/drivers/interconnect/qcom/sc8180x.c
@@ -1372,6 +1372,7 @@ static struct qcom_icc_bcm bcm_mm0 = {
static struct qcom_icc_bcm bcm_co0 = {
.name = "CO0",
+ .keepalive = true,
.num_nodes = 1,
.nodes = { &slv_qns_cdsp_mem_noc }
};
--
2.40.1
The ROT clock is required for the MDP block to function (looks like some
others depend on it), and whike the LUT clock's purpose is not clear,
it's likely better to turn on all of MDP's dependencies rather than not
doing so.
Add these clocks under the MDP node. This also makes Primus work without
clk_ignore_unused (as far as the dmesg-visible errors go, anyway).
Fixes: 494dec9b6f54 ("arm64: dts: qcom: sc8180x: Add display and gpu nodes")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 09b4e66367bf..c970dfb11fe5 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -2702,11 +2702,15 @@ mdss_mdp: mdp@ae01000 {
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
<&gcc GCC_DISP_HF_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
+ <&dispcc DISP_CC_MDSS_ROT_CLK>,
+ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>;
clock-names = "iface",
"bus",
"core",
- "vsync";
+ "vsync",
+ "rot",
+ "lut";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
--
2.40.1
To make sure the UFS controller and some relevant clocks have power
flowing to them, hook up the forgotten-about GDSC.
Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index b857959a896b..09b4e66367bf 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -2110,6 +2110,8 @@ ufs_mem_hc: ufshc@1d84000 {
<0 0>,
<0 0>;
+ power-domains = <&gcc UFS_PHY_GDSC>;
+
status = "disabled";
};
--
2.40.1
To ensure the required paths don't collapse, add interconnect properties
to the UFS controller.
Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index c970dfb11fe5..98fc3ec881a3 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/qcom,gcc-sc8180x.h>
#include <dt-bindings/clock/qcom,gpucc-sm8150.h>
#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sc8180x.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -2112,6 +2113,12 @@ ufs_mem_hc: ufshc@1d84000 {
power-domains = <&gcc UFS_PHY_GDSC>;
+ interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
+ <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ALWAYS
+ &config_noc SLAVE_UFS_MEM_0_CFG QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "ufs-ddr", "cpu-ufs";
+
status = "disabled";
};
--
2.40.1
The UFS driver expects to be able to set load (and by extension, mode)
on the supplied regulators. Add the necessary properties to make that
possible.
Fixes: 2ce38cc1e8fe ("arm64: dts: qcom: sc8180x: Introduce Primus")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8180x-primus.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
index adddf360c7fc..bfee60c93ccc 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
+++ b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
@@ -386,12 +386,18 @@ vreg_l7e_1p8: ldo7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
};
vreg_l10e_2p9: ldo10 {
regulator-min-microvolt = <2904000>;
regulator-max-microvolt = <2904000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
};
vreg_l12e: ldo12 {
--
2.40.1
The redistributor properties were absent in the initial submission,
add them.
Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 98fc3ec881a3..a2287ce14fc5 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -3425,6 +3425,8 @@ intc: interrupt-controller@17a00000 {
reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */
<0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #redistributor-regions = <1>;
+ redistributor-stride = <0 0x20000>;
};
apss_shared: mailbox@17c00000 {
--
2.40.1
On Thu, 14 Dec 2023 19:13:37 +0100, Konrad Dybcio wrote:
> 8180 has quite a big of bugs, this series fixes some of them.
> clk_ignore_unused & d_ignore_unused are no longer necessary (at least
> as far as I could test, through remote console access..)
>
> p1 for Georgi, rest for qcom
>
> The keen-eyed among you (hi Krzysztof) will notice that there are no
> bindings updates, mostly because half of 8180x is undocumented.. I
> intend to help fix that up in a separate series, hopefully soon :)
>
> [...]
Applied, thanks!
[2/6] arm64: dts: qcom: sc8180x: Add UFS GDSC
commit: 2564209891a436f71c6c8a245d3b56cf4382d65d
[3/6] arm64: dts: qcom: sc8180x: Add missing MDP clocks
commit: 4978dfde89b1f454c88bc5519dc996cc5b58d72e
[4/6] arm64: dts: qcom: sc8180x: Add interconnects to UFS
commit: 384ea2aa2066d27c20257550ba91418401b91199
[5/6] arm64: dts: qcom: sc8180x: Describe the GIC redistributor
commit: c879ee11791adf7e29d2fb615bf176504ed51465
[6/6] arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting
commit: b7b9a6aa7aea2bcba2d35d65e4ce2913115485a3
Best regards,
--
Bjorn Andersson <[email protected]>