Convert the generic fpga bridge DT binding to json-schema.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Xu Yilun <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
---
Changes in v3:
- Improve regex to cover also nodes out of bus
Keeping Krzysztof's tag which I got in v1. Feel free to reject if you
see any issue there.
---
.../devicetree/bindings/fpga/fpga-bridge.txt | 13 --------
.../devicetree/bindings/fpga/fpga-bridge.yaml | 30 +++++++++++++++++++
.../bindings/fpga/xlnx,pr-decoupler.yaml | 5 +++-
3 files changed, 34 insertions(+), 14 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/fpga/fpga-bridge.txt
create mode 100644 Documentation/devicetree/bindings/fpga/fpga-bridge.yaml
diff --git a/Documentation/devicetree/bindings/fpga/fpga-bridge.txt b/Documentation/devicetree/bindings/fpga/fpga-bridge.txt
deleted file mode 100644
index 72e06917288a..000000000000
--- a/Documentation/devicetree/bindings/fpga/fpga-bridge.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-FPGA Bridge Device Tree Binding
-
-Optional properties:
-- bridge-enable : 0 if driver should disable bridge at startup
- 1 if driver should enable bridge at startup
- Default is to leave bridge in current state.
-
-Example:
- fpga_bridge3: fpga-bridge@ffc25080 {
- compatible = "altr,socfpga-fpga2sdram-bridge";
- reg = <0xffc25080 0x4>;
- bridge-enable = <0>;
- };
diff --git a/Documentation/devicetree/bindings/fpga/fpga-bridge.yaml b/Documentation/devicetree/bindings/fpga/fpga-bridge.yaml
new file mode 100644
index 000000000000..1ccb2aa18726
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/fpga-bridge.yaml
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/fpga-bridge.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: FPGA Bridge
+
+maintainers:
+ - Michal Simek <[email protected]>
+
+properties:
+ $nodename:
+ pattern: "^fpga-bridge(@.*|-([0-9]|[1-9][0-9]+))?$"
+
+ bridge-enable:
+ description: |
+ 0 if driver should disable bridge at startup
+ 1 if driver should enable bridge at startup
+ Default is to leave bridge in current state.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 0, 1 ]
+
+additionalProperties: true
+
+examples:
+ - |
+ fpga-bridge {
+ bridge-enable = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml b/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml
index a7d4b8e59e19..5bf731f9d99a 100644
--- a/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml
+++ b/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml
@@ -9,6 +9,9 @@ title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore
maintainers:
- Nava kishore Manne <[email protected]>
+allOf:
+ - $ref: fpga-bridge.yaml#
+
description: |
The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more
decouplers/fpga bridges. The controller can decouple/disable the bridges
@@ -51,7 +54,7 @@ required:
- clocks
- clock-names
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
--
2.36.1
Convert Altera's bridges to yaml with using fpga-bridge.yaml.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Xu Yilun <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
---
(no changes since v2)
Changes in v2:
- Add Yilun tag
- Add missing license to altera-hps2fpga-bridge.yaml
- Drop reg as required property from altera-fpga2sdram-bridge.yaml
- Align file names with compatible string
- Drop | from description entry because no need to preserve formatting
- Keep only one example in altr,socfpga-hps2fpga-bridge.yaml
.../fpga/altera-fpga2sdram-bridge.txt | 13 -----
.../bindings/fpga/altera-freeze-bridge.txt | 20 --------
.../bindings/fpga/altera-hps2fpga-bridge.txt | 36 --------------
.../fpga/altr,freeze-bridge-controller.yaml | 41 ++++++++++++++++
.../fpga/altr,socfpga-fpga2sdram-bridge.yaml | 33 +++++++++++++
.../fpga/altr,socfpga-hps2fpga-bridge.yaml | 49 +++++++++++++++++++
6 files changed, 123 insertions(+), 69 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt
delete mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
delete mode 100644 Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
create mode 100644 Documentation/devicetree/bindings/fpga/altr,freeze-bridge-controller.yaml
create mode 100644 Documentation/devicetree/bindings/fpga/altr,socfpga-fpga2sdram-bridge.yaml
create mode 100644 Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml
diff --git a/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt
deleted file mode 100644
index 5dd0ff0f7b4e..000000000000
--- a/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-Altera FPGA To SDRAM Bridge Driver
-
-Required properties:
-- compatible : Should contain "altr,socfpga-fpga2sdram-bridge"
-
-See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
-
-Example:
- fpga_bridge3: fpga-bridge@ffc25080 {
- compatible = "altr,socfpga-fpga2sdram-bridge";
- reg = <0xffc25080 0x4>;
- bridge-enable = <0>;
- };
diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
deleted file mode 100644
index 8b26fbcff3c6..000000000000
--- a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-Altera Freeze Bridge Controller Driver
-
-The Altera Freeze Bridge Controller manages one or more freeze bridges.
-The controller can freeze/disable the bridges which prevents signal
-changes from passing through the bridge. The controller can also
-unfreeze/enable the bridges which allows traffic to pass through the
-bridge normally.
-
-Required properties:
-- compatible : Should contain "altr,freeze-bridge-controller"
-- regs : base address and size for freeze bridge module
-
-See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
-
-Example:
- freeze-controller@100000450 {
- compatible = "altr,freeze-bridge-controller";
- regs = <0x1000 0x10>;
- bridge-enable = <0>;
- };
diff --git a/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
deleted file mode 100644
index 68cce3945b10..000000000000
--- a/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
+++ /dev/null
@@ -1,36 +0,0 @@
-Altera FPGA/HPS Bridge Driver
-
-Required properties:
-- regs : base address and size for AXI bridge module
-- compatible : Should contain one of:
- "altr,socfpga-lwhps2fpga-bridge",
- "altr,socfpga-hps2fpga-bridge", or
- "altr,socfpga-fpga2hps-bridge"
-- resets : Phandle and reset specifier for this bridge's reset
-- clocks : Clocks used by this module.
-
-See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
-
-Example:
- fpga_bridge0: fpga-bridge@ff400000 {
- compatible = "altr,socfpga-lwhps2fpga-bridge";
- reg = <0xff400000 0x100000>;
- resets = <&rst LWHPS2FPGA_RESET>;
- clocks = <&l4_main_clk>;
- bridge-enable = <0>;
- };
-
- fpga_bridge1: fpga-bridge@ff500000 {
- compatible = "altr,socfpga-hps2fpga-bridge";
- reg = <0xff500000 0x10000>;
- resets = <&rst HPS2FPGA_RESET>;
- clocks = <&l4_main_clk>;
- bridge-enable = <1>;
- };
-
- fpga_bridge2: fpga-bridge@ff600000 {
- compatible = "altr,socfpga-fpga2hps-bridge";
- reg = <0xff600000 0x100000>;
- resets = <&rst FPGA2HPS_RESET>;
- clocks = <&l4_main_clk>;
- };
diff --git a/Documentation/devicetree/bindings/fpga/altr,freeze-bridge-controller.yaml b/Documentation/devicetree/bindings/fpga/altr,freeze-bridge-controller.yaml
new file mode 100644
index 000000000000..fccffeebb256
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altr,freeze-bridge-controller.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/altr,freeze-bridge-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera Freeze Bridge Controller
+
+description:
+ The Altera Freeze Bridge Controller manages one or more freeze bridges.
+ The controller can freeze/disable the bridges which prevents signal
+ changes from passing through the bridge. The controller can also
+ unfreeze/enable the bridges which allows traffic to pass through the bridge
+ normally.
+
+maintainers:
+ - Xu Yilun <[email protected]>
+
+allOf:
+ - $ref: fpga-bridge.yaml#
+
+properties:
+ compatible:
+ const: altr,freeze-bridge-controller
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ fpga-bridge@100000450 {
+ compatible = "altr,freeze-bridge-controller";
+ reg = <0x1000 0x10>;
+ bridge-enable = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/fpga/altr,socfpga-fpga2sdram-bridge.yaml b/Documentation/devicetree/bindings/fpga/altr,socfpga-fpga2sdram-bridge.yaml
new file mode 100644
index 000000000000..22b58453c5ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altr,socfpga-fpga2sdram-bridge.yaml
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/altr,socfpga-fpga2sdram-bridge.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera FPGA To SDRAM Bridge
+
+maintainers:
+ - Xu Yilun <[email protected]>
+
+allOf:
+ - $ref: fpga-bridge.yaml#
+
+properties:
+ compatible:
+ const: altr,socfpga-fpga2sdram-bridge
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ fpga-bridge@ffc25080 {
+ compatible = "altr,socfpga-fpga2sdram-bridge";
+ reg = <0xffc25080 0x4>;
+ bridge-enable = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml b/Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml
new file mode 100644
index 000000000000..d19c6660d6c9
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/altr,socfpga-hps2fpga-bridge.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera FPGA/HPS Bridge
+
+maintainers:
+ - Xu Yilun <[email protected]>
+
+allOf:
+ - $ref: fpga-bridge.yaml#
+
+properties:
+ compatible:
+ enum:
+ - altr,socfpga-lwhps2fpga-bridge
+ - altr,socfpga-hps2fpga-bridge
+ - altr,socfpga-fpga2hps-bridge
+
+ reg:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - resets
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/reset/altr,rst-mgr.h>
+
+ fpga-bridge@ff400000 {
+ compatible = "altr,socfpga-lwhps2fpga-bridge";
+ reg = <0xff400000 0x100000>;
+ bridge-enable = <0>;
+ clocks = <&l4_main_clk>;
+ resets = <&rst LWHPS2FPGA_RESET>;
+ };
--
2.36.1
On Tue, 09 Jan 2024 14:32:39 +0100, Michal Simek wrote:
> Convert Altera's bridges to yaml with using fpga-bridge.yaml.
>
> Signed-off-by: Michal Simek <[email protected]>
> Reviewed-by: Xu Yilun <[email protected]>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Add Yilun tag
> - Add missing license to altera-hps2fpga-bridge.yaml
> - Drop reg as required property from altera-fpga2sdram-bridge.yaml
> - Align file names with compatible string
> - Drop | from description entry because no need to preserve formatting
> - Keep only one example in altr,socfpga-hps2fpga-bridge.yaml
>
> .../fpga/altera-fpga2sdram-bridge.txt | 13 -----
> .../bindings/fpga/altera-freeze-bridge.txt | 20 --------
> .../bindings/fpga/altera-hps2fpga-bridge.txt | 36 --------------
> .../fpga/altr,freeze-bridge-controller.yaml | 41 ++++++++++++++++
> .../fpga/altr,socfpga-fpga2sdram-bridge.yaml | 33 +++++++++++++
> .../fpga/altr,socfpga-hps2fpga-bridge.yaml | 49 +++++++++++++++++++
> 6 files changed, 123 insertions(+), 69 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt
> delete mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
> delete mode 100644 Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
> create mode 100644 Documentation/devicetree/bindings/fpga/altr,freeze-bridge-controller.yaml
> create mode 100644 Documentation/devicetree/bindings/fpga/altr,socfpga-fpga2sdram-bridge.yaml
> create mode 100644 Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml
>
Applied, thanks!
On Tue, 09 Jan 2024 14:32:38 +0100, Michal Simek wrote:
> Convert the generic fpga bridge DT binding to json-schema.
>
> Signed-off-by: Michal Simek <[email protected]>
> Reviewed-by: Xu Yilun <[email protected]>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
> ---
>
> Changes in v3:
> - Improve regex to cover also nodes out of bus
>
> Keeping Krzysztof's tag which I got in v1. Feel free to reject if you
> see any issue there.
>
> ---
> .../devicetree/bindings/fpga/fpga-bridge.txt | 13 --------
> .../devicetree/bindings/fpga/fpga-bridge.yaml | 30 +++++++++++++++++++
> .../bindings/fpga/xlnx,pr-decoupler.yaml | 5 +++-
> 3 files changed, 34 insertions(+), 14 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/fpga/fpga-bridge.txt
> create mode 100644 Documentation/devicetree/bindings/fpga/fpga-bridge.yaml
>
Applied, thanks!