2024-04-11 22:54:23

by Judith Mendez

[permalink] [raw]
Subject: [PATCH 0/7] MMC updates for TI K3 platforms

This patch series includes MMC updates for various TI K3 platforms.

It includes support for enabling UHS/SDR104 bus modes or removing
HS400 support due to CQE errors seen during boot.

For AM62ax, add missing UHS support.

For AM65x, fix ITAP delay and OTAP delay and clkbuf-sel properties
in SDHCI nodes.

Bhavya Kapoor (1):
arm64: dts: ti: k3-j721s2-main: Enable support for SDR104 speed mode

Dasnavis Sabiya (2):
arm64: dts: ti: k3-j784s4-main: Enable support for UHS mode
arm64: dts: ti: k3-am69-sk: Remove HS400 mode support for eMMC

Judith Mendez (2):
arm64: dts: ti: k3-am65-main: Update sdhci properties
arm64: dts: ti: k3-am65-main: Remove unused properties in sdhci nodes

Udit Kumar (1):
arm64: dts: ti: k3-j784s4-evm: Remove HS400 mode support for eMMC

Vignesh Raghavendra (1):
arm64: dts: ti: k3-am62a: Enable UHS mode support for SD cards

arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 --
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 21 +++++++++++++++++
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 26 +++++++++-------------
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 1 +
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 --
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 1 +
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 2 --
7 files changed, 34 insertions(+), 21 deletions(-)


base-commit: 534ad093bb80f19c20b251a89f09ce1a0e3d4f2d
--
2.43.2



2024-04-11 22:54:29

by Judith Mendez

[permalink] [raw]
Subject: [PATCH 3/7] arm64: dts: ti: k3-am62a: Enable UHS mode support for SD cards

From: Vignesh Raghavendra <[email protected]>

Hook up required IO voltage regulators and drop no-1-8-v to support UHS
modes on SD cards.

Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
Signed-off-by: Vignesh Raghavendra <[email protected]>
[Judith: Remove no-1-8-v for sdhci2, keep otap-del-sel-legacy=0,
add fixes tag, reword commit]
Signed-off-by: Judith Mendez <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 --
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 21 +++++++++++++++++++++
2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index aa1e057082f08..6652701d3e3b8 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -573,7 +573,6 @@ sdhci1: mmc@fa00000 {
ti,itap-del-sel-sd-hs = <0x0>;
ti,itap-del-sel-sdr12 = <0x0>;
ti,itap-del-sel-sdr25 = <0x0>;
- no-1-8-v;
status = "disabled";
};

@@ -597,7 +596,6 @@ sdhci2: mmc@fa20000 {
ti,itap-del-sel-sd-hs = <0x0>;
ti,itap-del-sel-sdr12 = <0x0>;
ti,itap-del-sel-sdr25 = <0x0>;
- no-1-8-v;
status = "disabled";
};

diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
index f241637a5642a..1af5d01c7b94c 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
@@ -113,6 +113,20 @@ vcc_3v3_sys: regulator-4 {
regulator-boot-on;
};

+ vddshv_sdio: regulator-5 {
+ compatible = "regulator-gpio";
+ regulator-name = "vddshv_sdio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vddshv_sdio_pins_default>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ vin-supply = <&ldo1>;
+ gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x0>,
+ <3300000 0x1>;
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -342,6 +356,12 @@ main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */
>;
};
+
+ vddshv_sdio_pins_default: vddshv-sdio-pins-default {
+ pinctrl-single,pins = <
+ AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */
+ >;
+ };
};

&mcu_pmx0 {
@@ -580,6 +600,7 @@ &sdhci1 {
/* SD/MMC */
status = "okay";
vmmc-supply = <&vdd_mmc1>;
+ vqmmc-supply = <&vddshv_sdio>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
disable-wp;
--
2.43.2


2024-04-11 22:54:37

by Judith Mendez

[permalink] [raw]
Subject: [PATCH 2/7] arm64: dts: ti: k3-am65-main: Remove unused properties in sdhci nodes

On AM65x platform, sdhci0 is for eMMC and sdhci1 is for SD.
Remove the properties that are not applicable for each device.

Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values")
Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1")
Signed-off-by: Judith Mendez <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 9 ---------
1 file changed, 9 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 0803a8b9bfe84..127f581a56bc6 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -439,12 +439,6 @@ sdhci0: mmc@4f80000 {
ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
- ti,otap-del-sel-sd-hs = <0x0>;
- ti,otap-del-sel-sdr12 = <0x0>;
- ti,otap-del-sel-sdr25 = <0x0>;
- ti,otap-del-sel-sdr50 = <0x8>;
- ti,otap-del-sel-sdr104 = <0x7>;
- ti,otap-del-sel-ddr50 = <0x5>;
ti,otap-del-sel-ddr52 = <0x5>;
ti,otap-del-sel-hs200 = <0x5>;
ti,itap-del-sel-ddr52 = <0x0>;
@@ -462,15 +456,12 @@ sdhci1: mmc@4fa0000 {
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>;
- ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-sd-hs = <0x0>;
ti,otap-del-sel-sdr12 = <0xf>;
ti,otap-del-sel-sdr25 = <0xf>;
ti,otap-del-sel-sdr50 = <0x8>;
ti,otap-del-sel-sdr104 = <0x7>;
ti,otap-del-sel-ddr50 = <0x4>;
- ti,otap-del-sel-ddr52 = <0x4>;
- ti,otap-del-sel-hs200 = <0x7>;
ti,itap-del-sel-legacy = <0xa>;
ti,itap-del-sel-sd-hs = <0x1>;
ti,itap-del-sel-sdr12 = <0xa>;
--
2.43.2


2024-04-11 22:54:39

by Judith Mendez

[permalink] [raw]
Subject: [PATCH 4/7] arm64: dts: ti: k3-j721s2-main: Enable support for SDR104 speed mode

From: Bhavya Kapoor <[email protected]>

According to TRM for J721S2, SDR104 speed mode is supported by the SoC
but its capabilities were masked in device tree. Remove sdhci-caps-mask
to enable support for SDR104 speed mode for SD card in J721S2 SoC.

[+] Refer to : section 12.3.6.1.1 MMCSD Features, in J721S2 TRM
- https://www.ti.com/lit/zip/spruj28

Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC")
Signed-off-by: Bhavya Kapoor <[email protected]>
Signed-off-by: Vignesh Raghavendra <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 --
1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 3cb06a7e4117f..9ed6949b40e9d 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -768,8 +768,6 @@ main_sdhci1: mmc@4fb0000 {
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
dma-coherent;
- /* Masking support for SDR104 capability */
- sdhci-caps-mask = <0x00000003 0x00000000>;
status = "disabled";
};

--
2.43.2


2024-04-11 22:54:40

by Judith Mendez

[permalink] [raw]
Subject: [PATCH 1/7] arm64: dts: ti: k3-am65-main: Update sdhci properties

Update otap-del-sel properties as per datasheet [0].

Add missing clkbuf-sel and itap-del-sel values also as per
datasheet [0].

Move clkbuf-sel and ti,trm-icp above the otap-del-sel properties
so the sdhci nodes could be more uniform across platforms.

[0] https://www.ti.com/lit/ds/symlink/am6548.pdf

Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values")
Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1")
Signed-off-by: Judith Mendez <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 670557c89f756..0803a8b9bfe84 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -435,6 +435,8 @@ sdhci0: mmc@4f80000 {
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
+ ti,clkbuf-sel = <0x7>;
+ ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-sd-hs = <0x0>;
@@ -445,8 +447,7 @@ sdhci0: mmc@4f80000 {
ti,otap-del-sel-ddr50 = <0x5>;
ti,otap-del-sel-ddr52 = <0x5>;
ti,otap-del-sel-hs200 = <0x5>;
- ti,otap-del-sel-hs400 = <0x0>;
- ti,trm-icp = <0x8>;
+ ti,itap-del-sel-ddr52 = <0x0>;
dma-coherent;
status = "disabled";
};
@@ -458,18 +459,22 @@ sdhci1: mmc@4fa0000 {
clocks = <&k3_clks 48 0>, <&k3_clks 48 1>;
clock-names = "clk_ahb", "clk_xin";
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ ti,clkbuf-sel = <0x7>;
+ ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-sd-hs = <0x0>;
- ti,otap-del-sel-sdr12 = <0x0>;
- ti,otap-del-sel-sdr25 = <0x0>;
+ ti,otap-del-sel-sdr12 = <0xf>;
+ ti,otap-del-sel-sdr25 = <0xf>;
ti,otap-del-sel-sdr50 = <0x8>;
ti,otap-del-sel-sdr104 = <0x7>;
ti,otap-del-sel-ddr50 = <0x4>;
ti,otap-del-sel-ddr52 = <0x4>;
ti,otap-del-sel-hs200 = <0x7>;
- ti,clkbuf-sel = <0x7>;
- ti,trm-icp = <0x8>;
+ ti,itap-del-sel-legacy = <0xa>;
+ ti,itap-del-sel-sd-hs = <0x1>;
+ ti,itap-del-sel-sdr12 = <0xa>;
+ ti,itap-del-sel-sdr25 = <0x1>;
dma-coherent;
status = "disabled";
};
--
2.43.2


2024-04-12 13:47:07

by Rob Herring

[permalink] [raw]
Subject: Re: [PATCH 0/7] MMC updates for TI K3 platforms


On Thu, 11 Apr 2024 17:52:50 -0500, Judith Mendez wrote:
> This patch series includes MMC updates for various TI K3 platforms.
>
> It includes support for enabling UHS/SDR104 bus modes or removing
> HS400 support due to CQE errors seen during boot.
>
> For AM62ax, add missing UHS support.
>
> For AM65x, fix ITAP delay and OTAP delay and clkbuf-sel properties
> in SDHCI nodes.
>
> Bhavya Kapoor (1):
> arm64: dts: ti: k3-j721s2-main: Enable support for SDR104 speed mode
>
> Dasnavis Sabiya (2):
> arm64: dts: ti: k3-j784s4-main: Enable support for UHS mode
> arm64: dts: ti: k3-am69-sk: Remove HS400 mode support for eMMC
>
> Judith Mendez (2):
> arm64: dts: ti: k3-am65-main: Update sdhci properties
> arm64: dts: ti: k3-am65-main: Remove unused properties in sdhci nodes
>
> Udit Kumar (1):
> arm64: dts: ti: k3-j784s4-evm: Remove HS400 mode support for eMMC
>
> Vignesh Raghavendra (1):
> arm64: dts: ti: k3-am62a: Enable UHS mode support for SD cards
>
> arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 --
> arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 21 +++++++++++++++++
> arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 26 +++++++++-------------
> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 1 +
> arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 --
> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 1 +
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 2 --
> 7 files changed, 34 insertions(+), 21 deletions(-)
>
>
> base-commit: 534ad093bb80f19c20b251a89f09ce1a0e3d4f2d
> --
> 2.43.2
>
>
>


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

pip3 install dtschema --upgrade


New warnings running 'make CHECK_DTBS=y ti/k3-am62a7-sk.dtb ti/k3-am69-sk.dtb ti/k3-j784s4-evm.dtb' for [email protected]:

arch/arm64/boot/dts/ti/k3-am62a7-sk.dtb: pinctrl@f4000: 'vddshv-sdio-pins-default' does not match any of the regexes: '-pins(-[0-9]+)?$|-pin$', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml#