Hi,
This series add some basic DT nodes on Qcom's SDX75 SoC that are required
for different subsystems.
Thanks,
Rohit.
Rohit Agarwal (6):
dt-bindings: mailbox: qcom-ipcc: Document the SDX75 IPCC
dt-bindings: mfd: qcom,tcsr: Add compatible for SDX75
dt-bindings: soc: qcom,aoss-qmp: Document the SDX75 AOSS channel
arm64: dts: qcom: sdx75: Add IPCC node
arm64: dts: qcom: sdx75: Add TCSR register space
arm64: dts: qcom: sdx75: Add AOSS node
.../bindings/mailbox/qcom-ipcc.yaml | 1 +
.../devicetree/bindings/mfd/qcom,tcsr.yaml | 1 +
.../bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
arch/arm64/boot/dts/qcom/sdx75.dtsi | 26 +++++++++++++++++++
4 files changed, 29 insertions(+)
--
2.25.1
Document the Always-On Subsystem side channel on the SDX75 Platform.
Signed-off-by: Rohit Agarwal <[email protected]>
---
Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
index b4478f417edc..7afdb60edb22 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
@@ -31,6 +31,7 @@ properties:
- qcom,sc7280-aoss-qmp
- qcom,sc8180x-aoss-qmp
- qcom,sc8280xp-aoss-qmp
+ - qcom,sdx75-aoss-qmp
- qcom,sdm845-aoss-qmp
- qcom,sm6350-aoss-qmp
- qcom,sm8150-aoss-qmp
--
2.25.1
Document the Inter-Processor Communication Controller on the SDX75 Platform.
Signed-off-by: Rohit Agarwal <[email protected]>
---
Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
index 8f004868aad9..05e4e1d51713 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
@@ -28,6 +28,7 @@ properties:
- qcom,sa8775p-ipcc
- qcom,sc7280-ipcc
- qcom,sc8280xp-ipcc
+ - qcom,sdx75-ipcc
- qcom,sm6350-ipcc
- qcom,sm6375-ipcc
- qcom,sm8250-ipcc
--
2.25.1
Add TCSR register space devicetree node for accessing different
status registers.
Signed-off-by: Rohit Agarwal <[email protected]>
---
arch/arm64/boot/dts/qcom/sdx75.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index aae4b9ef2bb6..f3f30bbcb37d 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -547,6 +547,11 @@ tcsr_mutex: hwlock@1f40000 {
#hwlock-cells = <1>;
};
+ tcsr: syscon@1fc0000 {
+ compatible = "qcom,sdx75-tcsr", "syscon";
+ reg = <0x0 0x01fc0000 0x0 0x30000>;
+ };
+
usb: usb@a6f8800 {
compatible = "qcom,sdx75-dwc3", "qcom,dwc3";
reg = <0x0 0x0a6f8800 0x0 0x400>;
--
2.25.1
Add IPCC devicetree node to Qcom's SDX75 platform.
Signed-off-by: Rohit Agarwal <[email protected]>
---
arch/arm64/boot/dts/qcom/sdx75.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index 7dbdf8ca6de6..aae4b9ef2bb6 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -441,6 +441,15 @@ gcc: clock-controller@80000 {
#power-domain-cells = <1>;
};
+ ipcc: mailbox@408000 {
+ compatible = "qcom,sdx75-ipcc", "qcom,ipcc";
+ reg = <0 0x00408000 0 0x1000>;
+ interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ #mbox-cells = <2>;
+ };
+
qupv3_id_0: geniqup@9c0000 {
compatible = "qcom,geni-se-qup";
reg = <0x0 0x009c0000 0x0 0x2000>;
--
2.25.1
Add AOSS channel devicetree node for Qcom's SDX75 SoC.
Signed-off-by: Rohit Agarwal <[email protected]>
---
arch/arm64/boot/dts/qcom/sdx75.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index f3f30bbcb37d..96e3eec57008 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -11,6 +11,7 @@
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,sdx75.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/mailbox/qcom-ipcc.h>
#include <dt-bindings/power/qcom,rpmhpd.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -641,6 +642,17 @@ pdc: interrupt-controller@b220000 {
interrupt-controller;
};
+ aoss_qmp: power-controller@c310000 {
+ compatible = "qcom,sdx75-aoss-qmp", "qcom,aoss-qmp";
+ reg = <0 0x0c310000 0 0x1000>;
+ interrupt-parent = <&ipcc>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ #clock-cells = <0>;
+ };
+
spmi_bus: spmi@c400000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0 0x0c400000 0x0 0x3000>,
--
2.25.1
On Fri, 26 Apr 2024 11:23:21 +0530, Rohit Agarwal wrote:
> Document the Inter-Processor Communication Controller on the SDX75 Platform.
>
> Signed-off-by: Rohit Agarwal <[email protected]>
> ---
> Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring (Arm) <[email protected]>
On Fri, 26 Apr 2024 11:23:23 +0530, Rohit Agarwal wrote:
> Document the Always-On Subsystem side channel on the SDX75 Platform.
>
> Signed-off-by: Rohit Agarwal <[email protected]>
> ---
> Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring (Arm) <[email protected]>