2005-05-06 19:36:52

by Protasevich, Natalie

[permalink] [raw]
Subject: RE: [patch 1/1] Do not enforce unique IO_APIC_ID for Xeonprocessors in EM64T mode (x86_64)


> > Would the APIC version be a good criteria to make a
> run-time decision
> > with Xeons? I know that everything Intel that can run EM64T
> has front
> > side bus (APIC version >= 20?). And I guess the boot parameter can
> > still be useful?
>
> Isn't there a bit in one of the I/O APIC registers which
> denotes that FSB delivery is used? Hmm, that would be
> "IO_APIC_reg_00.bits.delivery_type",
> actually...

Perhaps, I will try just set it up unconditionally for Intel as Zwane
suggested, somewhere in (early_)identify_cpu() and will resend the
patch.

Thanks,
--Natalie