2023-09-26 14:42:59

by Keerthy

[permalink] [raw]
Subject: [PATCH v5 0/7] arm64: ti: k3-j7: Add the ESM & main domain watchdog nodes

The series add the ESM & main domain watchdog nodes for j721s2,
j784s4 SOCs.

Changes in v5:

* Updated commit log and added comments for MCU watchdog
instances disabling.

Changes in v4:

* Added bootph-pre-ram for all the ESM instances needed for SPL.

Changes in v3:

* Added all the RTI events for MAIN_ESM for j784s4 as 8 instances
are enabled.
* Rebased on top of 6.6-rc1
* Tested for the watchdog reset

RESEND series - corrected [email protected] ID

Changes in v2:

* Added all the instances of watchdog on j784s4/j721s2
* Fixed all 0x0 in dts to 0x00
* Fixed couple of ESM event numbers for j721s2
* Rebased to linux-next branch

Keerthy (7):
arm64: dts: ti: k3-j721s2: Add ESM instances
arm64: dts: ti: k3-j784s4: Add ESM instances
arm64: dts: ti: k3-j7200: Add MCU domain ESM instance
arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances
arm64: dts: ti: k3-j784s4-mcu: Add the mcu domain watchdog instances
arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances
dts: ti: k3-j712s2-mcu: Add the mcu domain watchdog instances

.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 7 +
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 95 +++++++++
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 38 ++++
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 190 ++++++++++++++++++
.../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 38 ++++
5 files changed, 368 insertions(+)

--
2.17.1


2023-09-26 16:10:22

by Keerthy

[permalink] [raw]
Subject: [PATCH v5 5/7] arm64: dts: ti: k3-j784s4-mcu: Add the mcu domain watchdog instances

There are totally 2 instances of watchdog module in MCU domain.
These instances are coupled with the MCU domain R5F instances.
Disabling them as they are not used by Linux.

Signed-off-by: Keerthy <[email protected]>
---
.../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index a7b5c4cb7d3e..809a0b1cf038 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -714,4 +714,28 @@
ti,esm-pins = <63>;
bootph-pre-ram;
};
+
+ /*
+ * The 2 RTI instances are couple with MCU R5Fs so keeping them
+ * disabled as these will be used by their respective firmware
+ */
+ mcu_watchdog0: watchdog@40600000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40600000 0x00 0x100>;
+ clocks = <&k3_clks 367 1>;
+ power-domains = <&k3_pds 367 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 367 0>;
+ assigned-clock-parents = <&k3_clks 367 4>;
+ status = "disabled";
+ };
+
+ mcu_watchdog1: watchdog@40610000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40610000 0x00 0x100>;
+ clocks = <&k3_clks 368 1>;
+ power-domains = <&k3_pds 368 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 368 0>;
+ assigned-clock-parents = <&k3_clks 368 4>;
+ status = "disabled";
+ };
};
--
2.17.1

2023-09-26 17:15:26

by Keerthy

[permalink] [raw]
Subject: [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances

There are totally 9 instances of watchdog module. One each for the
2 A72 cores, one each for the 2 C7x cores, 1 for the GPU, 1 each
for the 4 R5F cores in the main domain. Keeping only the A72 instances
enabled and disabling the rest by default.

Signed-off-by: Keerthy <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 88 ++++++++++++++++++++++
1 file changed, 88 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 8a717b592238..5e3c0ef9b10b 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1702,4 +1702,92 @@
ti,esm-pins = <688>, <689>;
bootph-pre-ram;
};
+
+ watchdog0: watchdog@2200000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2200000 0x00 0x100>;
+ clocks = <&k3_clks 286 1>;
+ power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 286 1>;
+ assigned-clock-parents = <&k3_clks 286 5>;
+ };
+
+ watchdog1: watchdog@2210000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2210000 0x00 0x100>;
+ clocks = <&k3_clks 287 1>;
+ power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 287 1>;
+ assigned-clock-parents = <&k3_clks 287 5>;
+ };
+
+ watchdog16: watchdog@2300000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2300000 0x00 0x100>;
+ clocks = <&k3_clks 288 1>;
+ power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 288 1>;
+ assigned-clock-parents = <&k3_clks 288 5>;
+ status = "disabled";
+ };
+
+ watchdog17: watchdog@2310000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2310000 0x00 0x100>;
+ clocks = <&k3_clks 289 1>;
+ power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 289 1>;
+ assigned-clock-parents = <&k3_clks 289 5>;
+ status = "disabled";
+ };
+
+ watchdog15: watchdog@22f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x22f0000 0x00 0x100>;
+ clocks = <&k3_clks 290 1>;
+ power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 290 1>;
+ assigned-clock-parents = <&k3_clks 290 5>;
+ status = "disabled";
+ };
+
+ watchdog28: watchdog@23c0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23c0000 0x00 0x100>;
+ clocks = <&k3_clks 291 1>;
+ power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 291 1>;
+ assigned-clock-parents = <&k3_clks 291 5>;
+ status = "disabled";
+ };
+
+ watchdog29: watchdog@23d0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23d0000 0x00 0x100>;
+ clocks = <&k3_clks 292 1>;
+ power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 292 1>;
+ assigned-clock-parents = <&k3_clks 292 5>;
+ status = "disabled";
+ };
+
+ watchdog30: watchdog@23e0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23e0000 0x00 0x100>;
+ clocks = <&k3_clks 293 1>;
+ power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 293 1>;
+ assigned-clock-parents = <&k3_clks 293 5>;
+ status = "disabled";
+ };
+
+ watchdog31: watchdog@23f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23f0000 0x00 0x100>;
+ clocks = <&k3_clks 294 1>;
+ power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 294 1>;
+ assigned-clock-parents = <&k3_clks 294 5>;
+ status = "disabled";
+ };
};
--
2.17.1

2023-09-26 17:35:42

by Keerthy

[permalink] [raw]
Subject: [PATCH v5 7/7] dts: ti: k3-j712s2-mcu: Add the mcu domain watchdog instances

There are totally 2 instances of watchdog module in MCU domain.
These instances are coupled with the MCU domain R5F instances.
Disabling them as they are not used by Linux.

Signed-off-by: Keerthy <[email protected]>
---
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 4b29418a6076..83377c47e709 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -669,4 +669,28 @@
ti,esm-pins = <63>;
bootph-pre-ram;
};
+
+ /*
+ * The 2 RTI instances are couple with MCU R5Fs so keeping them
+ * disabled as these will be used by their respective firmware
+ */
+ mcu_watchdog0: watchdog@40600000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40600000 0x00 0x100>;
+ clocks = <&k3_clks 295 1>;
+ power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 295 1>;
+ assigned-clock-parents = <&k3_clks 295 5>;
+ status = "disabled";
+ };
+
+ mcu_watchdog1: watchdog@40610000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40610000 0x00 0x100>;
+ clocks = <&k3_clks 296 1>;
+ power-domains = <&k3_pds 296 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 296 1>;
+ assigned-clock-parents = <&k3_clks 296 5>;
+ status = "disabled";
+ };
};
--
2.17.1

2023-09-26 21:14:13

by Keerthy

[permalink] [raw]
Subject: [PATCH v5 3/7] arm64: dts: ti: k3-j7200: Add MCU domain ESM instance

Patch adds the ESM instance for MCU domian of j7200.

Signed-off-by: Keerthy <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 6ffaf85fa63f..711690c0cba4 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -637,4 +637,11 @@
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
};
--
2.17.1

2023-09-26 21:26:32

by Nishanth Menon

[permalink] [raw]
Subject: Re: [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances

On 18:58-20230926, Keerthy wrote:
> There are totally 9 instances of watchdog module. One each for the
> 2 A72 cores, one each for the 2 C7x cores, 1 for the GPU, 1 each
> for the 4 R5F cores in the main domain. Keeping only the A72 instances
> enabled and disabling the rest by default.

Will be good to explain why in the commit message as well.

>
> Signed-off-by: Keerthy <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 88 ++++++++++++++++++++++
> 1 file changed, 88 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index 8a717b592238..5e3c0ef9b10b 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -1702,4 +1702,92 @@
> ti,esm-pins = <688>, <689>;
> bootph-pre-ram;
> };
> +
> + watchdog0: watchdog@2200000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2200000 0x00 0x100>;
> + clocks = <&k3_clks 286 1>;
> + power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 286 1>;
> + assigned-clock-parents = <&k3_clks 286 5>;
> + };
> +
> + watchdog1: watchdog@2210000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2210000 0x00 0x100>;
> + clocks = <&k3_clks 287 1>;
> + power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 287 1>;
> + assigned-clock-parents = <&k3_clks 287 5>;
> + };
> +
> + watchdog16: watchdog@2300000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2300000 0x00 0x100>;
> + clocks = <&k3_clks 288 1>;
> + power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 288 1>;
> + assigned-clock-parents = <&k3_clks 288 5>;
> + status = "disabled";
> + };
> +
> + watchdog17: watchdog@2310000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2310000 0x00 0x100>;
> + clocks = <&k3_clks 289 1>;
> + power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 289 1>;
> + assigned-clock-parents = <&k3_clks 289 5>;
> + status = "disabled";
> + };
> +
> + watchdog15: watchdog@22f0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x22f0000 0x00 0x100>;
> + clocks = <&k3_clks 290 1>;
> + power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 290 1>;
> + assigned-clock-parents = <&k3_clks 290 5>;
> + status = "disabled";
> + };
> +
> + watchdog28: watchdog@23c0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23c0000 0x00 0x100>;
> + clocks = <&k3_clks 291 1>;
> + power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 291 1>;
> + assigned-clock-parents = <&k3_clks 291 5>;
> + status = "disabled";
> + };
> +
> + watchdog29: watchdog@23d0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23d0000 0x00 0x100>;
> + clocks = <&k3_clks 292 1>;
> + power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 292 1>;
> + assigned-clock-parents = <&k3_clks 292 5>;
> + status = "disabled";
> + };
> +
> + watchdog30: watchdog@23e0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23e0000 0x00 0x100>;
> + clocks = <&k3_clks 293 1>;
> + power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 293 1>;
> + assigned-clock-parents = <&k3_clks 293 5>;
> + status = "disabled";
> + };
> +
> + watchdog31: watchdog@23f0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23f0000 0x00 0x100>;
> + clocks = <&k3_clks 294 1>;
> + power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 294 1>;
> + assigned-clock-parents = <&k3_clks 294 5>;
> + status = "disabled";

Missing documentation here as well.

> + };
> };
> --
> 2.17.1
>

--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D

2023-09-26 22:22:29

by Keerthy

[permalink] [raw]
Subject: [PATCH v5 1/7] arm64: dts: ti: k3-j721s2: Add ESM instances

Patch adds the ESM instances for j721s2. It has 3 instances.
One in the main domain and two in the mcu-wakeup domian.

Signed-off-by: Keerthy <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 7 +++++++
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 14 ++++++++++++++
2 files changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 084f8f5b6699..8a717b592238 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1695,4 +1695,11 @@
dss_ports: ports {
};
};
+
+ main_esm: esm@700000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x700000 0x00 0x1000>;
+ ti,esm-pins = <688>, <689>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 2ddad9318554..4b29418a6076 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -655,4 +655,18 @@
power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@42080000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x42080000 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
};
--
2.17.1

2023-09-27 02:01:43

by Keerthy

[permalink] [raw]
Subject: [PATCH v5 2/7] arm64: dts: ti: k3-j784s4: Add ESM instances

Patch adds the ESM instances for j784s4. It has 3 instances.
One in the main domain and two in the mcu-wakeup domian.

Signed-off-by: Keerthy <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 8 ++++++++
arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 14 ++++++++++++++
2 files changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index efed2d683f63..26dc3776f911 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -1568,4 +1568,12 @@
firmware-name = "j784s4-c71_3-fw";
status = "disabled";
};
+
+ main_esm: esm@700000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x700000 0x00 0x1000>;
+ ti,esm-pins = <688>, <689>, <690>, <691>, <692>, <693>, <694>,
+ <695>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index 4ab4018d3695..a7b5c4cb7d3e 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -700,4 +700,18 @@
status = "disabled";
};
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@42080000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x42080000 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
};
--
2.17.1

2023-09-27 05:51:02

by Keerthy

[permalink] [raw]
Subject: Re: [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances



On 9/26/2023 10:43 PM, Nishanth Menon wrote:
> On 18:58-20230926, Keerthy wrote:
>> There are totally 9 instances of watchdog module. One each for the
>> 2 A72 cores, one each for the 2 C7x cores, 1 for the GPU, 1 each
>> for the 4 R5F cores in the main domain. Keeping only the A72 instances
>> enabled and disabling the rest by default.
>
> Will be good to explain why in the commit message as well.

I will add that.

>
>>
>> Signed-off-by: Keerthy <[email protected]>
>> ---
>> arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 88 ++++++++++++++++++++++
>> 1 file changed, 88 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> index 8a717b592238..5e3c0ef9b10b 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> @@ -1702,4 +1702,92 @@
>> ti,esm-pins = <688>, <689>;
>> bootph-pre-ram;
>> };
>> +
>> + watchdog0: watchdog@2200000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2200000 0x00 0x100>;
>> + clocks = <&k3_clks 286 1>;
>> + power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 286 1>;
>> + assigned-clock-parents = <&k3_clks 286 5>;
>> + };
>> +
>> + watchdog1: watchdog@2210000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2210000 0x00 0x100>;
>> + clocks = <&k3_clks 287 1>;
>> + power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 287 1>;
>> + assigned-clock-parents = <&k3_clks 287 5>;
>> + };
>> +
>> + watchdog16: watchdog@2300000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2300000 0x00 0x100>;
>> + clocks = <&k3_clks 288 1>;
>> + power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 288 1>;
>> + assigned-clock-parents = <&k3_clks 288 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog17: watchdog@2310000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2310000 0x00 0x100>;
>> + clocks = <&k3_clks 289 1>;
>> + power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 289 1>;
>> + assigned-clock-parents = <&k3_clks 289 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog15: watchdog@22f0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x22f0000 0x00 0x100>;
>> + clocks = <&k3_clks 290 1>;
>> + power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 290 1>;
>> + assigned-clock-parents = <&k3_clks 290 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog28: watchdog@23c0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23c0000 0x00 0x100>;
>> + clocks = <&k3_clks 291 1>;
>> + power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 291 1>;
>> + assigned-clock-parents = <&k3_clks 291 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog29: watchdog@23d0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23d0000 0x00 0x100>;
>> + clocks = <&k3_clks 292 1>;
>> + power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 292 1>;
>> + assigned-clock-parents = <&k3_clks 292 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog30: watchdog@23e0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23e0000 0x00 0x100>;
>> + clocks = <&k3_clks 293 1>;
>> + power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 293 1>;
>> + assigned-clock-parents = <&k3_clks 293 5>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog31: watchdog@23f0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23f0000 0x00 0x100>;
>> + clocks = <&k3_clks 294 1>;
>> + power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 294 1>;
>> + assigned-clock-parents = <&k3_clks 294 5>;
>> + status = "disabled";
>
> Missing documentation here as well.

Sure. I will add that.

>
>> + };
>> };
>> --
>> 2.17.1
>>
>