This patchset associates the uart1_pins group with serial0 and adds
two nodes, serial1 and serial2, that define the interface to the
MT7621's UART2 and UART3 respectively.
Changes in v3:
Added spacing between properties as requested by Arınç ÜNAL.
Changes in v2:
Reordered properties as requested by Sergio Paracuellos.
Justin Swartz (3):
mips: dts: ralink: mt7621: associate uart1_pins with serial0
mips: dts: ralink: mt7621: reorder serial0 properties
mips: dts: ralink: mt7621: add serial1 and serial2 nodes
arch/mips/boot/dts/ralink/mt7621.dtsi | 44 +++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
--
Add missing pinctrl-name and pinctrl-0 properties to declare
that the uart1_pins group is associated with serial0.
Acked-by: Sergio Paracuellos <[email protected]>
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 35a10258f..dca415fdd 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -123,6 +123,9 @@ serial0: serial@c00 {
reg-shift = <2>;
reg-io-width = <4>;
no-loopback-test;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
};
spi0: spi@b00 {
--
Reorder serial0 properties according to the guidelines laid
out in Documentation/devicetree/bindings/dts-coding-style.rst
Acked-by: Sergio Paracuellos <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index dca415fdd..68467fca3 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -115,13 +115,14 @@ serial0: serial@c00 {
compatible = "ns16550a";
reg = <0xc00 0x100>;
+ reg-io-width = <4>;
+ reg-shift = <2>;
+
clocks = <&sysc MT7621_CLK_UART1>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- reg-io-width = <4>;
no-loopback-test;
pinctrl-names = "default";
--
Add serial1 and serial2 nodes to define the existence of
the MT7621's second and third UARTs.
Acked-by: Sergio Paracuellos <[email protected]>
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 40 +++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 68467fca3..02e1f2491 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -129,6 +129,46 @@ serial0: serial@c00 {
pinctrl-0 = <&uart1_pins>;
};
+ serial1: serial@d00 {
+ compatible = "ns16550a";
+ reg = <0xd00 0x100>;
+
+ reg-io-width = <4>;
+ reg-shift = <2>;
+
+ clocks = <&sysc MT7621_CLK_UART2>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
+
+ no-loopback-test;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+
+ status = "disabled";
+ };
+
+ serial2: serial@e00 {
+ compatible = "ns16550a";
+ reg = <0xe00 0x100>;
+
+ reg-io-width = <4>;
+ reg-shift = <2>;
+
+ clocks = <&sysc MT7621_CLK_UART3>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>;
+
+ no-loopback-test;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+
+ status = "disabled";
+ };
+
spi0: spi@b00 {
status = "disabled";
--
On 08/03/2024 18:56, Justin Swartz wrote:
> Add missing pinctrl-name and pinctrl-0 properties to declare
> that the uart1_pins group is associated with serial0.
>
> Acked-by: Sergio Paracuellos <[email protected]>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Please add the trailers from previous patch versions from now on.
Arınç
On 08/03/2024 18:56, Justin Swartz wrote:
> Reorder serial0 properties according to the guidelines laid
> out in Documentation/devicetree/bindings/dts-coding-style.rst
>
> Acked-by: Sergio Paracuellos <[email protected]>
> Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 08/03/2024 18:56, Justin Swartz wrote:
> Add serial1 and serial2 nodes to define the existence of
> the MT7621's second and third UARTs.
>
> Acked-by: Sergio Paracuellos <[email protected]>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 2024-03-08 18:14, Arınç ÜNAL wrote:
> On 08/03/2024 18:56, Justin Swartz wrote:
>> Add missing pinctrl-name and pinctrl-0 properties to declare
>> that the uart1_pins group is associated with serial0.
>>
>> Acked-by: Sergio Paracuellos <[email protected]>
>> Signed-off-by: Justin Swartz <[email protected]>
>
> Reviewed-by: Arınç ÜNAL <[email protected]>
>
> Please add the trailers from previous patch versions from now on.
What do you mean by trailers?
Regards
Justin
On 08/03/2024 18:01, Justin Swartz wrote:
> On 2024-03-08 18:14, Arınç ÜNAL wrote:
>> On 08/03/2024 18:56, Justin Swartz wrote:
>>> Add missing pinctrl-name and pinctrl-0 properties to declare
>>> that the uart1_pins group is associated with serial0.
>>>
>>> Acked-by: Sergio Paracuellos <[email protected]>
>>> Signed-off-by: Justin Swartz <[email protected]>
>>
>> Reviewed-by: Arınç ÜNAL <[email protected]>
>>
>> Please add the trailers from previous patch versions from now on.
>
> What do you mean by trailers?
https://elixir.bootlin.com/linux/v6.5-rc3/source/Documentation/process/submitting-patches.rst#L577
Best regards,
Krzysztof
On 2024-03-08 19:13, Krzysztof Kozlowski wrote:
> On 08/03/2024 18:01, Justin Swartz wrote:
>> On 2024-03-08 18:14, Arınç ÜNAL wrote:
>>> On 08/03/2024 18:56, Justin Swartz wrote:
>>>> Add missing pinctrl-name and pinctrl-0 properties to declare
>>>> that the uart1_pins group is associated with serial0.
>>>>
>>>> Acked-by: Sergio Paracuellos <[email protected]>
>>>> Signed-off-by: Justin Swartz <[email protected]>
>>>
>>> Reviewed-by: Arınç ÜNAL <[email protected]>
>>>
>>> Please add the trailers from previous patch versions from now on.
>>
>> What do you mean by trailers?
>
> https://elixir.bootlin.com/linux/v6.5-rc3/source/Documentation/process/submitting-patches.rst#L577
Thanks, Krzysztof.
I thought I had done this with this patchset on all three patches,
but if I've accidentally left anyone out - sorry about that.
Regards
Justin
On Fri, Mar 08, 2024 at 05:56:13PM +0200, Justin Swartz wrote:
> This patchset associates the uart1_pins group with serial0 and adds
> two nodes, serial1 and serial2, that define the interface to the
> MT7621's UART2 and UART3 respectively.
>
> Changes in v3:
> Added spacing between properties as requested by Arınç ÜNAL.
>
> Changes in v2:
> Reordered properties as requested by Sergio Paracuellos.
>
> Justin Swartz (3):
> mips: dts: ralink: mt7621: associate uart1_pins with serial0
> mips: dts: ralink: mt7621: reorder serial0 properties
> mips: dts: ralink: mt7621: add serial1 and serial2 nodes
>
> arch/mips/boot/dts/ralink/mt7621.dtsi | 44 +++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
series applied to mips-next.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]