Support IPCC mailbox on STM32MP157c-ed1 and STM32MP157a-dk1 boards.
Fabien Dessenne (3):
ARM: dts: stm32: add IPCC mailbox support on STM32MP157c
ARM: dts: stm32: enable IPCC mailbox support on STM32MP157c-ed1
ARM: dts: stm32: enable IPCC mailbox support on STM32MP157a-dk1
arch/arm/boot/dts/stm32mp157a-dk1.dts | 4 ++++
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4 ++++
arch/arm/boot/dts/stm32mp157c.dtsi | 15 +++++++++++++++
3 files changed, 23 insertions(+)
--
2.7.4
Enable STM32 IPCC mailbox driver for STM32MP157c-ed1 board.
Signed-off-by: Fabien Dessenne <[email protected]>
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index 10dc7c0..626ceb3 100644
--- a/arch/arm/boot/dts/stm32mp157c-ed1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ed1.dts
@@ -83,6 +83,10 @@
status = "okay";
};
+&ipcc {
+ status = "okay";
+};
+
&iwdg2 {
timeout-sec = <32>;
status = "okay";
--
2.7.4
Enable STM32 IPCC mailbox driver for STM32MP157a-dk1 board.
Signed-off-by: Fabien Dessenne <[email protected]>
---
arch/arm/boot/dts/stm32mp157a-dk1.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts b/arch/arm/boot/dts/stm32mp157a-dk1.dts
index b229ab1..85a761a 100644
--- a/arch/arm/boot/dts/stm32mp157a-dk1.dts
+++ b/arch/arm/boot/dts/stm32mp157a-dk1.dts
@@ -65,6 +65,10 @@
};
};
+&ipcc {
+ status = "okay";
+};
+
&iwdg2 {
timeout-sec = <32>;
status = "okay";
--
2.7.4
Add configuration on DT for IPCC mailbox driver.
Signed-off-by: Fabien Dessenne <[email protected]>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index 10bf338..c664b55 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -886,6 +886,21 @@
status = "disabled";
};
+ ipcc: mailbox@4c001000 {
+ compatible = "st,stm32mp1-ipcc";
+ #mbox-cells = <1>;
+ reg = <0x4c001000 0x400>;
+ st,proc-id = <0>;
+ interrupts-extended =
+ <&intc GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 61 1>;
+ interrupt-names = "rx", "tx", "wakeup";
+ clocks = <&rcc IPCC>;
+ wakeup-source;
+ status = "disabled";
+ };
+
rcc: rcc@50000000 {
compatible = "st,stm32mp1-rcc", "syscon";
reg = <0x50000000 0x1000>;
--
2.7.4
Hi Fabien
On 3/1/19 10:18 AM, Fabien Dessenne wrote:
> Support IPCC mailbox on STM32MP157c-ed1 and STM32MP157a-dk1 boards.
>
> Fabien Dessenne (3):
> ARM: dts: stm32: add IPCC mailbox support on STM32MP157c
> ARM: dts: stm32: enable IPCC mailbox support on STM32MP157c-ed1
> ARM: dts: stm32: enable IPCC mailbox support on STM32MP157a-dk1
>
> arch/arm/boot/dts/stm32mp157a-dk1.dts | 4 ++++
> arch/arm/boot/dts/stm32mp157c-ed1.dts | 4 ++++
> arch/arm/boot/dts/stm32mp157c.dtsi | 15 +++++++++++++++
> 3 files changed, 23 insertions(+)
>
Series applied on stm32-next.
Regards
Alex