From: Sean Wang <[email protected]>
Changes since v1:
- Dropped several patches which have been merged.
- Rebased to linux-next-20180410 where those dependent patches including
[1] and [2] all have been got merged.
- Revised according to suggestions and comments on v1, where the major work is
to put board-specific nodes into DTS files and to leave the common nodes
among boards in DTSI files as done in patch 7,9,10,11 and 12.
- Merged Ryder Lee's patch for update audio nodes reflecting the latest
bindings.
- Revised commit message.
The series is to refactor current .dts for allowing more boards can properly
join and reuse almost the same device node definitions.
Before we're doing that, some works about enhancements and fixups are being
made on the dt-binding document and .dts files. In addition, the series has to
depend on the patch [1][2]. Otherwise, certain build failure would have an
occurrence.
[1] arm: dts: mt7623: add PCIe related nodes
http://lists.infradead.org/pipermail/linux-mediatek/2018-February/012053.html
[2] dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
http://lists.infradead.org/pipermail/linux-mediatek/2018-February/011930.html
Ryder Lee (1):
arm: dts: mediatek: modify audio related nodes for both MT2701 and
MT7623
Sean Wang (11):
dt-bindings: cpufreq: mediatek: use - instead of _ in examples
arm: dts: mediatek: converted to using SPDX identifiers
arm: dts: mt7623: fix invalid memory node being generated
arm: dts: mt7623: fix available memory size on bananapi-r2
arm: dts: mt7623: fix all Warnings (unit_address_vs_reg)
arm: dts: mt7623: add BTIF, HSDMA and SPI-NOR device nodes
arm: dts: mt6323: move node mt6323 leds to mt6323.dtsi
arm: dts: mt7623: extend common file reused by all boards with MT7623
SoCs
arm: dts: mt7623: add MT7623A SoC level DTS
arm: dts: mt7623: add MT7623A reference boards
arm: dts: mt7623: add MT7623N reference board with eMMC
.../bindings/cpufreq/cpufreq-mediatek.txt | 6 +-
arch/arm/boot/dts/Makefile | 3 +
arch/arm/boot/dts/mt2701-evb.dts | 9 +-
arch/arm/boot/dts/mt2701.dtsi | 197 ++++----
arch/arm/boot/dts/mt6323.dtsi | 17 +-
arch/arm/boot/dts/mt6580-evbp1.dts | 9 +-
arch/arm/boot/dts/mt6580.dtsi | 9 +-
arch/arm/boot/dts/mt6589-aquaris5.dts | 10 +-
arch/arm/boot/dts/mt6589.dtsi | 12 +-
arch/arm/boot/dts/mt6592-evb.dts | 9 +-
arch/arm/boot/dts/mt6592.dtsi | 9 +-
arch/arm/boot/dts/mt7623.dtsi | 537 ++++++++++++++++-----
arch/arm/boot/dts/mt7623a-rfb-emmc.dts | 291 +++++++++++
arch/arm/boot/dts/mt7623a-rfb-nand.dts | 337 +++++++++++++
arch/arm/boot/dts/mt7623a.dtsi | 44 ++
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 279 ++---------
arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 326 +++++++++++++
arch/arm/boot/dts/mt7623n-rfb-nand.dts | 40 +-
arch/arm/boot/dts/mt7623n-rfb.dtsi | 12 +-
arch/arm/boot/dts/mt8127-moose.dts | 9 +-
arch/arm/boot/dts/mt8127.dtsi | 9 +-
arch/arm/boot/dts/mt8135-evbp1.dts | 9 +-
arch/arm/boot/dts/mt8135.dtsi | 9 +-
23 files changed, 1576 insertions(+), 616 deletions(-)
create mode 100644 arch/arm/boot/dts/mt7623a-rfb-emmc.dts
create mode 100644 arch/arm/boot/dts/mt7623a-rfb-nand.dts
create mode 100644 arch/arm/boot/dts/mt7623a.dtsi
create mode 100644 arch/arm/boot/dts/mt7623n-rfb-emmc.dts
--
2.7.4
From: Sean Wang <[email protected]>
Since those LEDs are parts of PMIC MT6323, it is reasonable to merge
those LEDs node definition back into mt6323.dtsi. This way can improve
the reusability of those nodes among different boards with the same PMIC.
And LED is very much board specific and thus the mt6323.dtsi only includes
the parent node here and leave these child nodes in the board specific
dts file.
Signed-off-by: Sean Wang <[email protected]>
Cc: Lee Jones <[email protected]>
Cc: Rob Herring <[email protected]>
---
arch/arm/boot/dts/mt6323.dtsi | 9 ++++-
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 50 ++++++++++++---------------
2 files changed, 30 insertions(+), 29 deletions(-)
diff --git a/arch/arm/boot/dts/mt6323.dtsi b/arch/arm/boot/dts/mt6323.dtsi
index 958980c..ba39740 100644
--- a/arch/arm/boot/dts/mt6323.dtsi
+++ b/arch/arm/boot/dts/mt6323.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (c) 2017 MediaTek Inc.
+ * Copyright (c) 2017-2018 MediaTek Inc.
* Author: John Crispin <[email protected]>
* Sean Wang <[email protected]>
*
@@ -14,6 +14,13 @@
interrupt-controller;
#interrupt-cells = <2>;
+ mt6323_leds: leds {
+ compatible = "mediatek,mt6323-led";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
mt6323regulator: mt6323regulator{
compatible = "mediatek,mt6323-regulator";
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
index 1fd6f55..395912e 100644
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -237,6 +237,28 @@
vqmmc-supply = <®_3p3v>;
};
+&mt6323_leds {
+ status = "okay";
+
+ led@0 {
+ reg = <0>;
+ label = "bpi-r2:isink:green";
+ default-state = "off";
+ };
+
+ led@1 {
+ reg = <1>;
+ label = "bpi-r2:isink:red";
+ default-state = "off";
+ };
+
+ led@2 {
+ reg = <2>;
+ label = "bpi-r2:isink:blue";
+ default-state = "off";
+ };
+};
+
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_default>;
@@ -482,34 +504,6 @@
status = "okay";
};
-&pwrap {
- mt6323 {
- mt6323led: led {
- compatible = "mediatek,mt6323-led";
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@0 {
- reg = <0>;
- label = "bpi-r2:isink:green";
- default-state = "off";
- };
-
- led@1 {
- reg = <1>;
- label = "bpi-r2:isink:red";
- default-state = "off";
- };
-
- led@2 {
- reg = <2>;
- label = "bpi-r2:isink:blue";
- default-state = "off";
- };
- };
- };
-};
-
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins_a>;
--
2.7.4
From: Sean Wang <[email protected]>
Move all possible setups for pio into SoC level DTSI file mt7623.dtsi in
order to introduce more boards such as official MT7623A reference boards
without copy-n-pasting almost the same content of nodes in pio into every
new file.
So, it should be better to reuse those nodes by consolidating them into
the common file mt7623.dtsi from the current existent DTS and allow new
DTS files to refer to them.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 246 ++++++++++++++++++++++++++
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 217 -----------------------
arch/arm/boot/dts/mt7623n-rfb-nand.dts | 31 ----
3 files changed, 246 insertions(+), 248 deletions(-)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index eef81d2..01893858 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -935,3 +935,249 @@
status = "disabled";
};
};
+
+&pio {
+ cir_pins_a:cir-default {
+ pins-cir {
+ pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
+ bias-disable;
+ };
+ };
+
+ i2c0_pins_a: i2c0-default {
+ pins-i2c0 {
+ pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
+ <MT7623_PIN_76_SCL0_FUNC_SCL0>;
+ bias-disable;
+ };
+ };
+
+ i2c1_pins_a: i2c1-default {
+ pin-i2c1 {
+ pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
+ <MT7623_PIN_58_SCL1_FUNC_SCL1>;
+ bias-disable;
+ };
+ };
+
+ i2s0_pins_a: i2s0-default {
+ pin-i2s0 {
+ pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
+ <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
+ <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
+ <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
+ <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
+ drive-strength = <MTK_DRIVE_12mA>;
+ bias-pull-down;
+ };
+ };
+
+ i2s1_pins_a: i2s1-default {
+ pin-i2s1 {
+ pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
+ <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
+ <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
+ <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
+ <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
+ drive-strength = <MTK_DRIVE_12mA>;
+ bias-pull-down;
+ };
+ };
+
+ key_pins_a: keys-alt {
+ pins-keys {
+ pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
+ <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
+ input-enable;
+ };
+ };
+
+ led_pins_a: leds-alt {
+ pins-leds {
+ pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
+ <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
+ <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>;
+ };
+ };
+
+ mmc0_pins_default: mmc0default {
+ pins-cmd-dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
+ input-enable;
+ bias-pull-up;
+ };
+
+ pins-clk {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
+ bias-pull-down;
+ };
+
+ pins-rst {
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
+ bias-pull-up;
+ };
+ };
+
+ mmc0_pins_uhs: mmc0 {
+ pins-cmd-dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_2mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins-clk {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
+ drive-strength = <MTK_DRIVE_2mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins-rst {
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
+ bias-pull-up;
+ };
+ };
+
+ mmc1_pins_default: mmc1default {
+ pins-cmd-dat {
+ pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
+ <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
+ <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
+ <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
+ <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins-clk {
+ pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
+ bias-pull-down;
+ drive-strength = <MTK_DRIVE_4mA>;
+ };
+
+ pins-wp {
+ pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
+ input-enable;
+ bias-pull-up;
+ };
+
+ pins-insert {
+ pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
+ bias-pull-up;
+ };
+ };
+
+ mmc1_pins_uhs: mmc1 {
+ pins-cmd-dat {
+ pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
+ <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
+ <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
+ <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
+ <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins-clk {
+ pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+ };
+
+ nand_pins_default: nanddefault {
+ pins-ale {
+ pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins-dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
+ <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up;
+ };
+
+ pins-we {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+ };
+ };
+
+ pcie_default: pcie_pin_default {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
+ <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
+ bias-disable;
+ };
+ };
+
+ pwm_pins_a: pwm-default {
+ pins-pwm {
+ pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
+ <MT7623_PIN_204_PWM1_FUNC_PWM1>,
+ <MT7623_PIN_205_PWM2_FUNC_PWM2>,
+ <MT7623_PIN_206_PWM3_FUNC_PWM3>,
+ <MT7623_PIN_207_PWM4_FUNC_PWM4>;
+ };
+ };
+
+ spi0_pins_a: spi0-default {
+ pins-spi {
+ pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
+ <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
+ <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
+ <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
+ bias-disable;
+ };
+ };
+
+ uart0_pins_a: uart0-default {
+ pins-dat {
+ pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
+ <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
+ };
+ };
+
+ uart1_pins_a: uart1-default {
+ pins-dat {
+ pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
+ <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
+ };
+ };
+
+ uart2_pins_a: uart2-default {
+ pins-dat {
+ pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
+ <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
index 395912e..531d905 100644
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -281,223 +281,6 @@
status = "okay";
};
-&pio {
- cir_pins_a:cir-default {
- pins-cir {
- pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
- bias-disable;
- };
- };
-
- i2c0_pins_a: i2c0-default {
- pins-i2c0 {
- pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
- <MT7623_PIN_76_SCL0_FUNC_SCL0>;
- bias-disable;
- };
- };
-
- i2c1_pins_a: i2c1-default {
- pin-i2c1 {
- pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
- <MT7623_PIN_58_SCL1_FUNC_SCL1>;
- bias-disable;
- };
- };
-
- i2s0_pins_a: i2s0-default {
- pin-i2s0 {
- pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
- <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
- <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
- <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
- <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
- drive-strength = <MTK_DRIVE_12mA>;
- bias-pull-down;
- };
- };
-
- i2s1_pins_a: i2s1-default {
- pin-i2s1 {
- pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
- <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
- <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
- <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
- <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
- drive-strength = <MTK_DRIVE_12mA>;
- bias-pull-down;
- };
- };
-
- key_pins_a: keys-alt {
- pins-keys {
- pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
- <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
- input-enable;
- };
- };
-
- led_pins_a: leds-alt {
- pins-leds {
- pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
- <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
- <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>;
- };
- };
-
- mmc0_pins_default: mmc0default {
- pins-cmd-dat {
- pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
- <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
- <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
- <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
- <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
- <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
- <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
- <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
- <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
- input-enable;
- bias-pull-up;
- };
-
- pins-clk {
- pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
- bias-pull-down;
- };
-
- pins-rst {
- pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
- bias-pull-up;
- };
- };
-
- mmc0_pins_uhs: mmc0 {
- pins-cmd-dat {
- pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
- <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
- <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
- <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
- <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
- <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
- <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
- <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
- <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
- input-enable;
- drive-strength = <MTK_DRIVE_2mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
- };
-
- pins-clk {
- pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
- drive-strength = <MTK_DRIVE_2mA>;
- bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
- };
-
- pins-rst {
- pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
- bias-pull-up;
- };
- };
-
- mmc1_pins_default: mmc1default {
- pins-cmd-dat {
- pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
- <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
- <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
- <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
- <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
- input-enable;
- drive-strength = <MTK_DRIVE_4mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
- };
-
- pins-clk {
- pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
- bias-pull-down;
- drive-strength = <MTK_DRIVE_4mA>;
- };
-
- pins-wp {
- pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
- input-enable;
- bias-pull-up;
- };
-
- pins-insert {
- pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
- bias-pull-up;
- };
- };
-
- mmc1_pins_uhs: mmc1 {
- pins-cmd-dat {
- pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
- <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
- <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
- <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
- <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
- input-enable;
- drive-strength = <MTK_DRIVE_4mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
- };
-
- pins-clk {
- pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
- drive-strength = <MTK_DRIVE_4mA>;
- bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
- };
- };
-
- pcie_default: pcie_pin_default {
- pins_cmd_dat {
- pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
- <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
- bias-disable;
- };
- };
-
- pwm_pins_a: pwm-default {
- pins-pwm {
- pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
- <MT7623_PIN_204_PWM1_FUNC_PWM1>,
- <MT7623_PIN_205_PWM2_FUNC_PWM2>,
- <MT7623_PIN_206_PWM3_FUNC_PWM3>,
- <MT7623_PIN_207_PWM4_FUNC_PWM4>;
- };
- };
-
- spi0_pins_a: spi0-default {
- pins-spi {
- pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
- <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
- <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
- <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
- bias-disable;
- };
- };
-
- uart0_pins_a: uart0-default {
- pins-dat {
- pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
- <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
- };
- };
-
- uart1_pins_a: uart1-default {
- pins-dat {
- pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
- <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
- };
- };
-
- uart2_pins_a: uart2-default {
- pins-dat {
- pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
- <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
- };
- };
-};
-
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins_a>;
diff --git a/arch/arm/boot/dts/mt7623n-rfb-nand.dts b/arch/arm/boot/dts/mt7623n-rfb-nand.dts
index 6b0d401..96ff3c9 100644
--- a/arch/arm/boot/dts/mt7623n-rfb-nand.dts
+++ b/arch/arm/boot/dts/mt7623n-rfb-nand.dts
@@ -71,34 +71,3 @@
};
};
};
-
-&pio {
- nand_pins_default: nanddefault {
- pins-ale {
- pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
- };
-
- pins-dat {
- pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
- <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
- <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
- <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
- <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
- <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
- <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
- <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
- <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
- input-enable;
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-up;
- };
-
- pins-we {
- pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
- };
- };
-};
--
2.7.4
From: Sean Wang <[email protected]>
Add MT7623N reference board with eMMC. On the board, there is additional
external PHY ICPlus IP1001 transceiver available by port 5 on the MDIO
bus connectted with GMAC2.
Signed-off-by: Sean Wang <[email protected]>
Suggested-by: Ryder Lee <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/mt7623.dtsi | 17 ++
arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 326 +++++++++++++++++++++++++++++++++
3 files changed, 344 insertions(+)
create mode 100644 arch/arm/boot/dts/mt7623n-rfb-emmc.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bc33a3c..19013d4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1152,6 +1152,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt6592-evb.dtb \
mt7623a-rfb-emmc.dtb \
mt7623a-rfb-nand.dtb \
+ mt7623n-rfb-emmc.dtb \
mt7623n-rfb-nand.dtb \
mt7623n-bananapi-bpi-r2.dtb \
mt8127-moose.dtb \
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index f84c37b..d1eb123 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -968,6 +968,14 @@
};
};
+ i2c2_pins_a: i2c2-default {
+ pin-i2c2 {
+ pinmux = <MT7623_PIN_77_SDA2_FUNC_SDA2>,
+ <MT7623_PIN_78_SCL2_FUNC_SCL2>;
+ bias-disable;
+ };
+ };
+
i2c2_pins_b: i2c2-alt {
pin-i2c2 {
pinmux = <MT7623_PIN_122_GPIO122_FUNC_SDA2>,
@@ -1185,6 +1193,15 @@
};
};
+ spi2_pins_a: spi2-default {
+ pins-spi {
+ pinmux = <MT7623_PIN_101_SPI2_CSN_FUNC_SPI2_CS>,
+ <MT7623_PIN_104_SPI2_CK_FUNC_SPI2_CK>,
+ <MT7623_PIN_102_SPI2_MI_FUNC_SPI2_MI>,
+ <MT7623_PIN_103_SPI2_MO_FUNC_SPI2_MO>;
+ };
+ };
+
uart0_pins_a: uart0-default {
pins-dat {
pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
new file mode 100644
index 0000000..b760613
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
@@ -0,0 +1,326 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2018 MediaTek Inc.
+ * Author: Sean Wang <[email protected]>
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "mt7623.dtsi"
+#include "mt6323.dtsi"
+
+/ {
+ model = "MediaTek MT7623N with eMMC reference board";
+ compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ cpus {
+ cpu@0 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@1 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@2 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@3 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&key_pins_a>;
+
+ factory {
+ label = "factory";
+ linux,code = <BTN_0>;
+ gpios = <&pio 256 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0 0x80000000 0 0x40000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sound {
+ compatible = "mediatek,mt2701-wm8960-machine";
+ mediatek,platform = <&afe>;
+ audio-routing =
+ "Headphone", "HP_L",
+ "Headphone", "HP_R",
+ "LINPUT1", "AMIC",
+ "RINPUT1", "AMIC";
+ mediatek,audio-codec = <&wm8960>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_pins_a>;
+ };
+};
+
+&btif {
+ status = "okay";
+};
+
+&cir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&cir_pins_a>;
+ status = "okay";
+};
+
+&crypto {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "trgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ mac@1 {
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-handle = <&phy5>;
+ };
+
+ mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy5: ethernet-phy@5 {
+ reg = <5>;
+ phy-mode = "rgmii-rxid";
+ };
+
+ switch@0 {
+ compatible = "mediatek,mt7530";
+ reg = <0>;
+ reset-gpios = <&pio 33 0>;
+ core-supply = <&mt6323_vpa_reg>;
+ io-supply = <&mt6323_vemc3v3_reg>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan0";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "trgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_b>;
+ status = "okay";
+
+ wm8960: wm8960@1a {
+ compatible = "wlf,wm8960";
+ reg = <0x1a>;
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins_a>;
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_default>;
+ pinctrl-1 = <&mmc0_pins_uhs>;
+ status = "okay";
+ bus-width = <8>;
+ max-frequency = <50000000>;
+ cap-mmc-highspeed;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ non-removable;
+};
+
+&mmc1 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc1_pins_default>;
+ pinctrl-1 = <&mmc1_pins_uhs>;
+ status = "okay";
+ bus-width = <4>;
+ max-frequency = <50000000>;
+ cap-sd-highspeed;
+ cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_3p3v>;
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_default>;
+ status = "okay";
+
+ pcie@0,0 {
+ status = "okay";
+ };
+
+ pcie@1,0 {
+ status = "okay";
+ };
+};
+
+&pcie0_phy {
+ status = "okay";
+};
+
+&pcie1_phy {
+ status = "okay";
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins_a>;
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins_a>;
+ status = "okay";
+};
+
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins_a>;
+ status = "okay";
+};
+
+&spi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins_a>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins_a>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins_a>;
+ status = "okay";
+};
+
+&usb1 {
+ vusb33-supply = <®_3p3v>;
+ vbus-supply = <®_5v>;
+ status = "okay";
+};
+
+&u3phy1 {
+ status = "okay";
+};
--
2.7.4
From: Sean Wang <[email protected]>
Convert boilerplate license statement into proper SPDX identifier style.
Signed-off-by: Sean Wang <[email protected]>
Cc: Philippe Ombredanne <[email protected]>
Cc: Rob Herring <[email protected]>
---
arch/arm/boot/dts/mt2701-evb.dts | 9 +--------
arch/arm/boot/dts/mt2701.dtsi | 9 +--------
arch/arm/boot/dts/mt6323.dtsi | 8 +-------
arch/arm/boot/dts/mt6580-evbp1.dts | 9 +--------
arch/arm/boot/dts/mt6580.dtsi | 9 +--------
arch/arm/boot/dts/mt6589-aquaris5.dts | 10 +---------
arch/arm/boot/dts/mt6589.dtsi | 12 ++----------
arch/arm/boot/dts/mt6592-evb.dts | 9 +--------
arch/arm/boot/dts/mt6592.dtsi | 9 +--------
arch/arm/boot/dts/mt7623.dtsi | 9 +--------
arch/arm/boot/dts/mt7623n-rfb-nand.dts | 9 +--------
arch/arm/boot/dts/mt7623n-rfb.dtsi | 9 +--------
arch/arm/boot/dts/mt8127-moose.dts | 9 +--------
arch/arm/boot/dts/mt8127.dtsi | 9 +--------
arch/arm/boot/dts/mt8135-evbp1.dts | 9 +--------
arch/arm/boot/dts/mt8135.dtsi | 9 +--------
16 files changed, 17 insertions(+), 130 deletions(-)
diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
index 63af4b1..be0edb3 100644
--- a/arch/arm/boot/dts/mt2701-evb.dts
+++ b/arch/arm/boot/dts/mt2701-evb.dts
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2015 MediaTek Inc.
* Author: Erin Lo <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index 05557fc..cf1c8eb 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2015 MediaTek Inc.
* Author: Erin.Lo <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <dt-bindings/clock/mt2701-clk.h>
diff --git a/arch/arm/boot/dts/mt6323.dtsi b/arch/arm/boot/dts/mt6323.dtsi
index 7c783d6..958980c 100644
--- a/arch/arm/boot/dts/mt6323.dtsi
+++ b/arch/arm/boot/dts/mt6323.dtsi
@@ -1,15 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2017 MediaTek Inc.
* Author: John Crispin <[email protected]>
* Sean Wang <[email protected]>
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
&pwrap {
diff --git a/arch/arm/boot/dts/mt6580-evbp1.dts b/arch/arm/boot/dts/mt6580-evbp1.dts
index 17daeae..ca13789 100644
--- a/arch/arm/boot/dts/mt6580-evbp1.dts
+++ b/arch/arm/boot/dts/mt6580-evbp1.dts
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2015 MediaTek Inc.
* Author: Mars.C <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/mt6580.dtsi b/arch/arm/boot/dts/mt6580.dtsi
index a349dba..2bdc5ed 100644
--- a/arch/arm/boot/dts/mt6580.dtsi
+++ b/arch/arm/boot/dts/mt6580.dtsi
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2015 MediaTek Inc.
* Author: Mars.C <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <dt-bindings/interrupt-controller/irq.h>
diff --git a/arch/arm/boot/dts/mt6589-aquaris5.dts b/arch/arm/boot/dts/mt6589-aquaris5.dts
index 594a6f3..7bbaa12 100644
--- a/arch/arm/boot/dts/mt6589-aquaris5.dts
+++ b/arch/arm/boot/dts/mt6589-aquaris5.dts
@@ -1,16 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2014 MundoReader S.L.
* Author: Matthias Brugger <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi
index 41df742..28df849 100644
--- a/arch/arm/boot/dts/mt6589.dtsi
+++ b/arch/arm/boot/dts/mt6589.dtsi
@@ -1,17 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2014 MundoReader S.L.
* Author: Matthias Brugger <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
+*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
diff --git a/arch/arm/boot/dts/mt6592-evb.dts b/arch/arm/boot/dts/mt6592-evb.dts
index b57237e..02849f6 100644
--- a/arch/arm/boot/dts/mt6592-evb.dts
+++ b/arch/arm/boot/dts/mt6592-evb.dts
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2014 MediaTek Inc.
* Author: Howard Chen <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/mt6592.dtsi b/arch/arm/boot/dts/mt6592.dtsi
index c69201f..8696ac8 100644
--- a/arch/arm/boot/dts/mt6592.dtsi
+++ b/arch/arm/boot/dts/mt6592.dtsi
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2014 MediaTek Inc.
* Author: Howard Chen <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <dt-bindings/interrupt-controller/irq.h>
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index e10c034..fec4715 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -1,16 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2017 MediaTek Inc.
* Author: John Crispin <[email protected]>
* Sean Wang <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <dt-bindings/interrupt-controller/irq.h>
diff --git a/arch/arm/boot/dts/mt7623n-rfb-nand.dts b/arch/arm/boot/dts/mt7623n-rfb-nand.dts
index f729c71..6b0d401 100644
--- a/arch/arm/boot/dts/mt7623n-rfb-nand.dts
+++ b/arch/arm/boot/dts/mt7623n-rfb-nand.dts
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2017 MediaTek Inc.
* Author: John Crispin <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/mt7623n-rfb.dtsi b/arch/arm/boot/dts/mt7623n-rfb.dtsi
index 256c5fd..a199ae7 100644
--- a/arch/arm/boot/dts/mt7623n-rfb.dtsi
+++ b/arch/arm/boot/dts/mt7623n-rfb.dtsi
@@ -1,16 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2017 MediaTek Inc.
* Author: John Crispin <[email protected]>
* Sean Wang <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/mt8127-moose.dts b/arch/arm/boot/dts/mt8127-moose.dts
index 073e295..308829b 100644
--- a/arch/arm/boot/dts/mt8127-moose.dts
+++ b/arch/arm/boot/dts/mt8127-moose.dts
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2014 MediaTek Inc.
* Author: Joe.C <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
index 916c095..3adfc6f 100644
--- a/arch/arm/boot/dts/mt8127.dtsi
+++ b/arch/arm/boot/dts/mt8127.dtsi
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2014 MediaTek Inc.
* Author: Joe.C <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <dt-bindings/interrupt-controller/irq.h>
diff --git a/arch/arm/boot/dts/mt8135-evbp1.dts b/arch/arm/boot/dts/mt8135-evbp1.dts
index 460db6d..0ace7a4 100644
--- a/arch/arm/boot/dts/mt8135-evbp1.dts
+++ b/arch/arm/boot/dts/mt8135-evbp1.dts
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2014 MediaTek Inc.
* Author: Joe.C <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
index a97b4ee..688069d 100644
--- a/arch/arm/boot/dts/mt8135.dtsi
+++ b/arch/arm/boot/dts/mt8135.dtsi
@@ -1,15 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2014 MediaTek Inc.
* Author: Joe.C <[email protected]>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <dt-bindings/clock/mt8135-clk.h>
--
2.7.4
From: Sean Wang <[email protected]>
Below two wrong nodes in existing DTS files would cause a fail boot since
in fact the address 0 is not the correct place the memory device locates
at.
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x0>;
};
memory@80000000 {
reg = <0x0 0x80000000 0x0 0x40000000>;
};
In order to avoid having a memory node starting at address 0, we can't
include file skeleton64.dtsi and instead need to explicitly manually
define a few of properties the DTS relies on such as #address-cells
and #size-cells in root node and device_type in the node memory@80000000.
Cc: [email protected]
Fixes: 31ac0d69a1d4 ("ARM: dts: mediatek: add MT7623 basic support")
Signed-off-by: Sean Wang <[email protected]>
Cc: Rob Herring <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 3 ++-
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 1 +
arch/arm/boot/dts/mt7623n-rfb.dtsi | 1 +
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index fec4715..406a9f3 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -15,11 +15,12 @@
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/reset/mt2701-resets.h>
#include <dt-bindings/thermal/thermal.h>
-#include "skeleton64.dtsi"
/ {
compatible = "mediatek,mt7623";
interrupt-parent = <&sysirq>;
+ #address-cells = <2>;
+ #size-cells = <2>;
cpu_opp_table: opp-table {
compatible = "operating-points-v2";
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
index bbf56f8..5938e4c 100644
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -109,6 +109,7 @@
};
memory@80000000 {
+ device_type = "memory";
reg = <0 0x80000000 0 0x40000000>;
};
};
diff --git a/arch/arm/boot/dts/mt7623n-rfb.dtsi b/arch/arm/boot/dts/mt7623n-rfb.dtsi
index a199ae7..343e8ef 100644
--- a/arch/arm/boot/dts/mt7623n-rfb.dtsi
+++ b/arch/arm/boot/dts/mt7623n-rfb.dtsi
@@ -40,6 +40,7 @@
};
memory@80000000 {
+ device_type = "memory";
reg = <0 0x80000000 0 0x40000000>;
};
--
2.7.4
From: Sean Wang <[email protected]>
Add MT7623A reference board with eMMC and NAND, respectively.
The both boards compared against MT7623N BPI-R2, we could see there are
UART[0-1] and USB2 being removed, I2C2 and SPI1 being added, I2C1, UART2
owning distinct pin usage and an extra WM8960 codec chip plugged into the
I2C1 offering the functionality of audio player and recorder through
SoC audio front-end engine (AFE).
Signed-off-by: Sean Wang <[email protected]>
Suggested-by: Ryder Lee <[email protected]>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/mt7623.dtsi | 32 ++++
arch/arm/boot/dts/mt7623a-rfb-emmc.dts | 291 ++++++++++++++++++++++++++++
arch/arm/boot/dts/mt7623a-rfb-nand.dts | 337 +++++++++++++++++++++++++++++++++
4 files changed, 662 insertions(+)
create mode 100644 arch/arm/boot/dts/mt7623a-rfb-emmc.dts
create mode 100644 arch/arm/boot/dts/mt7623a-rfb-nand.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e24249..bc33a3c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1150,6 +1150,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt6580-evbp1.dtb \
mt6589-aquaris5.dtb \
mt6592-evb.dtb \
+ mt7623a-rfb-emmc.dtb \
+ mt7623a-rfb-nand.dtb \
mt7623n-rfb-nand.dtb \
mt7623n-bananapi-bpi-r2.dtb \
mt8127-moose.dtb \
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 01893858..f84c37b 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -960,6 +960,22 @@
};
};
+ i2c1_pins_b: i2c1-alt {
+ pin-i2c1 {
+ pinmux = <MT7623_PIN_242_URTS2_FUNC_SCL1>,
+ <MT7623_PIN_243_UCTS2_FUNC_SDA1>;
+ bias-disable;
+ };
+ };
+
+ i2c2_pins_b: i2c2-alt {
+ pin-i2c2 {
+ pinmux = <MT7623_PIN_122_GPIO122_FUNC_SDA2>,
+ <MT7623_PIN_123_HTPLG_FUNC_SCL2>;
+ bias-disable;
+ };
+ };
+
i2s0_pins_a: i2s0-default {
pin-i2s0 {
pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
@@ -1160,6 +1176,15 @@
};
};
+ spi1_pins_a: spi1-default {
+ pins-spi {
+ pinmux = <MT7623_PIN_7_SPI1_CSN_FUNC_SPI1_CS>,
+ <MT7623_PIN_199_SPI1_CK_FUNC_SPI1_CK>,
+ <MT7623_PIN_8_SPI1_MI_FUNC_SPI1_MI>,
+ <MT7623_PIN_9_SPI1_MO_FUNC_SPI1_MO>;
+ };
+ };
+
uart0_pins_a: uart0-default {
pins-dat {
pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
@@ -1180,4 +1205,11 @@
<MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
};
};
+
+ uart2_pins_b: uart2-alt {
+ pins-dat {
+ pinmux = <MT7623_PIN_200_URXD2_FUNC_URXD2>,
+ <MT7623_PIN_201_UTXD2_FUNC_UTXD2>;
+ };
+ };
};
diff --git a/arch/arm/boot/dts/mt7623a-rfb-emmc.dts b/arch/arm/boot/dts/mt7623a-rfb-emmc.dts
new file mode 100644
index 0000000..13c8693
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623a-rfb-emmc.dts
@@ -0,0 +1,291 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2018 MediaTek Inc.
+ * Author: Sean Wang <[email protected]>
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "mt7623a.dtsi"
+#include "mt6323.dtsi"
+
+/ {
+ model = "MediaTek MT7623A with eMMC reference board";
+ compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
+
+ aliases {
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ cpus {
+ cpu@0 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@1 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@2 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@3 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&key_pins_a>;
+
+ factory {
+ label = "factory";
+ linux,code = <BTN_0>;
+ gpios = <&pio 256 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0 0x80000000 0 0x20000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sound {
+ compatible = "mediatek,mt2701-wm8960-machine";
+ mediatek,platform = <&afe>;
+ audio-routing =
+ "Headphone", "HP_L",
+ "Headphone", "HP_R",
+ "LINPUT1", "AMIC",
+ "RINPUT1", "AMIC";
+ mediatek,audio-codec = <&wm8960>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_pins_a>;
+ };
+};
+
+&btif {
+ status = "okay";
+};
+
+&crypto {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "trgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch@0 {
+ compatible = "mediatek,mt7530";
+ reg = <0>;
+ mediatek,mcm;
+ resets = <ðsys MT2701_ETHSYS_MCM_RST>;
+ reset-names = "mcm";
+ core-supply = <&mt6323_vpa_reg>;
+ io-supply = <&mt6323_vemc3v3_reg>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan0";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "trgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_b>;
+ status = "okay";
+
+ wm8960: wm8960@1a {
+ compatible = "wlf,wm8960";
+ reg = <0x1a>;
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins_b>;
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_default>;
+ pinctrl-1 = <&mmc0_pins_uhs>;
+ status = "okay";
+ bus-width = <8>;
+ max-frequency = <50000000>;
+ cap-mmc-highspeed;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ non-removable;
+};
+
+&mmc1 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc1_pins_default>;
+ pinctrl-1 = <&mmc1_pins_uhs>;
+ status = "okay";
+ bus-width = <4>;
+ max-frequency = <50000000>;
+ cap-sd-highspeed;
+ cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_3p3v>;
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_default>;
+ status = "okay";
+
+ pcie@0,0 {
+ status = "okay";
+ };
+
+ pcie@1,0 {
+ status = "okay";
+ };
+};
+
+&pcie0_phy {
+ status = "okay";
+};
+
+&pcie1_phy {
+ status = "okay";
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins_a>;
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins_a>;
+ status = "okay";
+};
+
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins_a>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins_b>;
+ status = "okay";
+};
+
+&usb1 {
+ vusb33-supply = <®_3p3v>;
+ vbus-supply = <®_5v>;
+ status = "okay";
+};
+
+&u3phy1 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/mt7623a-rfb-nand.dts b/arch/arm/boot/dts/mt7623a-rfb-nand.dts
new file mode 100644
index 0000000..88d8f0b
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623a-rfb-nand.dts
@@ -0,0 +1,337 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2018 MediaTek Inc.
+ * Author: Sean Wang <[email protected]>
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "mt7623a.dtsi"
+#include "mt6323.dtsi"
+
+/ {
+ model = "MediaTek MT7623A with NAND reference board";
+ compatible = "mediatek,mt7623a-rfb-nand", "mediatek,mt7623";
+
+ aliases {
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ cpus {
+ cpu@0 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@1 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@2 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+
+ cpu@3 {
+ proc-supply = <&mt6323_vproc_reg>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&key_pins_a>;
+
+ factory {
+ label = "factory";
+ linux,code = <BTN_0>;
+ gpios = <&pio 256 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0 0x80000000 0 0x20000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sound {
+ compatible = "mediatek,mt2701-wm8960-machine";
+ mediatek,platform = <&afe>;
+ audio-routing =
+ "Headphone", "HP_L",
+ "Headphone", "HP_R",
+ "LINPUT1", "AMIC",
+ "RINPUT1", "AMIC";
+ mediatek,audio-codec = <&wm8960>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_pins_a>;
+ };
+};
+
+&bch {
+ status = "okay";
+};
+
+&btif {
+ status = "okay";
+};
+
+&crypto {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "trgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch@0 {
+ compatible = "mediatek,mt7530";
+ reg = <0>;
+ mediatek,mcm;
+ resets = <ðsys MT2701_ETHSYS_MCM_RST>;
+ reset-names = "mcm";
+ core-supply = <&mt6323_vpa_reg>;
+ io-supply = <&mt6323_vemc3v3_reg>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan0";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "trgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_b>;
+ status = "okay";
+
+ wm8960: wm8960@1a {
+ compatible = "wlf,wm8960";
+ reg = <0x1a>;
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins_b>;
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc1_pins_default>;
+ pinctrl-1 = <&mmc1_pins_uhs>;
+ status = "okay";
+ bus-width = <4>;
+ max-frequency = <50000000>;
+ cap-sd-highspeed;
+ cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_3p3v>;
+};
+
+&nandc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&nand_pins_default>;
+ status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ spare_per_sector = <64>;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <12>;
+ nand-ecc-step-size = <1024>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "preloader";
+ reg = <0x0 0x40000>;
+ };
+
+ partition@40000 {
+ label = "uboot";
+ reg = <0x40000 0x80000>;
+ };
+
+ partition@c0000 {
+ label = "uboot-env";
+ reg = <0xC0000 0x40000>;
+ };
+
+ partition@140000 {
+ label = "bootimg";
+ reg = <0x140000 0x2000000>;
+ };
+
+ partition@2140000 {
+ label = "recovery";
+ reg = <0x2140000 0x2000000>;
+ };
+
+ partition@4140000 {
+ label = "rootfs";
+ reg = <0x4140000 0x1000000>;
+ };
+
+ partition@5140000 {
+ label = "usrdata";
+ reg = <0x5140000 0x1000000>;
+ };
+ };
+ };
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_default>;
+ status = "okay";
+
+ pcie@0,0 {
+ status = "okay";
+ };
+
+ pcie@1,0 {
+ status = "okay";
+ };
+};
+
+&pcie0_phy {
+ status = "okay";
+};
+
+&pcie1_phy {
+ status = "okay";
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins_a>;
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins_a>;
+ status = "okay";
+};
+
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins_a>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins_b>;
+ status = "okay";
+};
+
+&usb1 {
+ vusb33-supply = <®_3p3v>;
+ vbus-supply = <®_5v>;
+ status = "okay";
+};
+
+&u3phy1 {
+ status = "okay";
+};
--
2.7.4
From: Sean Wang <[email protected]>
It should be good that no use "_" is in examples. Consequently,
those nodes in certain files which have an inappropriate name containing
"_" are all being replaced with "-".
Signed-off-by: Sean Wang <[email protected]>
Cc: "Rafael J. Wysocki" <[email protected]>
Cc: Viresh Kumar <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Cc: [email protected]
Acked-by: Viresh Kumar <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
index d36f07e..38cfbb5 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
@@ -26,7 +26,7 @@ Optional properties:
Example 1 (MT7623 SoC):
- cpu_opp_table: opp_table {
+ cpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
@@ -86,7 +86,7 @@ Example 1 (MT7623 SoC):
};
Example 2 (MT8173 SoC):
- cpu_opp_table_a: opp_table_a {
+ cpu_opp_table_a: opp-table-a {
compatible = "operating-points-v2";
opp-shared;
@@ -131,7 +131,7 @@ Example 2 (MT8173 SoC):
};
};
- cpu_opp_table_b: opp_table_b {
+ cpu_opp_table_b: opp-table-b {
compatible = "operating-points-v2";
opp-shared;
--
2.7.4
From: Sean Wang <[email protected]>
Fix below a lot of Warnings (unit_address_vs_reg) that dtc complains so
much for
Node /oscillator@1 has a unit name, but no reg property
Node /oscillator@0 has a unit name, but no reg property
Node /pinctrl@10005000/cir@0 has a unit name, but no reg property
Node /pinctrl@10005000/i2c@0 has a unit name, but no reg property
Node /pinctrl@10005000/i2c@1 has a unit name, but no reg property
Node /pinctrl@10005000/i2s@0 has a unit name, but no reg property
Node /pinctrl@10005000/i2s@1 has a unit name, but no reg property
Node /pinctrl@10005000/keys@0 has a unit name, but no reg property
Node /pinctrl@10005000/leds@0 has a unit name, but no reg property
Node /pinctrl@10005000/pwm@0 has a unit name, but no reg property
Node /pinctrl@10005000/spi@0 has a unit name, but no reg property
Node /pinctrl@10005000/uart@0 has a unit name, but no reg property
Node /pinctrl@10005000/uart@1 has a unit name, but no reg property
Node /pinctrl@10005000/uart@2 has a unit name, but no reg property
Node /ethernet@1b100000/mdio-bus/switch@0/ports has a reg or ranges
property, but no unit name
Signed-off-by: Sean Wang <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
---
arch/arm/boot/dts/mt7623.dtsi | 4 ++--
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 27 ++++++++++++---------------
arch/arm/boot/dts/mt7623n-rfb.dtsi | 2 +-
3 files changed, 15 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 406a9f3..b9b5619 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -124,14 +124,14 @@
#clock-cells = <0>;
};
- rtc32k: oscillator@1 {
+ rtc32k: oscillator-1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32000>;
clock-output-names = "rtc32k";
};
- clk26m: oscillator@0 {
+ clk26m: oscillator-0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
index d2a354e..71023a6 100644
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -145,8 +145,6 @@
switch@0 {
compatible = "mediatek,mt7530";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0>;
reset-gpios = <&pio 33 0>;
core-supply = <&mt6323_vpa_reg>;
@@ -155,7 +153,6 @@
ports {
#address-cells = <1>;
#size-cells = <0>;
- reg = <0>;
port@0 {
reg = <0>;
@@ -259,14 +256,14 @@
};
&pio {
- cir_pins_a:cir@0 {
+ cir_pins_a:cir-default {
pins-cir {
pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
bias-disable;
};
};
- i2c0_pins_a: i2c@0 {
+ i2c0_pins_a: i2c0-default {
pins-i2c0 {
pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
<MT7623_PIN_76_SCL0_FUNC_SCL0>;
@@ -274,7 +271,7 @@
};
};
- i2c1_pins_a: i2c@1 {
+ i2c1_pins_a: i2c1-default {
pin-i2c1 {
pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
<MT7623_PIN_58_SCL1_FUNC_SCL1>;
@@ -282,7 +279,7 @@
};
};
- i2s0_pins_a: i2s@0 {
+ i2s0_pins_a: i2s0-default {
pin-i2s0 {
pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
<MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
@@ -294,7 +291,7 @@
};
};
- i2s1_pins_a: i2s@1 {
+ i2s1_pins_a: i2s1-default {
pin-i2s1 {
pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
<MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
@@ -306,7 +303,7 @@
};
};
- key_pins_a: keys@0 {
+ key_pins_a: keys-alt {
pins-keys {
pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
<MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
@@ -314,7 +311,7 @@
};
};
- led_pins_a: leds@0 {
+ led_pins_a: leds-alt {
pins-leds {
pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
<MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
@@ -433,7 +430,7 @@
};
};
- pwm_pins_a: pwm@0 {
+ pwm_pins_a: pwm-default {
pins-pwm {
pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
<MT7623_PIN_204_PWM1_FUNC_PWM1>,
@@ -443,7 +440,7 @@
};
};
- spi0_pins_a: spi@0 {
+ spi0_pins_a: spi0-default {
pins-spi {
pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
<MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
@@ -453,21 +450,21 @@
};
};
- uart0_pins_a: uart@0 {
+ uart0_pins_a: uart0-default {
pins-dat {
pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
<MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
};
};
- uart1_pins_a: uart@1 {
+ uart1_pins_a: uart1-default {
pins-dat {
pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
<MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
};
};
- uart2_pins_a: uart@2 {
+ uart2_pins_a: uart2-default {
pins-dat {
pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
<MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
diff --git a/arch/arm/boot/dts/mt7623n-rfb.dtsi b/arch/arm/boot/dts/mt7623n-rfb.dtsi
index 343e8ef..5c5cc7d 100644
--- a/arch/arm/boot/dts/mt7623n-rfb.dtsi
+++ b/arch/arm/boot/dts/mt7623n-rfb.dtsi
@@ -44,7 +44,7 @@
reg = <0 0x80000000 0 0x40000000>;
};
- usb_p1_vbus: regulator@0 {
+ usb_p1_vbus: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
--
2.7.4
From: Ryder Lee <[email protected]>
Modify audio related nodes to reflect the actual usage in binding documents.
Signed-off-by: Ryder Lee <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt2701.dtsi | 188 ++++++++++++++++++++---------------------
arch/arm/boot/dts/mt7623.dtsi | 190 ++++++++++++++++++++----------------------
2 files changed, 182 insertions(+), 196 deletions(-)
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index cf1c8eb..180377e 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -419,104 +419,96 @@
status = "disabled";
};
- afe: audio-controller@11220000 {
- compatible = "mediatek,mt2701-audio";
- reg = <0 0x11220000 0 0x2000>,
- <0 0x112a0000 0 0x20000>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "afe", "asys";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
-
- clocks = <&infracfg CLK_INFRA_AUDIO>,
- <&topckgen CLK_TOP_AUD_MUX1_SEL>,
- <&topckgen CLK_TOP_AUD_MUX2_SEL>,
- <&topckgen CLK_TOP_AUD_MUX1_DIV>,
- <&topckgen CLK_TOP_AUD_MUX2_DIV>,
- <&topckgen CLK_TOP_AUD_48K_TIMING>,
- <&topckgen CLK_TOP_AUD_44K_TIMING>,
- <&topckgen CLK_TOP_AUDPLL_MUX_SEL>,
- <&topckgen CLK_TOP_APLL_SEL>,
- <&topckgen CLK_TOP_AUD1PLL_98M>,
- <&topckgen CLK_TOP_AUD2PLL_90M>,
- <&topckgen CLK_TOP_HADDS2PLL_98M>,
- <&topckgen CLK_TOP_HADDS2PLL_294M>,
- <&topckgen CLK_TOP_AUDPLL>,
- <&topckgen CLK_TOP_AUDPLL_D4>,
- <&topckgen CLK_TOP_AUDPLL_D8>,
- <&topckgen CLK_TOP_AUDPLL_D16>,
- <&topckgen CLK_TOP_AUDPLL_D24>,
- <&topckgen CLK_TOP_AUDINTBUS_SEL>,
- <&clk26m>,
- <&topckgen CLK_TOP_SYSPLL1_D4>,
- <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K5_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K6_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K5_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K6_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S5_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S6_MCLK>,
- <&topckgen CLK_TOP_ASM_M_SEL>,
- <&topckgen CLK_TOP_ASM_H_SEL>,
- <&topckgen CLK_TOP_UNIVPLL2_D4>,
- <&topckgen CLK_TOP_UNIVPLL2_D2>,
- <&topckgen CLK_TOP_SYSPLL_D5>;
-
- clock-names = "infra_sys_audio_clk",
- "top_audio_mux1_sel",
- "top_audio_mux2_sel",
- "top_audio_mux1_div",
- "top_audio_mux2_div",
- "top_audio_48k_timing",
- "top_audio_44k_timing",
- "top_audpll_mux_sel",
- "top_apll_sel",
- "top_aud1_pll_98M",
- "top_aud2_pll_90M",
- "top_hadds2_pll_98M",
- "top_hadds2_pll_294M",
- "top_audpll",
- "top_audpll_d4",
- "top_audpll_d8",
- "top_audpll_d16",
- "top_audpll_d24",
- "top_audintbus_sel",
- "clk_26m",
- "top_syspll1_d4",
- "top_aud_k1_src_sel",
- "top_aud_k2_src_sel",
- "top_aud_k3_src_sel",
- "top_aud_k4_src_sel",
- "top_aud_k5_src_sel",
- "top_aud_k6_src_sel",
- "top_aud_k1_src_div",
- "top_aud_k2_src_div",
- "top_aud_k3_src_div",
- "top_aud_k4_src_div",
- "top_aud_k5_src_div",
- "top_aud_k6_src_div",
- "top_aud_i2s1_mclk",
- "top_aud_i2s2_mclk",
- "top_aud_i2s3_mclk",
- "top_aud_i2s4_mclk",
- "top_aud_i2s5_mclk",
- "top_aud_i2s6_mclk",
- "top_asm_m_sel",
- "top_asm_h_sel",
- "top_univpll2_d4",
- "top_univpll2_d2",
- "top_syspll_d5";
+ audsys: clock-controller@11220000 {
+ compatible = "mediatek,mt2701-audsys", "syscon";
+ reg = <0 0x11220000 0 0x2000>;
+ #clock-cells = <1>;
+
+ afe: audio-controller {
+ compatible = "mediatek,mt2701-audio";
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "afe", "asys";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+
+ clocks = <&infracfg CLK_INFRA_AUDIO>,
+ <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+ <&topckgen CLK_TOP_AUD_48K_TIMING>,
+ <&topckgen CLK_TOP_AUD_44K_TIMING>,
+ <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
+ <&audsys CLK_AUD_I2SO1>,
+ <&audsys CLK_AUD_I2SO2>,
+ <&audsys CLK_AUD_I2SO3>,
+ <&audsys CLK_AUD_I2SO4>,
+ <&audsys CLK_AUD_I2SIN1>,
+ <&audsys CLK_AUD_I2SIN2>,
+ <&audsys CLK_AUD_I2SIN3>,
+ <&audsys CLK_AUD_I2SIN4>,
+ <&audsys CLK_AUD_ASRCO1>,
+ <&audsys CLK_AUD_ASRCO2>,
+ <&audsys CLK_AUD_ASRCO3>,
+ <&audsys CLK_AUD_ASRCO4>,
+ <&audsys CLK_AUD_AFE>,
+ <&audsys CLK_AUD_AFE_CONN>,
+ <&audsys CLK_AUD_A1SYS>,
+ <&audsys CLK_AUD_A2SYS>,
+ <&audsys CLK_AUD_AFE_MRGIF>;
+
+ clock-names = "infra_sys_audio_clk",
+ "top_audio_mux1_sel",
+ "top_audio_mux2_sel",
+ "top_audio_a1sys_hp",
+ "top_audio_a2sys_hp",
+ "i2s0_src_sel",
+ "i2s1_src_sel",
+ "i2s2_src_sel",
+ "i2s3_src_sel",
+ "i2s0_src_div",
+ "i2s1_src_div",
+ "i2s2_src_div",
+ "i2s3_src_div",
+ "i2s0_mclk_en",
+ "i2s1_mclk_en",
+ "i2s2_mclk_en",
+ "i2s3_mclk_en",
+ "i2so0_hop_ck",
+ "i2so1_hop_ck",
+ "i2so2_hop_ck",
+ "i2so3_hop_ck",
+ "i2si0_hop_ck",
+ "i2si1_hop_ck",
+ "i2si2_hop_ck",
+ "i2si3_hop_ck",
+ "asrc0_out_ck",
+ "asrc1_out_ck",
+ "asrc2_out_ck",
+ "asrc3_out_ck",
+ "audio_afe_pd",
+ "audio_afe_conn_pd",
+ "audio_a1sys_pd",
+ "audio_a2sys_pd",
+ "audio_mrgif_pd";
+
+ assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX1_DIV>,
+ <&topckgen CLK_TOP_AUD_MUX2_DIV>;
+ assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
+ <&topckgen CLK_TOP_AUD2PLL_90M>;
+ assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
+ };
};
mmsys: syscon@14000000 {
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 8cf3d26..eef81d2 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -563,105 +563,99 @@
status = "disabled";
};
- afe: audio-controller@11220000 {
- compatible = "mediatek,mt7623-audio",
- "mediatek,mt2701-audio";
- reg = <0 0x11220000 0 0x2000>,
- <0 0x112a0000 0 0x20000>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "afe", "asys";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+ audsys: clock-controller@11220000 {
+ compatible = "mediatek,mt7623-audsys",
+ "mediatek,mt2701-audsys",
+ "syscon";
+ reg = <0 0x11220000 0 0x2000>;
+ #clock-cells = <1>;
- clocks = <&infracfg CLK_INFRA_AUDIO>,
- <&topckgen CLK_TOP_AUD_MUX1_SEL>,
- <&topckgen CLK_TOP_AUD_MUX2_SEL>,
- <&topckgen CLK_TOP_AUD_MUX1_DIV>,
- <&topckgen CLK_TOP_AUD_MUX2_DIV>,
- <&topckgen CLK_TOP_AUD_48K_TIMING>,
- <&topckgen CLK_TOP_AUD_44K_TIMING>,
- <&topckgen CLK_TOP_AUDPLL_MUX_SEL>,
- <&topckgen CLK_TOP_APLL_SEL>,
- <&topckgen CLK_TOP_AUD1PLL_98M>,
- <&topckgen CLK_TOP_AUD2PLL_90M>,
- <&topckgen CLK_TOP_HADDS2PLL_98M>,
- <&topckgen CLK_TOP_HADDS2PLL_294M>,
- <&topckgen CLK_TOP_AUDPLL>,
- <&topckgen CLK_TOP_AUDPLL_D4>,
- <&topckgen CLK_TOP_AUDPLL_D8>,
- <&topckgen CLK_TOP_AUDPLL_D16>,
- <&topckgen CLK_TOP_AUDPLL_D24>,
- <&topckgen CLK_TOP_AUDINTBUS_SEL>,
- <&clk26m>,
- <&topckgen CLK_TOP_SYSPLL1_D4>,
- <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K5_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K6_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K5_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K6_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S5_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S6_MCLK>,
- <&topckgen CLK_TOP_ASM_M_SEL>,
- <&topckgen CLK_TOP_ASM_H_SEL>,
- <&topckgen CLK_TOP_UNIVPLL2_D4>,
- <&topckgen CLK_TOP_UNIVPLL2_D2>,
- <&topckgen CLK_TOP_SYSPLL_D5>;
-
- clock-names = "infra_sys_audio_clk",
- "top_audio_mux1_sel",
- "top_audio_mux2_sel",
- "top_audio_mux1_div",
- "top_audio_mux2_div",
- "top_audio_48k_timing",
- "top_audio_44k_timing",
- "top_audpll_mux_sel",
- "top_apll_sel",
- "top_aud1_pll_98M",
- "top_aud2_pll_90M",
- "top_hadds2_pll_98M",
- "top_hadds2_pll_294M",
- "top_audpll",
- "top_audpll_d4",
- "top_audpll_d8",
- "top_audpll_d16",
- "top_audpll_d24",
- "top_audintbus_sel",
- "clk_26m",
- "top_syspll1_d4",
- "top_aud_k1_src_sel",
- "top_aud_k2_src_sel",
- "top_aud_k3_src_sel",
- "top_aud_k4_src_sel",
- "top_aud_k5_src_sel",
- "top_aud_k6_src_sel",
- "top_aud_k1_src_div",
- "top_aud_k2_src_div",
- "top_aud_k3_src_div",
- "top_aud_k4_src_div",
- "top_aud_k5_src_div",
- "top_aud_k6_src_div",
- "top_aud_i2s1_mclk",
- "top_aud_i2s2_mclk",
- "top_aud_i2s3_mclk",
- "top_aud_i2s4_mclk",
- "top_aud_i2s5_mclk",
- "top_aud_i2s6_mclk",
- "top_asm_m_sel",
- "top_asm_h_sel",
- "top_univpll2_d4",
- "top_univpll2_d2",
- "top_syspll_d5";
+ afe: audio-controller {
+ compatible = "mediatek,mt7623-audio",
+ "mediatek,mt2701-audio";
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "afe", "asys";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+
+ clocks = <&infracfg CLK_INFRA_AUDIO>,
+ <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+ <&topckgen CLK_TOP_AUD_48K_TIMING>,
+ <&topckgen CLK_TOP_AUD_44K_TIMING>,
+ <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
+ <&audsys CLK_AUD_I2SO1>,
+ <&audsys CLK_AUD_I2SO2>,
+ <&audsys CLK_AUD_I2SO3>,
+ <&audsys CLK_AUD_I2SO4>,
+ <&audsys CLK_AUD_I2SIN1>,
+ <&audsys CLK_AUD_I2SIN2>,
+ <&audsys CLK_AUD_I2SIN3>,
+ <&audsys CLK_AUD_I2SIN4>,
+ <&audsys CLK_AUD_ASRCO1>,
+ <&audsys CLK_AUD_ASRCO2>,
+ <&audsys CLK_AUD_ASRCO3>,
+ <&audsys CLK_AUD_ASRCO4>,
+ <&audsys CLK_AUD_AFE>,
+ <&audsys CLK_AUD_AFE_CONN>,
+ <&audsys CLK_AUD_A1SYS>,
+ <&audsys CLK_AUD_A2SYS>,
+ <&audsys CLK_AUD_AFE_MRGIF>;
+
+ clock-names = "infra_sys_audio_clk",
+ "top_audio_mux1_sel",
+ "top_audio_mux2_sel",
+ "top_audio_a1sys_hp",
+ "top_audio_a2sys_hp",
+ "i2s0_src_sel",
+ "i2s1_src_sel",
+ "i2s2_src_sel",
+ "i2s3_src_sel",
+ "i2s0_src_div",
+ "i2s1_src_div",
+ "i2s2_src_div",
+ "i2s3_src_div",
+ "i2s0_mclk_en",
+ "i2s1_mclk_en",
+ "i2s2_mclk_en",
+ "i2s3_mclk_en",
+ "i2so0_hop_ck",
+ "i2so1_hop_ck",
+ "i2so2_hop_ck",
+ "i2so3_hop_ck",
+ "i2si0_hop_ck",
+ "i2si1_hop_ck",
+ "i2si2_hop_ck",
+ "i2si3_hop_ck",
+ "asrc0_out_ck",
+ "asrc1_out_ck",
+ "asrc2_out_ck",
+ "asrc3_out_ck",
+ "audio_afe_pd",
+ "audio_afe_conn_pd",
+ "audio_a1sys_pd",
+ "audio_a2sys_pd",
+ "audio_mrgif_pd";
+
+ assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX1_DIV>,
+ <&topckgen CLK_TOP_AUD_MUX2_DIV>;
+ assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
+ <&topckgen CLK_TOP_AUD2PLL_90M>;
+ assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
+ };
};
mmc0: mmc@11230000 {
--
2.7.4
From: Sean Wang <[email protected]>
There is 2GB DDR3 available on bananapi-r2 board as [1] specified.
[1] http://www.banana-pi.org/r2.html
Signed-off-by: Sean Wang <[email protected]>
Cc: Rob Herring <[email protected]>
---
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
index 5938e4c..d2a354e 100644
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -110,7 +110,7 @@
memory@80000000 {
device_type = "memory";
- reg = <0 0x80000000 0 0x40000000>;
+ reg = <0 0x80000000 0 0x80000000>;
};
};
--
2.7.4
From: Sean Wang <[email protected]>
Add a common file for MT7623A SoC level DTS, indicating MT7623A only
has a specific definition for power domain. That causes we need to change
related consumers devices such as audio, ethernet, crypto, NAND, and USB
controller to grasp its own power domain it should belong to.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623a.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 arch/arm/boot/dts/mt7623a.dtsi
diff --git a/arch/arm/boot/dts/mt7623a.dtsi b/arch/arm/boot/dts/mt7623a.dtsi
new file mode 100644
index 0000000..0735a1fb8
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623a.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2018 MediaTek Inc.
+ * Author: Sean Wang <[email protected]>
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/power/mt7623a-power.h>
+#include "mt7623.dtsi"
+
+&afe {
+ power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
+};
+
+&crypto {
+ power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
+};
+
+ð {
+ power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
+};
+
+&nandc {
+ power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
+};
+
+&pcie {
+ power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
+};
+
+&scpsys {
+ compatible = "mediatek,mt7623a-scpsys";
+ clocks = <&topckgen CLK_TOP_ETHIF_SEL>;
+ clock-names = "ethif";
+};
+
+&usb1 {
+ power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
+};
+
+&usb2 {
+ power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
+};
--
2.7.4
From: Sean Wang <[email protected]>
add BTIF, HSDMA and SPI-NOR device nodes and enable it on relevant boards
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 36 ++++++++++++++++++++++++++-
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 6 ++++-
2 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index b9b5619..8cf3d26 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (c) 2017 MediaTek Inc.
+ * Copyright (c) 2017-2018 MediaTek Inc.
* Author: John Crispin <[email protected]>
* Sean Wang <[email protected]>
*
@@ -486,6 +486,18 @@
nvmem-cell-names = "calibration-data";
};
+ btif: serial@1100c000 {
+ compatible = "mediatek,mt7623-btif",
+ "mediatek,mtk-btif";
+ reg = <0 0x1100c000 0 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_BTIF>;
+ clock-names = "main";
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+
nandc: nfi@1100d000 {
compatible = "mediatek,mt7623-nfc",
"mediatek,mt2701-nfc";
@@ -511,6 +523,18 @@
status = "disabled";
};
+ nor_flash: spi@11014000 {
+ compatible = "mediatek,mt7623-nor",
+ "mediatek,mt8173-nor";
+ reg = <0 0x11014000 0 0x1000>;
+ clocks = <&pericfg CLK_PERI_FLASH>,
+ <&topckgen CLK_TOP_FLASH_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
spi1: spi@11016000 {
compatible = "mediatek,mt7623-spi",
"mediatek,mt2701-spi";
@@ -867,6 +891,16 @@
#reset-cells = <1>;
};
+ hsdma: dma-controller@1b007000 {
+ compatible = "mediatek,mt7623-hsdma";
+ reg = <0 0x1b007000 0 0x1000>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <ðsys CLK_ETHSYS_HSDMA>;
+ clock-names = "hsdma";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
+ #dma-cells = <1>;
+ };
+
eth: ethernet@1b100000 {
compatible = "mediatek,mt7623-eth",
"mediatek,mt2701-eth",
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
index 71023a6..1fd6f55 100644
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -1,5 +1,5 @@
/*
- * Copyright 2017 Sean Wang <[email protected]>
+ * Copyright 2017-2018 Sean Wang <[email protected]>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
@@ -114,6 +114,10 @@
};
};
+&btif {
+ status = "okay";
+};
+
&cir {
pinctrl-names = "default";
pinctrl-0 = <&cir_pins_a>;
--
2.7.4
On 04/11/2018 10:53 AM, [email protected] wrote:
> From: Sean Wang <[email protected]>
>
> It should be good that no use "_" is in examples. Consequently,
> those nodes in certain files which have an inappropriate name containing
> "_" are all being replaced with "-".
>
> Signed-off-by: Sean Wang <[email protected]>
> Cc: "Rafael J. Wysocki" <[email protected]>
> Cc: Viresh Kumar <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Acked-by: Viresh Kumar <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
> ---
> Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
Reviewed-by: Matthias Brugger <[email protected]>
Rafael, will you take this through your tree?
Regards,
Matthias
> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
> index d36f07e..38cfbb5 100644
> --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
> @@ -26,7 +26,7 @@ Optional properties:
>
> Example 1 (MT7623 SoC):
>
> - cpu_opp_table: opp_table {
> + cpu_opp_table: opp-table {
> compatible = "operating-points-v2";
> opp-shared;
>
> @@ -86,7 +86,7 @@ Example 1 (MT7623 SoC):
> };
>
> Example 2 (MT8173 SoC):
> - cpu_opp_table_a: opp_table_a {
> + cpu_opp_table_a: opp-table-a {
> compatible = "operating-points-v2";
> opp-shared;
>
> @@ -131,7 +131,7 @@ Example 2 (MT8173 SoC):
> };
> };
>
> - cpu_opp_table_b: opp_table_b {
> + cpu_opp_table_b: opp-table-b {
> compatible = "operating-points-v2";
> opp-shared;
>
>
On 04/11/2018 10:53 AM, [email protected] wrote:
> From: Sean Wang <[email protected]>
>
> Below two wrong nodes in existing DTS files would cause a fail boot since
> in fact the address 0 is not the correct place the memory device locates
> at.
>
> memory {
> device_type = "memory";
> reg = <0x0 0x0 0x0 0x0>;
> };
>
> memory@80000000 {
> reg = <0x0 0x80000000 0x0 0x40000000>;
> };
>
> In order to avoid having a memory node starting at address 0, we can't
> include file skeleton64.dtsi and instead need to explicitly manually
> define a few of properties the DTS relies on such as #address-cells
> and #size-cells in root node and device_type in the node memory@80000000.
>
> Cc: [email protected]
> Fixes: 31ac0d69a1d4 ("ARM: dts: mediatek: add MT7623 basic support")
> Signed-off-by: Sean Wang <[email protected]>
> Cc: Rob Herring <[email protected]>
> ---
> arch/arm/boot/dts/mt7623.dtsi | 3 ++-
> arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 1 +
> arch/arm/boot/dts/mt7623n-rfb.dtsi | 1 +
> 3 files changed, 4 insertions(+), 1 deletion(-)
>
merged. We would need this at least for mt2701 as well, correct?
Would you mind to provide a patch.
Regards,
Matthias
> diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
> index fec4715..406a9f3 100644
> --- a/arch/arm/boot/dts/mt7623.dtsi
> +++ b/arch/arm/boot/dts/mt7623.dtsi
> @@ -15,11 +15,12 @@
> #include <dt-bindings/phy/phy.h>
> #include <dt-bindings/reset/mt2701-resets.h>
> #include <dt-bindings/thermal/thermal.h>
> -#include "skeleton64.dtsi"
>
> / {
> compatible = "mediatek,mt7623";
> interrupt-parent = <&sysirq>;
> + #address-cells = <2>;
> + #size-cells = <2>;
>
> cpu_opp_table: opp-table {
> compatible = "operating-points-v2";
> diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> index bbf56f8..5938e4c 100644
> --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> @@ -109,6 +109,7 @@
> };
>
> memory@80000000 {
> + device_type = "memory";
> reg = <0 0x80000000 0 0x40000000>;
> };
> };
> diff --git a/arch/arm/boot/dts/mt7623n-rfb.dtsi b/arch/arm/boot/dts/mt7623n-rfb.dtsi
> index a199ae7..343e8ef 100644
> --- a/arch/arm/boot/dts/mt7623n-rfb.dtsi
> +++ b/arch/arm/boot/dts/mt7623n-rfb.dtsi
> @@ -40,6 +40,7 @@
> };
>
> memory@80000000 {
> + device_type = "memory";
> reg = <0 0x80000000 0 0x40000000>;
> };
>
>
On 04/11/2018 10:53 AM, [email protected] wrote:
> From: Sean Wang <[email protected]>
>
> Changes since v1:
> - Dropped several patches which have been merged.
> - Rebased to linux-next-20180410 where those dependent patches including
> [1] and [2] all have been got merged.
> - Revised according to suggestions and comments on v1, where the major work is
> to put board-specific nodes into DTS files and to leave the common nodes
> among boards in DTSI files as done in patch 7,9,10,11 and 12.
> - Merged Ryder Lee's patch for update audio nodes reflecting the latest
> bindings.
> - Revised commit message.
>
> The series is to refactor current .dts for allowing more boards can properly
> join and reuse almost the same device node definitions.
>
> Before we're doing that, some works about enhancements and fixups are being
> made on the dt-binding document and .dts files. In addition, the series has to
> depend on the patch [1][2]. Otherwise, certain build failure would have an
> occurrence.
>
> [1] arm: dts: mt7623: add PCIe related nodes
> http://lists.infradead.org/pipermail/linux-mediatek/2018-February/012053.html
>
> [2] dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
> http://lists.infradead.org/pipermail/linux-mediatek/2018-February/011930.html
>
> Ryder Lee (1):
> arm: dts: mediatek: modify audio related nodes for both MT2701 and
> MT7623
>
> Sean Wang (11):
> dt-bindings: cpufreq: mediatek: use - instead of _ in examples
> arm: dts: mediatek: converted to using SPDX identifiers
> arm: dts: mt7623: fix invalid memory node being generated
> arm: dts: mt7623: fix available memory size on bananapi-r2
> arm: dts: mt7623: fix all Warnings (unit_address_vs_reg)
> arm: dts: mt7623: add BTIF, HSDMA and SPI-NOR device nodes
> arm: dts: mt6323: move node mt6323 leds to mt6323.dtsi
> arm: dts: mt7623: extend common file reused by all boards with MT7623
> SoCs
> arm: dts: mt7623: add MT7623A SoC level DTS
> arm: dts: mt7623: add MT7623A reference boards
> arm: dts: mt7623: add MT7623N reference board with eMMC
>
I merged all but 1/12 which needs to go through rafaels tree and 8/12 which was
already applied from a different series.
You can find them in v4.17-next/soc on git.kernel.org
Regards,
Matthias
> .../bindings/cpufreq/cpufreq-mediatek.txt | 6 +-
> arch/arm/boot/dts/Makefile | 3 +
> arch/arm/boot/dts/mt2701-evb.dts | 9 +-
> arch/arm/boot/dts/mt2701.dtsi | 197 ++++----
> arch/arm/boot/dts/mt6323.dtsi | 17 +-
> arch/arm/boot/dts/mt6580-evbp1.dts | 9 +-
> arch/arm/boot/dts/mt6580.dtsi | 9 +-
> arch/arm/boot/dts/mt6589-aquaris5.dts | 10 +-
> arch/arm/boot/dts/mt6589.dtsi | 12 +-
> arch/arm/boot/dts/mt6592-evb.dts | 9 +-
> arch/arm/boot/dts/mt6592.dtsi | 9 +-
> arch/arm/boot/dts/mt7623.dtsi | 537 ++++++++++++++++-----
> arch/arm/boot/dts/mt7623a-rfb-emmc.dts | 291 +++++++++++
> arch/arm/boot/dts/mt7623a-rfb-nand.dts | 337 +++++++++++++
> arch/arm/boot/dts/mt7623a.dtsi | 44 ++
> arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 279 ++---------
> arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 326 +++++++++++++
> arch/arm/boot/dts/mt7623n-rfb-nand.dts | 40 +-
> arch/arm/boot/dts/mt7623n-rfb.dtsi | 12 +-
> arch/arm/boot/dts/mt8127-moose.dts | 9 +-
> arch/arm/boot/dts/mt8127.dtsi | 9 +-
> arch/arm/boot/dts/mt8135-evbp1.dts | 9 +-
> arch/arm/boot/dts/mt8135.dtsi | 9 +-
> 23 files changed, 1576 insertions(+), 616 deletions(-)
> create mode 100644 arch/arm/boot/dts/mt7623a-rfb-emmc.dts
> create mode 100644 arch/arm/boot/dts/mt7623a-rfb-nand.dts
> create mode 100644 arch/arm/boot/dts/mt7623a.dtsi
> create mode 100644 arch/arm/boot/dts/mt7623n-rfb-emmc.dts
>
On Fri, 2018-05-11 at 17:03 +0200, Matthias Brugger wrote:
>
> On 04/11/2018 10:53 AM, [email protected] wrote:
> > From: Sean Wang <[email protected]>
> >
> > Below two wrong nodes in existing DTS files would cause a fail boot since
> > in fact the address 0 is not the correct place the memory device locates
> > at.
> >
> > memory {
> > device_type = "memory";
> > reg = <0x0 0x0 0x0 0x0>;
> > };
> >
> > memory@80000000 {
> > reg = <0x0 0x80000000 0x0 0x40000000>;
> > };
> >
> > In order to avoid having a memory node starting at address 0, we can't
> > include file skeleton64.dtsi and instead need to explicitly manually
> > define a few of properties the DTS relies on such as #address-cells
> > and #size-cells in root node and device_type in the node memory@80000000.
> >
> > Cc: [email protected]
> > Fixes: 31ac0d69a1d4 ("ARM: dts: mediatek: add MT7623 basic support")
> > Signed-off-by: Sean Wang <[email protected]>
> > Cc: Rob Herring <[email protected]>
> > ---
> > arch/arm/boot/dts/mt7623.dtsi | 3 ++-
> > arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 1 +
> > arch/arm/boot/dts/mt7623n-rfb.dtsi | 1 +
> > 3 files changed, 4 insertions(+), 1 deletion(-)
> >
>
> merged. We would need this at least for mt2701 as well, correct?
> Would you mind to provide a patch.
>
> Regards,
> Matthias
>
Thanks! I totally think the same problem could happen on mt2701, so I'm
happy to come up with a patch for that.
Sean
> > diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
> > index fec4715..406a9f3 100644
> > --- a/arch/arm/boot/dts/mt7623.dtsi
> > +++ b/arch/arm/boot/dts/mt7623.dtsi
> > @@ -15,11 +15,12 @@
> > #include <dt-bindings/phy/phy.h>
> > #include <dt-bindings/reset/mt2701-resets.h>
> > #include <dt-bindings/thermal/thermal.h>
> > -#include "skeleton64.dtsi"
> >
> > / {
> > compatible = "mediatek,mt7623";
> > interrupt-parent = <&sysirq>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> >
> > cpu_opp_table: opp-table {
> > compatible = "operating-points-v2";
> > diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> > index bbf56f8..5938e4c 100644
> > --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> > +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> > @@ -109,6 +109,7 @@
> > };
> >
> > memory@80000000 {
> > + device_type = "memory";
> > reg = <0 0x80000000 0 0x40000000>;
> > };
> > };
> > diff --git a/arch/arm/boot/dts/mt7623n-rfb.dtsi b/arch/arm/boot/dts/mt7623n-rfb.dtsi
> > index a199ae7..343e8ef 100644
> > --- a/arch/arm/boot/dts/mt7623n-rfb.dtsi
> > +++ b/arch/arm/boot/dts/mt7623n-rfb.dtsi
> > @@ -40,6 +40,7 @@
> > };
> >
> > memory@80000000 {
> > + device_type = "memory";
> > reg = <0 0x80000000 0 0x40000000>;
> > };
> >
> >