During a frame transfer in command mode, there could be frequent
LP11 <-> HS transitions when multiple DCS commands are sent mid-frame or
if the DSI controller is running on slow clock and is throttled. To
minimize frame latency due to these transitions, it is recommended to
send the frame in a single burst.
This feature is supported for DSI 6G 1.3 and above, thus enable burst
mode if supported.
Signed-off-by: Jessica Zhang <[email protected]>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 744f2398a6d6..8254b06dca85 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -994,6 +994,11 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_TOTAL,
DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL(hdisplay) |
DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL(mode->vdisplay));
+
+ if (msm_host->cfg_hnd->major == MSM_DSI_VER_MAJOR_6G &&
+ msm_host->cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_3)
+ dsi_write(msm_host, REG_DSI_CMD_MODE_MDP_CTRL2,
+ DSI_CMD_MODE_MDP_CTRL2_BURST_MODE);
}
}
---
base-commit: dd969f852ba4c66938c71889e826aa8e5300d2f2
change-id: 20230608-b4-add-burst-mode-a5bb144069fa
Best regards,
--
Jessica Zhang <[email protected]>
On 2023-06-12 16:37:36, Jessica Zhang wrote:
> During a frame transfer in command mode, there could be frequent
> LP11 <-> HS transitions when multiple DCS commands are sent mid-frame or
> if the DSI controller is running on slow clock and is throttled. To
> minimize frame latency due to these transitions, it is recommended to
> send the frame in a single burst.
>
> This feature is supported for DSI 6G 1.3 and above, thus enable burst
> mode if supported.
>
> Signed-off-by: Jessica Zhang <[email protected]>
> ---
> drivers/gpu/drm/msm/dsi/dsi_host.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index 744f2398a6d6..8254b06dca85 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -994,6 +994,11 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
> dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_TOTAL,
> DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL(hdisplay) |
> DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL(mode->vdisplay));
> +
> + if (msm_host->cfg_hnd->major == MSM_DSI_VER_MAJOR_6G &&
> + msm_host->cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_3)
> + dsi_write(msm_host, REG_DSI_CMD_MODE_MDP_CTRL2,
> + DSI_CMD_MODE_MDP_CTRL2_BURST_MODE);
This is not part of the timing setup, and a similar BURST_MODE flag is
enabled for video-mode in dsi_ctrl_config() - should it be moved there?
(There is a dsi_sw_reset() in between the calls to dsi_timing_setup()
and dsi_ctrl_cfg())
Note that that function sets up the CMD_CFG0 and CMD_CFG1 register, with
the former having a very similar layout to MDP_CTRL2... is there
documentation outlining the difference?
- Marijn
> }
> }
>
>
> ---
> base-commit: dd969f852ba4c66938c71889e826aa8e5300d2f2
> change-id: 20230608-b4-add-burst-mode-a5bb144069fa
>
> Best regards,
> --
> Jessica Zhang <[email protected]>
>
On 13/06/2023 02:37, Jessica Zhang wrote:
> During a frame transfer in command mode, there could be frequent
> LP11 <-> HS transitions when multiple DCS commands are sent mid-frame or
> if the DSI controller is running on slow clock and is throttled. To
> minimize frame latency due to these transitions, it is recommended to
> send the frame in a single burst.
>
> This feature is supported for DSI 6G 1.3 and above, thus enable burst
> mode if supported.
>
> Signed-off-by: Jessica Zhang <[email protected]>
> ---
> drivers/gpu/drm/msm/dsi/dsi_host.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index 744f2398a6d6..8254b06dca85 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -994,6 +994,11 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
> dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_TOTAL,
> DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL(hdisplay) |
> DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL(mode->vdisplay));
> +
> + if (msm_host->cfg_hnd->major == MSM_DSI_VER_MAJOR_6G &&
> + msm_host->cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_3)
> + dsi_write(msm_host, REG_DSI_CMD_MODE_MDP_CTRL2,
> + DSI_CMD_MODE_MDP_CTRL2_BURST_MODE);
Please move this to dsi_ctrl_config(), the place where we set all the
configs. Also please change this to RMW cycle.
> }
> }
>
>
> ---
> base-commit: dd969f852ba4c66938c71889e826aa8e5300d2f2
> change-id: 20230608-b4-add-burst-mode-a5bb144069fa
>
> Best regards,
--
With best wishes
Dmitry
On 6/14/2023 2:43 AM, Marijn Suijten wrote:
> On 2023-06-12 16:37:36, Jessica Zhang wrote:
>> During a frame transfer in command mode, there could be frequent
>> LP11 <-> HS transitions when multiple DCS commands are sent mid-frame or
>> if the DSI controller is running on slow clock and is throttled. To
>> minimize frame latency due to these transitions, it is recommended to
>> send the frame in a single burst.
>>
>> This feature is supported for DSI 6G 1.3 and above, thus enable burst
>> mode if supported.
>>
>> Signed-off-by: Jessica Zhang <[email protected]>
>> ---
>> drivers/gpu/drm/msm/dsi/dsi_host.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
>> index 744f2398a6d6..8254b06dca85 100644
>> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
>> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
>> @@ -994,6 +994,11 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
>> dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_TOTAL,
>> DSI_CMD_MDP_STREAM0_TOTAL_H_TOTAL(hdisplay) |
>> DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL(mode->vdisplay));
>> +
>> + if (msm_host->cfg_hnd->major == MSM_DSI_VER_MAJOR_6G &&
>> + msm_host->cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_3)
>> + dsi_write(msm_host, REG_DSI_CMD_MODE_MDP_CTRL2,
>> + DSI_CMD_MODE_MDP_CTRL2_BURST_MODE);
>
> This is not part of the timing setup, and a similar BURST_MODE flag is
> enabled for video-mode in dsi_ctrl_config() - should it be moved there?
Hi Marijn,
Sure, I can move the change to dsi_ctrl_enable() instead.
>
> (There is a dsi_sw_reset() in between the calls to dsi_timing_setup()
> and dsi_ctrl_cfg())
>
> Note that that function sets up the CMD_CFG0 and CMD_CFG1 register, with
> the former having a very similar layout to MDP_CTRL2... is there
> documentation outlining the difference?
I see what you mean, but unfortunately I'm not able to give you any
documentation about the differences between them.
FWIW, I think the macros in dsi.xml.h should give you a sense of what's
within the registers and the slight differences between them.
Thanks,
Jessica Zhang
>
> - Marijn
>
>> }
>> }
>>
>>
>> ---
>> base-commit: dd969f852ba4c66938c71889e826aa8e5300d2f2
>> change-id: 20230608-b4-add-burst-mode-a5bb144069fa
>>
>> Best regards,
>> --
>> Jessica Zhang <[email protected]>
>>