2023-04-16 09:21:40

by Yang Xiwen via B4 Relay

[permalink] [raw]
Subject: [PATCH RFC v4 0/4] mmc: add support for the dw-mmc controller on Hi3798MV200

The dw-mmc controller found on Hi3798MV200 is like the one found on
Hi3798CV200, but has some tweaks.
Also refreshed the dt-binding and converted it to YAML.

Signed-off-by: Yang Xiwen <[email protected]>
---
Changes in v4:
- fix license of dt-binding document.
- some other fixes to dt-binding document.
- Link to v3: https://lore.kernel.org/r/[email protected]

Changes in v3:
- split dt-binding commit into 2 parts, one for renaming, the other for
new compatible string.
- some other fixes to dt-binding document.
- Link to v2: https://lore.kernel.org/r/[email protected]

Changes in v2:
- add DDR52 support
- edit dt-binding, substitude all hi3798cv200 with histb
- send email to more people
- Link to v1: https://lore.kernel.org/r/[email protected]

---
Yang Xiwen (4):
mmc: dw_mmc: hi3798cv200: rename to dw_mmc-histb
mmc: dw_mmc: histb: add support for hi3798mv200
dt-binding: mmc: hi3798cv200-dw-mshc: convert to YAML and rename to histb-dw-mshc
dt-binding: mmc: histb-dw-mshc: Add Hi3798MV200 compatible string

.../bindings/mmc/hi3798cv200-dw-mshc.txt | 40 ---
.../bindings/mmc/hisilicon,histb-dw-mshc.yaml | 93 ++++++
drivers/mmc/host/Kconfig | 8 +-
drivers/mmc/host/Makefile | 2 +-
drivers/mmc/host/dw_mmc-hi3798cv200.c | 206 -------------
drivers/mmc/host/dw_mmc-histb.c | 339 +++++++++++++++++++++
6 files changed, 437 insertions(+), 251 deletions(-)
---
base-commit: 76f598ba7d8e2bfb4855b5298caedd5af0c374a8
change-id: 20230415-mmc-hi3798mv200-ce15e9b96866

Best regards,
--
Yang Xiwen <[email protected]>


2023-04-16 09:21:44

by Yang Xiwen via B4 Relay

[permalink] [raw]
Subject: [PATCH RFC v4 3/4] dt-binding: mmc: hi3798cv200-dw-mshc: convert to YAML and rename to histb-dw-mshc

From: Yang Xiwen <[email protected]>

The renaming is due to the fact that it is now supporting SoCs other
than Hi3798CV200.

Signed-off-by: Yang Xiwen <[email protected]>
---
.../bindings/mmc/hi3798cv200-dw-mshc.txt | 40 -------------
.../bindings/mmc/hisilicon,histb-dw-mshc.yaml | 69 ++++++++++++++++++++++
2 files changed, 69 insertions(+), 40 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt
deleted file mode 100644
index a0693b7145f2a..0000000000000
--- a/Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt
+++ /dev/null
@@ -1,40 +0,0 @@
-* Hisilicon Hi3798CV200 specific extensions to the Synopsys Designware Mobile
- Storage Host Controller
-
-Read synopsys-dw-mshc.txt for more details
-
-The Synopsys designware mobile storage host controller is used to interface
-a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
-differences between the core Synopsys dw mshc controller properties described
-by synopsys-dw-mshc.txt and the properties used by the Hisilicon Hi3798CV200
-specific extensions to the Synopsys Designware Mobile Storage Host Controller.
-
-Required Properties:
-- compatible: Should contain "hisilicon,hi3798cv200-dw-mshc".
-- clocks: A list of phandle + clock-specifier pairs for the clocks listed
- in clock-names.
-- clock-names: Should contain the following:
- "ciu" - The ciu clock described in synopsys-dw-mshc.txt.
- "biu" - The biu clock described in synopsys-dw-mshc.txt.
- "ciu-sample" - Hi3798CV200 extended phase clock for ciu sampling.
- "ciu-drive" - Hi3798CV200 extended phase clock for ciu driving.
-
-Example:
-
- emmc: mmc@9830000 {
- compatible = "hisilicon,hi3798cv200-dw-mshc";
- reg = <0x9830000 0x10000>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HISTB_MMC_CIU_CLK>,
- <&crg HISTB_MMC_BIU_CLK>,
- <&crg HISTB_MMC_SAMPLE_CLK>,
- <&crg HISTB_MMC_DRV_CLK>;
- clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";
- fifo-depth = <256>;
- clock-frequency = <200000000>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- non-removable;
- bus-width = <8>;
- };
diff --git a/Documentation/devicetree/bindings/mmc/hisilicon,histb-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/hisilicon,histb-dw-mshc.yaml
new file mode 100644
index 0000000000000..301b6ad39c5af
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/hisilicon,histb-dw-mshc.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mmc/histb-dw-mshc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title:
+ Hisilicon HiSTB SoC specific extensions to the Synopsys Designware Mobile
+ Storage Host Controller
+
+maintainers:
+ - Yang Xiwen <[email protected]>
+
+description:
+ The Synopsys designware mobile storage host controller is used to interface a
+ SoC with storage medium such as eMMC or SD/MMC cards.
+
+properties:
+ compatible:
+ enum:
+ - hisilicon,hi3798cv200-dw-mshc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 4
+
+ clock-names:
+ items:
+ - const: ciu
+ - const: biu
+ - const: ciu-sample
+ - const: ciu-drive
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+allOf:
+ - $ref: synopsys-dw-mshc-common.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ emmc: mmc@9830000 {
+ compatible = "hisilicon,hi3798cv200-dw-mshc";
+ reg = <0x9830000 0x10000>;
+ interrupts = <35>;
+ clocks = <&crg 1>,
+ <&crg 2>,
+ <&crg 3>,
+ <&crg 4>;
+ clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";
+ fifo-depth = <256>;
+ clock-frequency = <200000000>;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ non-removable;
+ bus-width = <8>;
+ };

--
2.39.2

2023-04-16 09:21:47

by Yang Xiwen via B4 Relay

[permalink] [raw]
Subject: [PATCH RFC v4 2/4] mmc: dw_mmc: histb: add support for hi3798mv200

From: Yang Xiwen <[email protected]>

Add support for Hi3798MV200 specific extension.

Signed-off-by: Yang Xiwen <[email protected]>
---
drivers/mmc/host/dw_mmc-histb.c | 110 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 109 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/dw_mmc-histb.c b/drivers/mmc/host/dw_mmc-histb.c
index 106e586bcff4b..039b6df0e8c4d 100644
--- a/drivers/mmc/host/dw_mmc-histb.c
+++ b/drivers/mmc/host/dw_mmc-histb.c
@@ -16,10 +16,14 @@
#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"

+#define SDMMC_TUNING_CTRL 0x118
+#define SDMMC_TUNING_FIND_EDGE BIT(5)
+
#define ALL_INT_CLR 0x1ffff

enum dw_mci_histb_type {
DW_MCI_TYPE_HI3798CV200,
+ DW_MCI_TYPE_HI3798MV200,
};

static struct dw_mci_histb_compat {
@@ -29,6 +33,9 @@ static struct dw_mci_histb_compat {
{
.compatible = "hisilicon,hi3798cv200-dw-mshc",
.ctrl_type = DW_MCI_TYPE_HI3798CV200,
+ }, {
+ .compatible = "hisilicon,hi3798mv200-dw-mshc",
+ .ctrl_type = DW_MCI_TYPE_HI3798MV200,
},
};

@@ -36,6 +43,7 @@ struct dw_mci_histb_priv {
enum dw_mci_histb_type ctrl_type;
struct clk *sample_clk;
struct clk *drive_clk;
+ struct clk *sap_dll_mode_clk;
};

static void dw_mci_histb_set_ios(struct dw_mci *host, struct mmc_ios *ios)
@@ -68,7 +76,10 @@ static void dw_mci_histb_set_ios(struct dw_mci *host, struct mmc_ios *ios)
if (ios->timing == MMC_TIMING_MMC_HS ||
ios->timing == MMC_TIMING_LEGACY)
clk_set_phase(priv->drive_clk, 180);
- else if (ios->timing == MMC_TIMING_MMC_HS200)
+ else if (ios->timing == MMC_TIMING_MMC_DDR52) {
+ clk_set_phase(priv->drive_clk, 90);
+ clk_set_phase(priv->sample_clk, 45);
+ } else if (ios->timing == MMC_TIMING_MMC_HS200)
clk_set_phase(priv->drive_clk, 135);
}

@@ -133,6 +144,75 @@ static int dw_mci_hi3798cv200_execute_tuning(struct dw_mci_slot *slot,
return err;
}

+static int dw_mci_hi3798mv200_execute_tuning_mix_mode(struct dw_mci_slot *slot,
+ u32 opcode)
+{
+ static const int degrees[] = { 0, 45, 90, 135, 180, 225, 270, 315 };
+ struct dw_mci *host = slot->host;
+ struct dw_mci_histb_priv *priv = host->priv;
+ int raise_point = -1, fall_point = -1;
+ int err, prev_err = -1;
+ int found = 0;
+ int regval;
+ int i;
+
+ clk_disable(priv->sap_dll_mode_clk);
+ for (i = 0; i < ARRAY_SIZE(degrees); i++) {
+ clk_set_phase(priv->sample_clk, degrees[i]);
+ mci_writel(host, RINTSTS, ALL_INT_CLR);
+
+ err = mmc_send_tuning(slot->mmc, opcode, NULL);
+ if (err)
+ found = 1;
+ else {
+ regval = mci_readl(host, TUNING_CTRL);
+ if (regval & SDMMC_TUNING_FIND_EDGE)
+ found = 1;
+ };
+
+ if (i > 0) {
+ if (err && !prev_err)
+ fall_point = i - 1;
+ if (!err && prev_err)
+ raise_point = i;
+ }
+
+ if (raise_point != -1 && fall_point != -1)
+ goto tuning_out;
+
+ prev_err = err;
+ err = 0;
+ }
+
+tuning_out:
+ clk_enable(priv->sap_dll_mode_clk);
+ if (found) {
+ if (raise_point == -1)
+ raise_point = 0;
+ if (fall_point == -1)
+ fall_point = ARRAY_SIZE(degrees) - 1;
+ if (fall_point < raise_point) {
+ if ((raise_point + fall_point) >
+ (ARRAY_SIZE(degrees) - 1))
+ i = fall_point / 2;
+ else
+ i = (raise_point + ARRAY_SIZE(degrees) - 1) / 2;
+ } else {
+ i = (raise_point + fall_point) / 2;
+ }
+
+ clk_set_phase(priv->sample_clk, degrees[i]);
+ dev_dbg(host->dev, "Tuning clk_sample[%d, %d], set[%d]\n",
+ raise_point, fall_point, degrees[i]);
+ } else {
+ dev_err(host->dev, "No valid clk_sample shift! use default\n");
+ err = -EINVAL;
+ }
+
+ mci_writel(host, RINTSTS, ALL_INT_CLR);
+ return err;
+}
+
static int dw_mci_histb_init(struct dw_mci *host)
{
struct dw_mci_histb_priv *priv;
@@ -160,6 +240,14 @@ static int dw_mci_histb_init(struct dw_mci *host)
return PTR_ERR(priv->drive_clk);
}

+ if (priv->ctrl_type == DW_MCI_TYPE_HI3798MV200) {
+ priv->sap_dll_mode_clk = devm_clk_get(host->dev, "sap-dll-mode");
+ if (IS_ERR(priv->sap_dll_mode_clk)) {
+ dev_err(host->dev, "failed to get sap-dll-mode clock\n");
+ return PTR_ERR(priv->sap_dll_mode_clk);
+ }
+ }
+
ret = clk_prepare_enable(priv->sample_clk);
if (ret) {
dev_err(host->dev, "failed to enable ciu-sample clock\n");
@@ -172,9 +260,19 @@ static int dw_mci_histb_init(struct dw_mci *host)
goto disable_sample_clk;
}

+ if (priv->ctrl_type == DW_MCI_TYPE_HI3798MV200) {
+ ret = clk_prepare_enable(priv->sap_dll_mode_clk);
+ if (ret) {
+ dev_err(host->dev, "failed to disable tuning mode");
+ goto disable_drive_clk;
+ }
+ }
+
host->priv = priv;
return 0;

+disable_drive_clk:
+ clk_disable_unprepare(priv->drive_clk);
disable_sample_clk:
clk_disable_unprepare(priv->sample_clk);
return ret;
@@ -187,8 +285,16 @@ static const struct dw_mci_drv_data hi3798cv200_data = {
.execute_tuning = dw_mci_hi3798cv200_execute_tuning,
};

+static const struct dw_mci_drv_data hi3798mv200_data = {
+ .common_caps = MMC_CAP_CMD23,
+ .init = dw_mci_histb_init,
+ .set_ios = dw_mci_histb_set_ios,
+ .execute_tuning = dw_mci_hi3798mv200_execute_tuning_mix_mode,
+};
+
static const struct of_device_id dw_mci_histb_match[] = {
{ .compatible = "hisilicon,hi3798cv200-dw-mshc", .data = &hi3798cv200_data },
+ { .compatible = "hisilicon,hi3798mv200-dw-mshc", .data = &hi3798mv200_data },
{},
};

@@ -208,6 +314,8 @@ static int dw_mci_histb_remove(struct platform_device *pdev)

clk_disable_unprepare(priv->drive_clk);
clk_disable_unprepare(priv->sample_clk);
+ if (priv->ctrl_type == DW_MCI_TYPE_HI3798MV200)
+ clk_disable_unprepare(priv->sap_dll_mode_clk);

dw_mci_pltfm_remove(pdev);


--
2.39.2

2023-04-16 11:35:42

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH RFC v4 3/4] dt-binding: mmc: hi3798cv200-dw-mshc: convert to YAML and rename to histb-dw-mshc

On 16/04/2023 11:19, Yang Xiwen via B4 Relay wrote:
> From: Yang Xiwen <[email protected]>
>
> The renaming is due to the fact that it is now supporting SoCs other
> than Hi3798CV200.
>
> Signed-off-by: Yang Xiwen <[email protected]>

Reviewed-by: Krzysztof Kozlowski <[email protected]>



This is an automated instruction, just in case, because many review tags
are being ignored. If you do not know the process, here is a short
explanation:

Please add Acked-by/Reviewed-by/Tested-by tags when posting new
versions, under or above your Signed-off-by tag. Tools like b4 can help
here. However, there's no need to repost patches *only* to add the tags.
The upstream maintainer will do that for acks received on the version
they apply.

https://elixir.bootlin.com/linux/v5.17/source/Documentation/process/submitting-patches.rst#L540

Best regards,
Krzysztof

2023-04-17 13:15:41

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH RFC v4 3/4] dt-binding: mmc: hi3798cv200-dw-mshc: convert to YAML and rename to histb-dw-mshc


On Sun, 16 Apr 2023 17:19:34 +0800, Yang Xiwen wrote:
> The renaming is due to the fact that it is now supporting SoCs other
> than Hi3798CV200.
>
> Signed-off-by: Yang Xiwen <[email protected]>
> ---
> .../bindings/mmc/hi3798cv200-dw-mshc.txt | 40 -------------
> .../bindings/mmc/hisilicon,histb-dw-mshc.yaml | 69 ++++++++++++++++++++++
> 2 files changed, 69 insertions(+), 40 deletions(-)
>

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
./Documentation/devicetree/bindings/mmc/hisilicon,histb-dw-mshc.yaml: $id: relative path/filename doesn't match actual path or filename
expected: http://devicetree.org/schemas/mmc/hisilicon,histb-dw-mshc.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

2023-04-17 17:15:33

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH RFC v4 3/4] dt-binding: mmc: hi3798cv200-dw-mshc: convert to YAML and rename to histb-dw-mshc

On 16/04/2023 13:17, Krzysztof Kozlowski wrote:
> On 16/04/2023 11:19, Yang Xiwen via B4 Relay wrote:
>> From: Yang Xiwen <[email protected]>
>>
>> The renaming is due to the fact that it is now supporting SoCs other
>> than Hi3798CV200.
>>
>> Signed-off-by: Yang Xiwen <[email protected]>
>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>

Eh, as Rob pointed out, this was not tested, so un-reviewed.

Best regards,
Krzysztof

2023-04-19 13:31:11

by Yang Xiwen

[permalink] [raw]
Subject: Re: [PATCH RFC v4 0/4] mmc: add support for the dw-mmc controller on Hi3798MV200

On 4/16/2023 5:19 PM, Yang Xiwen via B4 Relay wrote:
> The dw-mmc controller found on Hi3798MV200 is like the one found on
> Hi3798CV200, but has some tweaks.
> Also refreshed the dt-binding and converted it to YAML.
>
> Signed-off-by: Yang Xiwen <[email protected]>
> ---
> Changes in v4:
> - fix license of dt-binding document.
> - some other fixes to dt-binding document.
> - Link to v3: https://lore.kernel.org/r/[email protected]
>
> Changes in v3:
> - split dt-binding commit into 2 parts, one for renaming, the other for
> new compatible string.
> - some other fixes to dt-binding document.
> - Link to v2: https://lore.kernel.org/r/[email protected]
>
> Changes in v2:
> - add DDR52 support
> - edit dt-binding, substitude all hi3798cv200 with histb
> - send email to more people
> - Link to v1: https://lore.kernel.org/r/[email protected]
>
> ---
> Yang Xiwen (4):
> mmc: dw_mmc: hi3798cv200: rename to dw_mmc-histb
> mmc: dw_mmc: histb: add support for hi3798mv200
> dt-binding: mmc: hi3798cv200-dw-mshc: convert to YAML and rename to histb-dw-mshc
> dt-binding: mmc: histb-dw-mshc: Add Hi3798MV200 compatible string
>
> .../bindings/mmc/hi3798cv200-dw-mshc.txt | 40 ---
> .../bindings/mmc/hisilicon,histb-dw-mshc.yaml | 93 ++++++
> drivers/mmc/host/Kconfig | 8 +-
> drivers/mmc/host/Makefile | 2 +-
> drivers/mmc/host/dw_mmc-hi3798cv200.c | 206 -------------
> drivers/mmc/host/dw_mmc-histb.c | 339 +++++++++++++++++++++
> 6 files changed, 437 insertions(+), 251 deletions(-)
> ---
> base-commit: 76f598ba7d8e2bfb4855b5298caedd5af0c374a8
> change-id: 20230415-mmc-hi3798mv200-ce15e9b96866
>
> Best regards,
Sorry for wasting your time, but please don't review this patchset
anymore. I decided to rewrite it.
--
Best regards,
Yang Xiwen