Now that we have GPU DVFS support in lima [0] (queued for Linux 5.7)
and panfrost we can make it work on Amlogic SoCs.
The first two patches update the clock drivers to allow runtime
frequency changes of the mali clock tree. This is similar to what I
have implemented for Meson8b/Meson8m2 already.
The remaining three patches add the GPU OPP tables to the .dtsi files.
I decided to remove code duplication for the Mali-450 GPU on GXBB and
GXL so it will be easier to maintain this. This refactoring is part of
patch #3. Patches #4 (GXM) and #5 (G12A, G12B, SM1) are straight
forward; it replaces the hardcoded clock settings with the the GPU OPP
table.
I used the userspace devfreq governor to cycle through all available
GPU frequency settings on GXL, GXM and G12A (which covers all relevant
GPU driver and clock driver combinations). I have taken the GPU OPP
tables from Amlogic's 4.9 vendor kernel and the voltage settings
(opp-microvolt property) from the public dataseheets for all SoCs.
[0] https://cgit.freedesktop.org/drm-misc/commit/?id=1996970773a323533e1cc1b6b97f00a95d675f32
Martin Blumenstingl (5):
clk: meson: gxbb: Prepare the GPU clock tree to change at runtime
clk: meson: g12a: Prepare the GPU clock tree to change at runtime
arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS
arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS
arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS
.../boot/dts/amlogic/meson-g12-common.dtsi | 49 ++++++++++-----
.../boot/dts/amlogic/meson-gx-mali450.dtsi | 61 +++++++++++++++++++
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 51 ++++------------
.../boot/dts/amlogic/meson-gxl-mali.dtsi | 46 +++-----------
arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 45 +++++++++-----
drivers/clk/meson/g12a.c | 30 ++++++---
drivers/clk/meson/gxbb.c | 40 ++++++------
7 files changed, 189 insertions(+), 133 deletions(-)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi
--
2.26.0
On Tue 31 Mar 2020 at 00:10, Martin Blumenstingl <[email protected]> wrote:
>
> [0] https://cgit.freedesktop.org/drm-misc/commit/?id=1996970773a323533e1cc1b6b97f00a95d675f32
>
>
> Martin Blumenstingl (5):
> clk: meson: gxbb: Prepare the GPU clock tree to change at runtime
> clk: meson: g12a: Prepare the GPU clock tree to change at runtime
> arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS
> arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS
> arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS
>
> .../boot/dts/amlogic/meson-g12-common.dtsi | 49 ++++++++++-----
> .../boot/dts/amlogic/meson-gx-mali450.dtsi | 61 +++++++++++++++++++
> arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 51 ++++------------
> .../boot/dts/amlogic/meson-gxl-mali.dtsi | 46 +++-----------
> arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 45 +++++++++-----
> drivers/clk/meson/g12a.c | 30 ++++++---
> drivers/clk/meson/gxbb.c | 40 ++++++------
> 7 files changed, 189 insertions(+), 133 deletions(-)
> create mode 100644 arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi
Clock part looks good to me and aligns with meson8.
Please resend the clock part without the RFC tag