Hello,
Context:
HDLC PCI adapter + line at 2 Mb/s + external traffic generator that fills
the line with 5 to x1000 bytes frame.
I want to see how my code bahaves during rare (?) events: an overflow of
the RX fifo (256 bytes) and a TX underrun. It's my understanding that if the
adapter pains at DMAing, those errors should be triggered.
Could I/O at a inocuous location (a well-choosen PCI register ?) be enough
for that ?
--
Ueimor
> I want to see how my code bahaves during rare (?) events: an overflow of
> the RX fifo (256 bytes) and a TX underrun. It's my understanding that if the
> adapter pains at DMAing, those errors should be triggered.
> Could I/O at a inocuous location (a well-choosen PCI register ?) be enough
> for that ?
Install XFree86 4.0 on a matrox card. Enable pci retries in the config. Wave
large windows around while running a heavy graphical app.
Thats certainly enough to make several sound cards barf and sulk. The matrox
has a bencmarketing feature where they lock the pci bus to get better winbench
type numbers. They arent the only people who do it and thankfully you can turn
it off, but for this specific case its rather useful 8)