I have a question regdg do_nmi routine in x86; what does location 0x61
from inb(0x61) do? Is it something very well known in intel archs?
Kiran
On Sat, 8 Jun 2002, Ravikiran G Thirumalai wrote:
| I have a question regdg do_nmi routine in x86; what does location 0x61
| from inb(0x61) do? Is it something very well known in intel archs?
Yes, see any Intel PIIX or ICH chipset spec.
I'm looking at the 82801BA I/O Controller Hub 2 (ICH2)
spec., section 9.7.1.
Port 0x61 is the NMI status and control register.
--
~Randy
On Sat, Jun 08, 2002 at 03:01:13PM -0700, Randy Dunlap wrote:
> On Sat, 8 Jun 2002, Ravikiran G Thirumalai wrote:
> | I have a question regdg do_nmi routine in x86; what does location 0x61
> | from inb(0x61) do? Is it something very well known in intel archs?
> Port 0x61 is the NMI status and control register.
So it should exist a '#define' for this somewhere.
People who tend to disagree here, may try to use *.i files
instead of *.c and *.h files next time.
The IRQ-handling code is full of these beauties and several
drivers are too.
Regards
Ingo Oeser
--
Science is what we can tell a computer. Art is everything else. --- D.E.Knuth
On Wed, 12 Jun 2002, Ingo Oeser wrote:
> > Port 0x61 is the NMI status and control register.
>
> So it should exist a '#define' for this somewhere.
>
> People who tend to disagree here, may try to use *.i files
> instead of *.c and *.h files next time.
Feel free to submit a patch.
--
+ Maciej W. Rozycki, Technical University of Gdansk, Poland +
+--------------------------------------------------------------+
+ e-mail: [email protected], PGP key available +
On Wed, 12 Jun 2002, Maciej W. Rozycki wrote:
| On Wed, 12 Jun 2002, Ingo Oeser wrote:
|
| > > Port 0x61 is the NMI status and control register.
| >
| > So it should exist a '#define' for this somewhere.
| >
| > People who tend to disagree here, may try to use *.i files
| > instead of *.c and *.h files next time.
|
| Feel free to submit a patch.
I say "please submit a patch."
I very much dislike such inline constants
(for register offsets and register bits).
--
~Randy