2002-08-09 08:44:44

by David Bronaugh

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Subject: Patch to enable K6-2 and K6-3 processor optimizations

Hi,

This is my first kernel patch, so please go easy on me :)

What it does is conditionally enable -march=k6-2 and -march=k6-3, and provide options for each in the Processor Type and Features menu.

This is conditional on the compiler supporting it; as of this writing only GCC 3.1 does. I compiled this kernel successfully with this patch on my K6-III and am presently running this kernel.

It also enables 3DNow in the case of the K6-III; I wasn't sure if 3DNow might imply the extended Athlon 3DNow instructions, so I only enabled it for the K6-III, which I know supports it.

Anyhow, that's all.

David Bronaugh

ps: This is pretty trivial to apply for other CPUs too; as I understand it several different CPU types gained their own architecture strings with GCC 3.1


2002-08-09 09:07:33

by Alan

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Subject: Re: Patch to enable K6-2 and K6-3 processor optimizations

We can't actually use MMX/FPU instructions in the kernel in the general
case. That would require saving and restoring the user process floating
point state - which is extremely expensive

2002-08-09 16:41:48

by Josh McKinney

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Subject: Re: Patch to enable K6-2 and K6-3 processor optimizations

On approximately Fri, Aug 09, 2002 at 01:48:40AM -0700, David Bronaugh wrote:
> Hi,
>
> This is my first kernel patch, so please go easy on me :)
>
> What it does is conditionally enable -march=k6-2 and -march=k6-3, and provide options for each in the Processor Type and Features menu.
>

Alan and/or Luca Barbiera,

Could we get this stuff into 2.4-ac at least? Luca, if you could backport your 2.5 patch that
would be great. I have attempted to but there is just to many things changed between 2.4 and
2.5 for me to feel comfortable with.

Thanks,
Josh McKinney

2002-08-09 17:25:24

by David Bronaugh

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Subject: Re: Patch to enable K6-2 and K6-3 processor optimizations

On 09 Aug 2002 11:31:19 +0100
Alan Cox <[email protected]> wrote:

> We can't actually use MMX/FPU instructions in the kernel in the general
> case. That would require saving and restoring the user process floating
> point state - which is extremely expensive

Yes, but that's not all that was implemented here.

>From the GCC 3.1 changelog:

# Prefetch support has been added to the Pentium III, Pentium 4, K6-2, K6-3, and Athlon series.

That's (as I understand it) independent from the floating point instructions.

Also, as a general point (IMO), targeting as specifically as possible (ie, K6-2 or K6-III rather than just K6) will most probably produce the best code for the processor. This also allows for later generations of compilers to make other optimizations and the kernel to take advantage of them.

David Bronaugh