On Mon, Aug 12, 2002 at 12:21:58PM -0700, dhinds wrote:
> On Mon, Aug 12, 2002 at 11:29:11AM -0700, H. J. Lu wrote:
> >
> > > what does "positive decode" mean in this context? Does the bridge
> > > somehow figure out that if no other device claims a transaction, that
> > > it should do so?
> >
> > I am not a PCI expert. As I understand, if a PCI bridge does negative
> > decode, you don't need to do it for the CardBus bride behind it. I
> > guess it is only needed for positive decode. For some reason, a PCI
> > bridge with positive decode may pass address to the CardBus bridge
> > behind it or the CardBus bridge has some back door to the PCI bus.
>
> I pulled up the datasheet for this chip and now I think maybe I
> understand what's going on.
>
> It says that the PCI-to-PCI bridge function in this chip forwards all
> transactions to the external PCI bus. The bridge windows determine
> ranges of addresses which it may claim back as a target, in this case
> I guess just for the LAN function, which is the only integrated device
> on bus 2.
>
> So this actually seems to be effectively a transparent bridge.
>
How about this pacth? It works for me.
H.J.