On Fri, Jun 27, 2003 at 04:43:13PM +0000, Linux Kernel Mailing List wrote:
> ChangeSet 1.1490.1.28, 2003/06/27 09:43:13-07:00, [email protected]
>
> [PATCH] remove IO APIC newline
>
> This patch is to 2.5.73-bk4 and is purely cosmetic. Please apply.
> It removes the blank line after "testing the IO APIC....":
Personally the IO-APIC gunk is gunk that should be hidden behind
DPRINTK... SMP machines spam dmesg _way_ too much. Especially once you
get above 4 processors.
Jeff
On Fri, 27 Jun 2003 14:41:11 -0400
Jeff Garzik <[email protected]> wrote:
> Personally the IO-APIC gunk is gunk that should be hidden behind
> DPRINTK... SMP machines spam dmesg _way_ too much. Especially once you
> get above 4 processors.
I did a patch wich makes dmesg output of SMP machines better. Well, it doesn't
adds or removes any line; but it says "CPUX:". The patch ugly, basically
it adds smp_processor_id() output in every printk i found. I did it because
IMHO messages like "Intel machine check architecture supported" in a SMP machine
are ugly. I'd found it specially nice for big SMP boxes because this does dmesg
easily grep'able.
-Initializing CPU#0
+CPU0: Initializing
[...]
-Calibrating delay loop... 1602.35 BogoMIPS
+CPU0: Calibrating delay loop... 1602.35 BogoMIPS
[...]
-CPU: L1 I cache: 16K, L1 D cache: 16K
-CPU: L2 cache: 256K
-CPU: After generic, caps: 0383fbff 00000000 00000000 00000040
-Intel machine check architecture supported.
-Intel machine check reporting enabled on CPU#0.
-Enabling fast FPU save and restore... done.
-Enabling unmasked SIMD FPU exception support... done.
-Checking 'hlt' instruction... OK.
+CPU0: L1 I cache: 16K, L1 D cache: 16K
+CPU0: L2 cache: 256K
+CPU0: After generic, caps: 0383fbff 00000000 00000000 00000040
+CPU0: Intel machine check architecture supported.
+CPU0: Intel machine check reporting enabled.
+CPU0: Enabling fast FPU save and restore... done.
+CPU0: Enabling unmasked SIMD FPU exception support... done.
+CPU0: Checking 'hlt' instruction... OK.
[...]
-enabled ExtINT on CPU#0
-ESR value before enabling vector: 00000000
-ESR value after enabling vector: 00000000
+CPU0: enabled ExtINT.
+CPU0: ESR value before enabling vector: 00000000
+CPU0: ESR value after enabling vector: 00000000
[...]
-Initializing CPU#1
-masked ExtINT on CPU#1
-ESR value before enabling vector: 00000000
-ESR value after enabling vector: 00000000
-Calibrating delay loop... 1605.63 BogoMIPS
-CPU: L1 I cache: 16K, L1 D cache: 16K
-CPU: L2 cache: 256K
-CPU: After generic, caps: 0383fbff 00000000 00000000 00000040
-Intel machine check architecture supported.
-Intel machine check reporting enabled on CPU#1.
+CPU1: Initializing
+CPU1: masked ExtINT.
+CPU1: ESR value before enabling vector: 00000000
+CPU1: ESR value after enabling vector: 00000000
+CPU1: Calibrating delay loop... 1605.63 BogoMIPS
+CPU1: L1 I cache: 16K, L1 D cache: 16K
+CPU1: L2 cache: 256K
+CPU1: After generic, caps: 0383fbff 00000000 00000000 00000040
+CPU1: Intel machine check architecture supported.
+CPU1: Intel machine check reporting enabled.
[...]
-Enabling SEP on CPU 1
-Enabling SEP on CPU 0
+CPU1: Enabling SEP
+CPU0: Enabling SEP
On Fri, 2003-06-27 at 20:57, Diego Calleja Garc?a wrote:
> I did a patch wich makes dmesg output of SMP machines better. Well, it doesn't
> adds or removes any line; but it says "CPUX:". The patch ugly, basically
> it adds smp_processor_id() output in every printk i found. I did it because
> IMHO messages like "Intel machine check architecture supported" in a SMP machine
> are ugly. I'd found it specially nice for big SMP boxes because this does dmesg
> easily grep'able.
>
>
> -Initializing CPU#0
> +CPU0: Initializing
> [...]
> -Calibrating delay loop... 1602.35 BogoMIPS
> +CPU0: Calibrating delay loop... 1602.35 BogoMIPS
> [...]
Wont it be more consistant to rather use CPU#0, CPU#1, etc ?
Regards,
--
Martin Schlemmer
El 01 Jul 2003 08:03:04 +0200 Martin Schlemmer <[email protected]>
escribi?:
> Wont it be more consistant to rather use CPU#0, CPU#1, etc ?
Probably. I though nobody would mind it...attached a version with CPU#X.
On Tue, 2003-07-01 at 22:13, Diego Calleja Garc?a wrote:
> El 01 Jul 2003 08:03:04 +0200 Martin Schlemmer <[email protected]>
> escribi?:
>
> > Wont it be more consistant to rather use CPU#0, CPU#1, etc ?
>
> Probably. I though nobody would mind it...attached a version with CPU#X.
Looks cleaner for all its worth.
Regards,
--
Martin Schlemmer