I've been reading x86 interrupt handling code for a couple of days
and encountered something which I believe is a race condition. It's
betweewn include/asm-i386/hardirq.h:irq_enter() and
arch/i386/kernel/irq.c:get_irqlock(). Lockless synchronization using
memory ordering seems to be used to achieve global irq locking.
in get_irqlock()
static inline void irq_enter(int cpu, int irq)
{
++local_irq_count(cpu);
while (test_bit(0,&global_irq_lock)) {
cpu_relax();
}
}