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Hi,
Thanks to the info Brian provided, I was able to set up the 4 ports of the
sil3114.
Attached is the patch for sata_sil.c, tested on a 2.6.1-rc1-mm1 and tested by
Brian too.
I used
if (ent->driver_data == sil_3114) { ... }
to ensure the 4 ports are probed only for sil3114 , I am not sure this is the
correct way to do it (so that sil3112 support is not broken). I guess Jeff
will review that :)
Cheers,
Mik
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On Sun, Jan 04, 2004 at 02:12:56PM +0100, Mickael Marchand wrote:
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>
> Hi,
>
> Thanks to the info Brian provided, I was able to set up the 4 ports of the
> sil3114.
> Attached is the patch for sata_sil.c, tested on a 2.6.1-rc1-mm1 and tested by
> Brian too.
>
> I used
> if (ent->driver_data == sil_3114) { ... }
>
> to ensure the 4 ports are probed only for sil3114 , I am not sure this is the
> correct way to do it (so that sil3112 support is not broken). I guess Jeff
> will review that :)
Yeah, your patch looks good. I assume you tested ports 3 and 4?
Jeff
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Le Sunday 04 January 2004 20:20, vous avez ?crit :
> On Sun, Jan 04, 2004 at 02:12:56PM +0100, Mickael Marchand wrote:
> > -----BEGIN PGP SIGNED MESSAGE-----
> > Hash: SHA1
> >
> > Hi,
> >
> > Thanks to the info Brian provided, I was able to set up the 4 ports of
> > the sil3114.
> > Attached is the patch for sata_sil.c, tested on a 2.6.1-rc1-mm1 and
> > tested by Brian too.
> >
> > I used
> > if (ent->driver_data == sil_3114) { ... }
> >
> > to ensure the 4 ports are probed only for sil3114 , I am not sure this is
> > the correct way to do it (so that sil3112 support is not broken). I guess
> > Jeff will review that :)
>
> Yeah, your patch looks good. I assume you tested ports 3 and 4?
Brian tested them yes.
on my (remote) box, the ports appears in dmesg but have no disks connected.
Brian confirmed he can use his 4 drives with the patch.
Cheers,
Mik
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diff -Nru a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
--- a/drivers/scsi/sata_sil.c Tue Jan 6 04:29:01 2004
+++ b/drivers/scsi/sata_sil.c Tue Jan 6 04:29:01 2004
@@ -34,11 +34,16 @@
#include "hosts.h"
#include <linux/libata.h>
-#define DRV_NAME "ata_sil"
-#define DRV_VERSION "0.51"
+#define DRV_NAME "sata_sil"
+#define DRV_VERSION "0.52"
enum {
sil_3112 = 0,
+ sil_3114 = 1,
+
+ SIL_SYSCFG = 0x48,
+ SIL_MASK_IDE0_INT = (1 << 22),
+ SIL_MASK_IDE1_INT = (1 << 23),
SIL_IDE0_TF = 0x80,
SIL_IDE0_CTL = 0x8A,
@@ -49,6 +54,16 @@
SIL_IDE1_CTL = 0xCA,
SIL_IDE1_BMDMA = 0x08,
SIL_IDE1_SCR = 0x180,
+
+ SIL_IDE2_TF = 0x280,
+ SIL_IDE2_CTL = 0x28A,
+ SIL_IDE2_BMDMA = 0x200,
+ SIL_IDE2_SCR = 0x300,
+
+ SIL_IDE3_TF = 0x2C0,
+ SIL_IDE3_CTL = 0x2CA,
+ SIL_IDE3_BMDMA = 0x208,
+ SIL_IDE3_SCR = 0x380,
};
static void sil_set_piomode (struct ata_port *ap, struct ata_device *adev,
@@ -62,6 +77,8 @@
static struct pci_device_id sil_pci_tbl[] = {
{ 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
+ { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
+ { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 },
{ } /* terminate list */
};
@@ -120,6 +137,14 @@
.pio_mask = 0x03, /* pio3-4 */
.udma_mask = 0x7f, /* udma0-6; FIXME */
.port_ops = &sil_ops,
+ }, /* sil_3114 */
+ {
+ .sht = &sil_sht,
+ .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
+ ATA_FLAG_SRST | ATA_FLAG_MMIO,
+ .pio_mask = 0x03, /* pio3-4 */
+ .udma_mask = 0x7f, /* udma0-6; FIXME */
+ .port_ops = &sil_ops,
},
};
@@ -236,6 +261,7 @@
unsigned long base;
void *mmio_base;
int rc;
+ u32 tmp;
if (!printed_version++)
printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
@@ -267,7 +293,7 @@
probe_ent->pdev = pdev;
probe_ent->port_ops = sil_port_info[ent->driver_data].port_ops;
probe_ent->sht = sil_port_info[ent->driver_data].sht;
- probe_ent->n_ports = 2;
+ probe_ent->n_ports = (ent->driver_data == sil_3114) ? 4 : 2;
probe_ent->pio_mask = sil_port_info[ent->driver_data].pio_mask;
probe_ent->udma_mask = sil_port_info[ent->driver_data].udma_mask;
probe_ent->irq = pdev->irq;
@@ -295,6 +321,28 @@
probe_ent->port[1].bmdma_addr = base + SIL_IDE1_BMDMA;
probe_ent->port[1].scr_addr = base + SIL_IDE1_SCR;
ata_std_ports(&probe_ent->port[1]);
+
+ /* make sure IDE0/1 interrupts are not masked */
+ tmp = readl(mmio_base + SIL_SYSCFG);
+ if (tmp & (SIL_MASK_IDE0_INT | SIL_MASK_IDE1_INT)) {
+ tmp &= ~(SIL_MASK_IDE0_INT | SIL_MASK_IDE1_INT);
+ writel(tmp, mmio_base + SIL_SYSCFG);
+ readl(mmio_base + SIL_SYSCFG); /* flush */
+ }
+
+ if (ent->driver_data == sil_3114) {
+ probe_ent->port[2].cmd_addr = base + SIL_IDE2_TF;
+ probe_ent->port[2].ctl_addr = base + SIL_IDE2_CTL;
+ probe_ent->port[2].bmdma_addr = base + SIL_IDE2_BMDMA;
+ probe_ent->port[2].scr_addr = base + SIL_IDE2_SCR;
+ ata_std_ports(&probe_ent->port[2]);
+
+ probe_ent->port[3].cmd_addr = base + SIL_IDE3_TF;
+ probe_ent->port[3].ctl_addr = base + SIL_IDE3_CTL;
+ probe_ent->port[3].bmdma_addr = base + SIL_IDE3_BMDMA;
+ probe_ent->port[3].scr_addr = base + SIL_IDE3_SCR;
+ ata_std_ports(&probe_ent->port[3]);
+ }
pci_set_master(pdev);
diff -Nru a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c
--- a/drivers/scsi/sata_svw.c Tue Jan 6 04:29:01 2004
+++ b/drivers/scsi/sata_svw.c Tue Jan 6 04:29:01 2004
@@ -43,7 +43,7 @@
#include <asm/pci-bridge.h>
#endif /* CONFIG_ALL_PPC */
-#define DRV_NAME "ata_k2"
+#define DRV_NAME "sata_svw"
#define DRV_VERSION "1.03"
Hi Jeff and others,
On the topic of Silicon Image SATA support, how do things look for
supporting the SiI 3512? This chip seems to be pretty common on
Nforce3 boards.
I had a look on the SiI web site and they say the programming
interface is very close to the 3112. Unfortunately their data sheets
don't seem to be freely available so I can't tell how close the
interface really is (or do the work to add 3512 support myself).
Thanks,
Roland