2004-04-07 07:17:46

by Richard James

[permalink] [raw]
Subject: Updated Ross Dickson C1Halt patch for 2.6.5

--- process.c.origional 2004-04-06 19:14:01.000000000 +1000
+++ process.c 2004-04-06 19:13:44.000000000 +1000
@@ -50,6 +50,7 @@
#include <asm/math_emu.h>
#endif

+#include <asm/apic.h>
#include <linux/irq.h>
#include <linux/err.h>

@@ -88,7 +89,7 @@ EXPORT_SYMBOL(enable_hlt);
* We use this if we don't have any better
* idle routine..
*/
-void default_idle(void)
+static void default_idle(void)
{
if (!hlt_counter && current_cpu_data.hlt_works_ok) {
local_irq_disable();
@@ -99,6 +100,28 @@ void default_idle(void)
}
}

+ /*
+ * We use this to avoid nforce2 lockups
+ * Reduces frequency of C1 disconnects
+ */
+static void c1halt_idle(void)
+{
+ if (!hlt_counter && current_cpu_data.hlt_works_ok) {
+ local_irq_disable();
+ /* only hlt disconnect if more than 1.6% of apic interval remains */
+ if( (!need_resched()) &&
+ (apic_read(APIC_TMCCT) > (apic_read(APIC_TMICT)>>6))) {
+ ndelay(600); /* helps nforce2 but adds 0.6us hard int latency */
+ safe_halt(); /* nothing better to do until we wake up */
+ }
+ else
+ local_irq_enable();
+ }
+}
+
+
+
+
/*
* On SMP it's slightly faster (but much more power-consuming!)
* to poll the ->work.need_resched flag instead of waiting for the
@@ -137,16 +160,14 @@ static void poll_idle (void)
* low exit latency (ie sit in a loop waiting for
* somebody to say that they'd like to reschedule)
*/
+static void (*idle)(void);
void cpu_idle (void)
{
/* endless idle loop with no priority at all */
while (1) {
while (!need_resched()) {
- void (*idle)(void) = pm_idle;
-
if (!idle)
- idle = default_idle;
-
+ idle = pm_idle ? pm_idle : default_idle;
irq_stat[smp_processor_id()].idle_timestamp = jiffies;
idle();
}
@@ -201,10 +222,13 @@ static int __init idle_setup (char *str)
{
if (!strncmp(str, "poll", 4)) {
printk("using polling idle threads.\n");
- pm_idle = poll_idle;
+ idle = poll_idle;
} else if (!strncmp(str, "halt", 4)) {
printk("using halt in idle threads.\n");
- pm_idle = default_idle;
+ idle = default_idle;
+ } else if (!strncmp(str, "C1halt", 6)) {
+ printk("using C1 halt disconnect friendly idle threads.\n");
+ idle = c1halt_idle;
}

return 1;


Attachments:
nforce2-idleC1halt-rd-2.6.5.patch (2.16 kB)

2004-04-07 16:55:27

by Ross Dickson

[permalink] [raw]
Subject: Re: Updated Ross Dickson C1Halt patch for 2.6.5

Richard James wrote

> This patch works against kernel 2.6.5 as it did for 2.6.3. If you try
> and turn APIC off in settings then the kernel will crash at compile
> because of his C1halt function. I'm not sure how to fix that. I forgot
> to record the compile error as well. To use it you need to send
> idle=C1patch to the kernel at boot and their needs to be a way so that
> you can instead select this from the config menu and toggle it on and
> off with the APIC controls.

> Richard James :)

Glad the patch has worked for you also. Thanks for the rediff.
I still have no explanation from Nvidia or Amd as to what is going
on or why.

Agreed it is time to clean the patch up. Enough people have had good
success with.

I personally am happy without a config item for the patch invoking as
bioses get updated and such updates may (should?!) remove the need for
this workaround. The "idle=C1halt" provides a boot time means of turning
it off. Perhaps a config item to change the idle preselected for boot
with no kernel "idle=" arg would be handy.

I note there is talk on the list of runtime idle control. I think it is useful
for this patch to be integrated with such a system as it eases up on the
C1 Athlon headbanging rate. There is a recent posting stating that
the idle call rate can be 3800Hz!! on audio playback.
http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-04/1516.html

Nobody has used patch for K8 that I know of, but is has been used on
both nforce2 and SIS740 to fix hard lockups.

I still mainly work with 2.4 series and have not worked with the
2.6 kernel config. I have also not yet downloaded 2.6.5.

Any takers?
Changes something like (please fix the indenting)

<snip>
+#if defined(CONFIG_X86_UP_APIC)
+#include <asm/apic.h>
+#endif

<snip>
Note I have not tested the following particularly if kernel is
compiled with apic in and booted with "nolapic".

+ /*
+ * We use this to avoid nforce2 lockups
+ * Reduces frequency of C1 disconnects
+ */
+static void c1halt_idle(void)
+{
+ if (!hlt_counter && current_cpu_data.hlt_works_ok) {
+ local_irq_disable();
+#if defined(CONFIG_X86_UP_APIC)
+ /* only hlt disconnect if more than 1.6% of apic interval remains */
+ if( !need_resched() && (enable_local_apic < 0 ||
+ (apic_read(APIC_TMCCT) > (apic_read(APIC_TMICT)>>6))) ) {
+#else
+ /* just adds a little delay to assist in back to back disconnects */
+ if( !need_resched() ) {
+#endif
+ ndelay(600); /* helps nforce2 but adds 0.6us hard int latency */
+ safe_halt(); /* nothing better to do until we wake up */
+ }
+ else
+ local_irq_enable();
+ }
+}
+
+
<snip>
We have to drop the extra static I added to the default idle function
as it upsets APM which needs it public.
To do this just drop this part of the patch.

@@ -88,7 +89,7 @@ EXPORT_SYMBOL(enable_hlt);
* We use this if we don't have any better
* idle routine..
*/
-void default_idle(void)
+static void default_idle(void)
{
if (!hlt_counter && current_cpu_data.hlt_works_ok) {
local_irq_disable();
<snip>

Thanks all.
Ross.








2004-04-10 20:05:45

by Alex Davis

[permalink] [raw]
Subject: Re: Updated Ross Dickson C1Halt patch for 2.6.5

I just want to say your updated C1 patch works for me.

A little history.
I got an ASUS A7N8X-X motherboard with a XP 3200+ CPU. For 3 days
the system worked fine with vanilla Linux 2.6.3 (no apic patch).
My workload consisted of web surfing and hacking. I built Xfree86
from source. No problems. Then I added an Adaptec 2940UW and a DAT
tape unit for backups. About 10-15 minutes into a backup, the system
would freeze. The freeze was 100% reproducible: I tried 6-7 times.
I then upgraded to 2.6.5, applied your patch, and rebooted. I then
tried to do a backup: FREEZE!! What tha.....??? Ah, forgot to supply
idle=C1halt to the kernel. Supplied it, and did a backup: No freeze!!

Long story short, been running for two days, doing backups, etc. No freezes.

Here's my /proc/interrupts:

CPU0
0: 69486179 XT-PIC timer
1: 12748 IO-APIC-edge i8042
2: 0 XT-PIC cascade
8: 1 IO-APIC-edge rtc
9: 0 IO-APIC-level acpi
12: 493447 IO-APIC-edge i8042
14: 998896 IO-APIC-edge ide0
15: 22 IO-APIC-edge ide1
16: 785983 IO-APIC-level aic7xxx, ehci_hcd
19: 26985093 IO-APIC-level eth0, radeon@PCI:3:0:0
NMI: 0
LOC: 69486209
ERR: 0
MIS: 6

Thanks for your efforts.


-Alex

=====
I code, therefore I am

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