Hi,
I've just booted my new kernel, and I've noticed that my UARTs are now recognized
as XScale and not 16550A, and I could watch characters from parport0 line coming out
on monitor one after another, with 0.5 second spaces between them.
I'll try to dig up what bit 6 in IER does on this chip, but it seems like that it is
enabling some thing we do not want to have enabled... One thing which might make difference
is that I'm using serial console - but it worked without glitch before this change.
serio: i8042 KBD port at 0x60,0x64 irq 1
Serial: 8250/16550 driver $Revision: 1.90 $ 8 ports, IRQ sharing disabled
-ttyS0 at I/O 0x3f8 (irq = 4) is a XScale
-ttyS1 at I/O 0x2f8 (irq = 3) is a XScale
-ttyS0 at I/O 0x3f8 (irq = 4) is a XScale
-ttyS1 at I/O 0x2f8 (irq = 3) is a XScale
-ttyS0 at I/O 0x3f8 (irq = 4) is a XScale
-ttyS1 at I/O 0x2f8 (irq = 3) is a XScale
+ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
+ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
+ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
+ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
+ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
+ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
parport: PnPBIOS parport detected.
parport0: PC-style at 0x378 (0x778), irq 7, dma 3 [PCSPP,TRISTATE,COMPAT,EPP,ECP,DMA]
[email protected], 2005-03-04 21:19:20+00:00, [email protected].(none)
[ARM PATCH] 2472/1: Updates 8250.c to correctly detect XScale UARTs
Patch from George Joseph
Modifications to autoconfig_16550a to add a testcase
to detect XScale UARTS.
Signed-off-by: George Joseph
Signed-off-by: Russell King
0000:00:06.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8111 PCI (rev 07)
0000:00:07.0 ISA bridge: Advanced Micro Devices [AMD] AMD-8111 LPC (rev 05)
0000:00:07.1 IDE interface: Advanced Micro Devices [AMD] AMD-8111 IDE (rev 03)
0000:00:07.2 SMBus: Advanced Micro Devices [AMD] AMD-8111 SMBus 2.0 (rev 02)
0000:00:07.3 Bridge: Advanced Micro Devices [AMD] AMD-8111 ACPI (rev 05)
0000:00:07.5 Multimedia audio controller: Advanced Micro Devices [AMD] AMD-8111 AC97 Audio (rev 03)
0000:00:0a.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge (rev 12)
0000:00:0a.1 PIC: Advanced Micro Devices [AMD] AMD-8131 PCI-X APIC (rev 01)
0000:00:0b.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge (rev 12)
0000:00:0b.1 PIC: Advanced Micro Devices [AMD] AMD-8131 PCI-X APIC (rev 01)
0000:00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge
0000:00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge
0000:00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge
0000:00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge
0000:00:19.0 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge
0000:00:19.1 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge
0000:00:19.2 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge
0000:00:19.3 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge
0000:02:07.0 Multimedia controller: Philips Semiconductors SAA7146 (rev 01)
0000:02:08.0 Multimedia controller: Philips Semiconductors SAA7146 (rev 01)
0000:02:09.0 Ethernet controller: Broadcom Corporation NetXtreme BCM5703X Gigabit Ethernet (rev 02)
0000:03:00.0 USB Controller: Advanced Micro Devices [AMD] AMD-8111 USB (rev 0b)
0000:03:00.1 USB Controller: Advanced Micro Devices [AMD] AMD-8111 USB (rev 0b)
0000:03:0a.0 Multimedia video controller: Brooktree Corporation Bt878 Video Capture (rev 11)
0000:03:0a.1 Multimedia controller: Brooktree Corporation Bt878 Audio Capture (rev 11)
0000:03:0b.0 Unknown mass storage controller: Silicon Image, Inc. (formerly CMD Technology Inc) SiI 3114 [SATALink/SATARaid] Serial ATA Controller (rev 02)
0000:03:0c.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link)
0000:04:00.0 Host bridge: Advanced Micro Devices [AMD] AMD-8151 System Controller (rev 14)
0000:04:01.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8151 AGP Bridge (rev 14)
0000:05:00.0 VGA compatible controller: ATI Technologies Inc RV280 [Radeon 9200 SE] (rev 01)
0000:05:00.1 Display controller: ATI Technologies Inc RV280 [Radeon 9200 SE] (Secondary) (rev 01)
Petr Vandrovec
On Mon, Mar 07, 2005 at 06:45:06PM +0100, Petr Vandrovec wrote:
> Hi,
> I've just booted my new kernel, and I've noticed that my UARTs are now recognized
> as XScale and not 16550A, and I could watch characters from parport0 line coming out
> on monitor one after another, with 0.5 second spaces between them.
>
> I'll try to dig up what bit 6 in IER does on this chip, but it seems like that it is
> enabling some thing we do not want to have enabled... One thing which might make difference
> is that I'm using serial console - but it worked without glitch before this change.
Well, problem is not in bit 6 in IER, but in bit 6 in high divisor byte, as DLAB is set
to one from previous probe. This simple clear of LCR register fixes problem with (probably
all 16550A) chips being detected as XScale, and in addition to it it does not switch
my 115200Bd serial line to 7Bd mode (0x4001 divisor) anymore.
Thanks,
Petr Vandrovec
--- linux-2.6.11-c1994.dist/drivers/serial/8250.c 2005-03-07 17:22:21.000000000 +0100
+++ linux-2.6.11-c1994/drivers/serial/8250.c 2005-03-07 20:42:53.000000000 +0100
@@ -729,6 +729,7 @@
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
status2 = serial_in(up, UART_IIR) >> 5;
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
+ serial_outp(up, UART_LCR, 0);
DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
On Mon, Mar 07, 2005 at 08:56:54PM +0100, Petr Vandrovec wrote:
> Well, problem is not in bit 6 in IER, but in bit 6 in high divisor byte,
> as DLAB is set to one from previous probe. This simple clear of LCR
> register fixes problem with (probably all 16550A) chips being detected
> as XScale, and in addition to it it does not switch my 115200Bd serial
> line to 7Bd mode (0x4001 divisor) anymore.
Good catch, thanks. I'd preferably like to see Chris Wedgwood test this
before applying it - I'm sure it'll fix his problem as well, but I'd
like to be sure.
--- linux-2.6.11-c1994.dist/drivers/serial/8250.c 2005-03-07 17:22:21.000000000 +0100
+++ linux-2.6.11-c1994/drivers/serial/8250.c 2005-03-07 20:42:53.000000000 +0100
@@ -729,6 +729,7 @@
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
status2 = serial_in(up, UART_IIR) >> 5;
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
+ serial_outp(up, UART_LCR, 0);
DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
--
Russell King
Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/
maintainer of: 2.6 Serial core
Russell King <[email protected]> wrote:
>
> On Mon, Mar 07, 2005 at 08:56:54PM +0100, Petr Vandrovec wrote:
> > Well, problem is not in bit 6 in IER, but in bit 6 in high divisor byte,
> > as DLAB is set to one from previous probe. This simple clear of LCR
> > register fixes problem with (probably all 16550A) chips being detected
> > as XScale, and in addition to it it does not switch my 115200Bd serial
> > line to 7Bd mode (0x4001 divisor) anymore.
>
> Good catch, thanks. I'd preferably like to see Chris Wedgwood test this
> before applying it - I'm sure it'll fix his problem as well, but I'd
> like to be sure.
It fixes it on my box. Thanks, all.
On Mon, Mar 07, 2005 at 09:31:48PM +0000, Russell King wrote:
> Good catch, thanks. I'd preferably like to see Chris Wedgwood test
> this before applying it - I'm sure it'll fix his problem as well,
> but I'd like to be sure.
Yes, this appears to work correctly for me. I see it's merged so this
is just an ACK that it works, nobody actually has to do anything :-)
On Thu, Mar 10, 2005 at 01:05:06PM -0800, Chris Wedgwood wrote:
> On Mon, Mar 07, 2005 at 09:31:48PM +0000, Russell King wrote:
>
> > Good catch, thanks. I'd preferably like to see Chris Wedgwood test
> > this before applying it - I'm sure it'll fix his problem as well,
> > but I'd like to be sure.
>
> Yes, this appears to work correctly for me. I see it's merged so this
> is just an ACK that it works, nobody actually has to do anything :-)
Thanks for that Chris.
--
Russell King
Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/
maintainer of: 2.6 Serial core