andi,
I tried to lift apic id in LinuxBIOS for all cpus after 0x10.
When using MB with AMD8111, the jiffies was not moving. So it is
locked at calibrate_delay_direct...
but MB with Nvidia ck804, jiffies is moving.
If I don't change BSP apic id ( keep it to 0), It changes....
I have no idea how the jiffies changes, there is another thread change it....?
YH
Memory: 508000k/524288k available (3146k kernel code, 15900k reserved,
1160k data, 296k init)
calibrate_delay_direct i=0
calibrate_delay_direct start_jiffies=fffedb08
calibrate_delay_direct 1 jiffies=fffedb08
calibrate_delay_direct 1 jiffies=fffedb08
calibrate_delay_direct 1 jiffies=fffedb08
calibrate_delay_direct 1 jiffies=fffedb08
On Friday 28 October 2005 20:42, Yinghai Lu wrote:
> andi,
>
> I tried to lift apic id in LinuxBIOS for all cpus after 0x10.
>
> When using MB with AMD8111, the jiffies was not moving. So it is
> locked at calibrate_delay_direct...
Have you tried it with 2.6.14? It has some new code to handle
high apic ids better
> but MB with Nvidia ck804, jiffies is moving.
The timer is wired different on nvidia than on 8111. They can
go either through the 8259 or through the IOAPIC. There is still
some code that falls back to the 8259 if IOAPIC doesn't work,
which may make it appear working on Nvidia.
As a warning I'm about to remove that code so don't rely on it.
> If I don't change BSP apic id ( keep it to 0), It changes....
>
> I have no idea how the jiffies changes, there is another thread change it....?
They change when interrupt 0 fires. So it's probably misrouted
or similar.
-Andi
I have tried latest code..., except that, it works well.
YH
-----Original Message-----
From: Andi Kleen [mailto:[email protected]]
Sent: Friday, October 28, 2005 11:53 AM
To: Lu, Yinghai
Cc: [email protected]; [email protected];
[email protected]
Subject: Re: x86_64: calibrate_delay_direct and apic id lift for BSP
On Friday 28 October 2005 20:42, Yinghai Lu wrote:
> andi,
>
> I tried to lift apic id in LinuxBIOS for all cpus after 0x10.
>
> When using MB with AMD8111, the jiffies was not moving. So it is
> locked at calibrate_delay_direct...
Have you tried it with 2.6.14? It has some new code to handle
high apic ids better
> but MB with Nvidia ck804, jiffies is moving.
The timer is wired different on nvidia than on 8111. They can
go either through the 8259 or through the IOAPIC. There is still
some code that falls back to the 8259 if IOAPIC doesn't work,
which may make it appear working on Nvidia.
As a warning I'm about to remove that code so don't rely on it.
> If I don't change BSP apic id ( keep it to 0), It changes....
>
> I have no idea how the jiffies changes, there is another thread change
it....?
They change when interrupt 0 fires. So it's probably misrouted
or similar.
-Andi
I wonder if 8111 only support 4 bit apicid, so it can not send irq to
BSP at apic id 0x10....
YH
On 10/28/05, Lu, Yinghai <[email protected]> wrote:
> I have tried latest code..., except that, it works well.
>
> YH
>
> -----Original Message-----
> From: Andi Kleen [mailto:[email protected]]
> Sent: Friday, October 28, 2005 11:53 AM
> To: Lu, Yinghai
> Cc: [email protected]; [email protected];
> [email protected]
> Subject: Re: x86_64: calibrate_delay_direct and apic id lift for BSP
>
> On Friday 28 October 2005 20:42, Yinghai Lu wrote:
> > andi,
> >
> > I tried to lift apic id in LinuxBIOS for all cpus after 0x10.
> >
> > When using MB with AMD8111, the jiffies was not moving. So it is
> > locked at calibrate_delay_direct...
>
> Have you tried it with 2.6.14? It has some new code to handle
> high apic ids better
>
> > but MB with Nvidia ck804, jiffies is moving.
>
> The timer is wired different on nvidia than on 8111. They can
> go either through the 8259 or through the IOAPIC. There is still
> some code that falls back to the 8259 if IOAPIC doesn't work,
> which may make it appear working on Nvidia.
>
> As a warning I'm about to remove that code so don't rely on it.
>
> > If I don't change BSP apic id ( keep it to 0), It changes....
> >
> > I have no idea how the jiffies changes, there is another thread change
> it....?
>
> They change when interrupt 0 fires. So it's probably misrouted
> or similar.
>
>
> -Andi
>
>
> -
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>
On Friday 28 October 2005 22:19, Yinghai Lu wrote:
> I wonder if 8111 only support 4 bit apicid, so it can not send irq to
> BSP at apic id 0x10....
Well, you being at AMD are probably in a much better position to find
out than most other folks. Or try the datasheet from the website.
-Andi
On 10/28/05, Andi Kleen <[email protected]> wrote:
>
> They change when interrupt 0 fires. So it's probably misrouted
> or similar.
the problem fixed, on the AMD 8111 based MB, if lift the bsp apic id,
the LinuxBIOS need to set the dest processor apic id in the 8111 io
apic reg setup for IRQ0.
Thanks.
YH