What follows is a long sequence of mostly small patches to implement
PCI Error Recovery by adding notification callbacks to the PCI device
driver structure, implementing the recovery in 5 device drivers
(3 ethernet, two scsi drivers), and adding the actual error detection
and recovery code to the ppc64/powerpc arch tree.
Highlights:
-- Patches 1-14: Misc required ppc64/powerpc cleanup/bugfixes/restructuring
-- Patch 15: Overview documentation
-- Patch 16: changes to include/linux/pci.h
-- Patches 17-26: error detection and recovery for pSeries PCI bridge chips
-- Patchs 27-32: recovery patches for ethernet, scsi device drivers
-- Patches 33-42: More misc ppc64-specific changes
Signed-off-by: Linas Vepstas <[email protected]>
01-pci-dn-uniformization.patch
This patch changes the rtas_pci interface to use the new struct pci_dn
structure for two routines that work with pci device nodes.
This patch also does some minor janitorial work: it uses some handy macros
and cleans up some trailing whitespace in the affected file.
Signed-off-by: Linas Vepstas <[email protected]>
Index: linux-2.6.14-git3/arch/ppc64/kernel/eeh.c
===================================================================
--- linux-2.6.14-git3.orig/arch/ppc64/kernel/eeh.c 2005-10-31 11:59:11.879644789 -0600
+++ linux-2.6.14-git3/arch/ppc64/kernel/eeh.c 2005-10-31 12:01:21.403477910 -0600
@@ -71,10 +71,6 @@
* and sent out for processing.
*/
-/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
-#define BUID_HI(buid) ((buid) >> 32)
-#define BUID_LO(buid) ((buid) & 0xffffffff)
-
/* EEH event workqueue setup. */
static DEFINE_SPINLOCK(eeh_eventlist_lock);
LIST_HEAD(eeh_eventlist);
Index: linux-2.6.14-git3/include/asm-powerpc/ppc-pci.h
===================================================================
--- linux-2.6.14-git3.orig/include/asm-powerpc/ppc-pci.h 2005-10-31 11:59:11.880644649 -0600
+++ linux-2.6.14-git3/include/asm-powerpc/ppc-pci.h 2005-10-31 12:01:21.404477769 -0600
@@ -26,6 +26,10 @@
extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */
+/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
+#define BUID_HI(buid) ((buid) >> 32)
+#define BUID_LO(buid) ((buid) & 0xffffffff)
+
/* PCI device_node operations */
struct device_node;
typedef void *(*traverse_func)(struct device_node *me, void *data);
Index: linux-2.6.14-git3/arch/ppc64/kernel/rtas_pci.c
===================================================================
--- linux-2.6.14-git3.orig/arch/ppc64/kernel/rtas_pci.c 2005-10-31 11:59:11.879644789 -0600
+++ linux-2.6.14-git3/arch/ppc64/kernel/rtas_pci.c 2005-10-31 12:01:21.407477349 -0600
@@ -5,19 +5,19 @@
* Copyright (C) 2003 Anton Blanchard <[email protected]>, IBM
*
* RTAS specific routines for PCI.
- *
+ *
* Based on code from pci.c, chrp_pci.c and pSeries_pci.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
- *
+ *
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
- *
+ *
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -47,7 +47,7 @@
static int ibm_read_pci_config;
static int ibm_write_pci_config;
-static int config_access_valid(struct pci_dn *dn, int where)
+static inline int config_access_valid(struct pci_dn *dn, int where)
{
if (where < 256)
return 1;
@@ -72,16 +72,14 @@
return 0;
}
-static int rtas_read_config(struct device_node *dn, int where, int size, u32 *val)
+static int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
{
int returnval = -1;
unsigned long buid, addr;
int ret;
- struct pci_dn *pdn;
- if (!dn || !dn->data)
+ if (!pdn)
return PCIBIOS_DEVICE_NOT_FOUND;
- pdn = dn->data;
if (!config_access_valid(pdn, where))
return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -90,7 +88,7 @@
buid = pdn->phb->buid;
if (buid) {
ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
- addr, buid >> 32, buid & 0xffffffff, size);
+ addr, BUID_HI(buid), BUID_LO(buid), size);
} else {
ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
}
@@ -100,7 +98,7 @@
return PCIBIOS_DEVICE_NOT_FOUND;
if (returnval == EEH_IO_ERROR_VALUE(size) &&
- eeh_dn_check_failure (dn, NULL))
+ eeh_dn_check_failure (pdn->node, NULL))
return PCIBIOS_DEVICE_NOT_FOUND;
return PCIBIOS_SUCCESSFUL;
@@ -118,23 +116,23 @@
busdn = bus->sysdata; /* must be a phb */
/* Search only direct children of the bus */
- for (dn = busdn->child; dn; dn = dn->sibling)
- if (dn->data && PCI_DN(dn)->devfn == devfn
+ for (dn = busdn->child; dn; dn = dn->sibling) {
+ struct pci_dn *pdn = PCI_DN(dn);
+ if (pdn && pdn->devfn == devfn
&& of_device_available(dn))
- return rtas_read_config(dn, where, size, val);
+ return rtas_read_config(pdn, where, size, val);
+ }
return PCIBIOS_DEVICE_NOT_FOUND;
}
-int rtas_write_config(struct device_node *dn, int where, int size, u32 val)
+int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
{
unsigned long buid, addr;
int ret;
- struct pci_dn *pdn;
- if (!dn || !dn->data)
+ if (!pdn)
return PCIBIOS_DEVICE_NOT_FOUND;
- pdn = dn->data;
if (!config_access_valid(pdn, where))
return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -142,7 +140,8 @@
(pdn->devfn << 8) | (where & 0xff);
buid = pdn->phb->buid;
if (buid) {
- ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, buid >> 32, buid & 0xffffffff, size, (ulong) val);
+ ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
+ BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
} else {
ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
}
@@ -165,10 +164,12 @@
busdn = bus->sysdata; /* must be a phb */
/* Search only direct children of the bus */
- for (dn = busdn->child; dn; dn = dn->sibling)
- if (dn->data && PCI_DN(dn)->devfn == devfn
+ for (dn = busdn->child; dn; dn = dn->sibling) {
+ struct pci_dn *pdn = PCI_DN(dn);
+ if (pdn && pdn->devfn == devfn
&& of_device_available(dn))
- return rtas_write_config(dn, where, size, val);
+ return rtas_write_config(pdn, where, size, val);
+ }
return PCIBIOS_DEVICE_NOT_FOUND;
}
@@ -221,7 +222,7 @@
/* Python's register file is 1 MB in size. */
chip_regs = ioremap(reg_struct.address & ~(0xfffffUL), 0x100000);
- /*
+ /*
* Firmware doesn't always clear this bit which is critical
* for good performance - Anton
*/
@@ -292,7 +293,7 @@
if (bus_range == NULL || len < 2 * sizeof(int)) {
return 1;
}
-
+
phb->first_busno = bus_range[0];
phb->last_busno = bus_range[1];
On Thu, Nov 03, 2005 at 05:59:18PM -0600, Linas Vepstas wrote:
> What follows is a long sequence of mostly small patches to implement
> PCI Error Recovery by adding notification callbacks to the PCI device
> driver structure, implementing the recovery in 5 device drivers
> (3 ethernet, two scsi drivers), and adding the actual error detection
> and recovery code to the ppc64/powerpc arch tree.
>
> Highlights:
>
> -- Patches 1-14: Misc required ppc64/powerpc cleanup/bugfixes/restructuring
> -- Patch 15: Overview documentation
> -- Patch 16: changes to include/linux/pci.h
> -- Patches 17-26: error detection and recovery for pSeries PCI bridge chips
> -- Patchs 27-32: recovery patches for ethernet, scsi device drivers
> -- Patches 33-42: More misc ppc64-specific changes
Ok, so at first glance, I only need to pay attention to patches 15, 16,
and 27-32? If so, please send the ppc64 specific patches through the
ppc64 maintainers, and the rpaphp specific patches through that specific
maintainer. Then care to resend the 8 remaining patches to me, so I can
stage them in -mm for a while?
thanks,
greg k-h
Greg KH writes:
> Ok, so at first glance, I only need to pay attention to patches 15, 16,
> and 27-32? If so, please send the ppc64 specific patches through the
> ppc64 maintainers, and the rpaphp specific patches through that specific
> maintainer. Then care to resend the 8 remaining patches to me, so I can
> stage them in -mm for a while?
I'm happy to take care of the ppc64-specific patches.
I would *really* like to see 16 go to Linus as soon as possible, since
everything else depends on it, and since it has very little chance of
breaking any existing code. Would you be OK with sending 16 to Linus
within the next week?
Thanks,
Paul.
On Sat, Nov 05, 2005 at 11:08:17AM +1100, Paul Mackerras wrote:
> Greg KH writes:
>
> > Ok, so at first glance, I only need to pay attention to patches 15, 16,
> > and 27-32? If so, please send the ppc64 specific patches through the
> > ppc64 maintainers, and the rpaphp specific patches through that specific
> > maintainer. Then care to resend the 8 remaining patches to me, so I can
> > stage them in -mm for a while?
>
> I'm happy to take care of the ppc64-specific patches.
>
> I would *really* like to see 16 go to Linus as soon as possible, since
> everything else depends on it, and since it has very little chance of
> breaking any existing code. Would you be OK with sending 16 to Linus
> within the next week?
Can I take 15, 16, 27-32 now without the ppc64 patches dying without it?
thanks,
greg k-h
Greg KH writes:
> Can I take 15, 16, 27-32 now without the ppc64 patches dying without it?
Sorry, I'm having trouble parsing that. If you mean, will it break
ppc64 if you send those patches to Linus before the ppc64 bits get in,
the answer is no it won't, please send them on.
Thanks,
Paul.
On Sat, Nov 05, 2005 at 11:46:44AM +1100, Paul Mackerras wrote:
> Greg KH writes:
>
> > Can I take 15, 16, 27-32 now without the ppc64 patches dying without it?
>
> Sorry, I'm having trouble parsing that. If you mean, will it break
> ppc64 if you send those patches to Linus before the ppc64 bits get in,
> the answer is no it won't, please send them on.
Ok, I'll go look at them and see if they can be added to my tree for
testing in -mm before I'll send them to Linus.
thanks,
greg k-h