2006-01-04 23:41:37

by Greg KH

[permalink] [raw]
Subject: Clock going way too fast on 2.6.15 for amd64 processor

Hi,

I tried digging through the mess in
http://bugzilla.kernel.org/show_bug.cgi?id=3927
but got lost in a see of conflicting patches.

I too have a amd64 box that is showing that the clock is running way too
fast (feels about double speed, haven't checked for sure.) I'm running
it in 32bit mode for now, and the boot dmesg is below.

Any hints on patches that I should test out to try to track this down?
I haven't run any real old kernels on it to see if it is something new
(shows up on a 2.6.13 and 2.6.14 kernel too.)

thanks,

greg k-h


[4294667.296000] Linux version 2.6.15 (greg@blue) (gcc version 3.4.5 (Gentoo 3.4.5, ssp-3.4.5-1.0, pie-8.7.9)) #4 Wed Jan 4 17:55:00 PST 2006
[4294667.296000] BIOS-provided physical RAM map:
[4294667.296000] BIOS-e820: 0000000000000000 - 000000000009fc00 (usable)
[4294667.296000] BIOS-e820: 000000000009fc00 - 00000000000a0000 (reserved)
[4294667.296000] BIOS-e820: 00000000000e4000 - 0000000000100000 (reserved)
[4294667.296000] BIOS-e820: 0000000000100000 - 000000001bf40000 (usable)
[4294667.296000] BIOS-e820: 000000001bf40000 - 000000001bf50000 (ACPI data)
[4294667.296000] BIOS-e820: 000000001bf50000 - 000000001c000000 (ACPI NVS)
[4294667.296000] BIOS-e820: 000000001c000000 - 0000000020000000 (reserved)
[4294667.296000] BIOS-e820: 00000000fff80000 - 0000000100000000 (reserved)
[4294667.296000] 447MB LOWMEM available.
[4294667.296000] On node 0 totalpages: 114496
[4294667.296000] DMA zone: 4096 pages, LIFO batch:0
[4294667.296000] DMA32 zone: 0 pages, LIFO batch:0
[4294667.296000] Normal zone: 110400 pages, LIFO batch:31
[4294667.296000] HighMem zone: 0 pages, LIFO batch:0
[4294667.296000] DMI 2.3 present.
[4294667.296000] ACPI: RSDP (v000 MSI ) @ 0x000f8400
[4294667.296000] ACPI: RSDT (v001 MSI 1013 0x10262005 MSFT 0x00000097) @ 0x1bf40000
[4294667.296000] ACPI: FADT (v002 MSI 1013 0x10262005 MSFT 0x00000097) @ 0x1bf40200
[4294667.296000] ACPI: MADT (v001 MSI OEMAPIC 0x10262005 MSFT 0x00000097) @ 0x1bf40300
[4294667.296000] ACPI: WDRT (v001 MSI MSI_OEM 0x10262005 MSFT 0x00000097) @ 0x1bf40360
[4294667.296000] ACPI: MCFG (v001 MSI OEMMCFG 0x10262005 MSFT 0x00000097) @ 0x1bf403b0
[4294667.296000] ACPI: SSDT (v001 OEM_ID OEMTBLID 0x00000001 INTL 0x02002026) @ 0x1bf43700
[4294667.296000] ACPI: OEMB (v001 MSI MSI_OEM 0x10262005 MSFT 0x00000097) @ 0x1bf50040
[4294667.296000] ACPI: DSDT (v001 MSI 1013 0x10262005 INTL 0x02002026) @ 0x00000000
[4294667.296000] ACPI: Local APIC address 0xfee00000
[4294667.296000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
[4294667.296000] Processor #0 15:4 APIC version 16
[4294667.296000] ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0])
[4294667.296000] IOAPIC[0]: apic_id 1, version 33, address 0xfec00000, GSI 0-23
[4294667.296000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
[4294667.296000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 21 low level)
[4294667.296000] ACPI: IRQ0 used by override.
[4294667.296000] ACPI: IRQ2 used by override.
[4294667.296000] Enabling APIC mode: Flat. Using 1 I/O APICs
[4294667.296000] Using ACPI (MADT) for SMP configuration information
[4294667.296000] Allocating PCI resources starting at 30000000 (gap: 20000000:dff80000)
[4294667.296000] Built 1 zonelists
[4294667.296000] Kernel command line: root=/dev/hda2 resume=dev/hda3 vga=0x0305
[4294667.296000] mapped APIC to ffffd000 (fee00000)
[4294667.296000] mapped IOAPIC to ffffc000 (fec00000)
[4294667.296000] Initializing CPU#0
[4294667.296000] PID hash table entries: 2048 (order: 11, 32768 bytes)
[ 0.000000] Detected 1593.023 MHz processor.
[ 38.370159] Using tsc for high-res timesource
[ 38.370185] Console: colour dummy device 80x25
[ 38.370545] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 38.370860] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 38.379581] Memory: 450412k/457984k available (1926k kernel code, 7096k reserved, 715k data, 172k init, 0k highmem)
[ 38.379590] Checking if this processor honours the WP bit even in supervisor mode... Ok.
[ 38.439379] Calibrating delay using timer specific routine.. 3188.30 BogoMIPS (lpj=1594152)
[ 38.439419] Mount-cache hash table entries: 512
[ 38.439495] CPU: After generic identify, caps: 078bfbff e3d3fbff 00000000 00000000 00000001 00000000 00000001
[ 38.439501] CPU: After vendor identify, caps: 078bfbff e3d3fbff 00000000 00000000 00000001 00000000 00000001
[ 38.439508] CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
[ 38.439513] CPU: L2 Cache: 512K (64 bytes/line)
[ 38.439516] CPU: After all inits, caps: 078bfbff e3d3fbff 00000000 00000010 00000001 00000000 00000001
[ 38.439530] mtrr: v2.0 (20020519)
[ 38.439535] CPU: AMD Turion(tm) 64 Mobile Technology MT-28 stepping 02
[ 38.439541] Enabling fast FPU save and restore... done.
[ 38.439545] Enabling unmasked SIMD FPU exception support... done.
[ 38.439550] Checking 'hlt' instruction... OK.
[ 38.450674] ENABLING IO-APIC IRQs
[ 38.450861] ..TIMER: vector=0x31 apic1=0 pin1=2 apic2=-1 pin2=-1
[ 38.562406] NET: Registered protocol family 16
[ 38.562426] ACPI: bus type pci registered
[ 38.562818] PCI: PCI BIOS revision 2.10 entry at 0xf0031, last bus=1
[ 38.562824] PCI: Using MMCONFIG
[ 38.563232] ACPI: Subsystem revision 20050902
[ 38.567625] ACPI: Interpreter enabled
[ 38.567630] ACPI: Using IOAPIC for interrupt routing
[ 38.567888] ACPI: PCI Root Bridge [PCI0] (0000:00)
[ 38.567894] PCI: Probing PCI hardware (bus 00)
[ 38.568710] PCI: Scanning bus 0000:00
[ 38.568719] PCI: Found 0000:00:00.0 [1002/5950] 000600 00
[ 38.568730] PCI: Calling quirk c01e3800 for 0000:00:00.0
[ 38.568733] PCI: Calling quirk c026d830 for 0000:00:00.0
[ 38.568736] PCI: Calling quirk c026dc40 for 0000:00:00.0
[ 38.568745] PCI: Found 0000:00:01.0 [1002/5a3f] 000604 01
[ 38.568750] PCI: Calling quirk c01e3800 for 0000:00:01.0
[ 38.568753] PCI: Calling quirk c026d830 for 0000:00:01.0
[ 38.568755] PCI: Calling quirk c026dc40 for 0000:00:01.0
[ 38.568809] PCI: Found 0000:00:13.0 [1002/4374] 000c03 00
[ 38.568853] PCI: Calling quirk c01e3800 for 0000:00:13.0
[ 38.568855] PCI: Calling quirk c026d830 for 0000:00:13.0
[ 38.568857] PCI: Calling quirk c026dc40 for 0000:00:13.0
[ 38.568878] PCI: Found 0000:00:13.1 [1002/4375] 000c03 00
[ 38.568921] PCI: Calling quirk c01e3800 for 0000:00:13.1
[ 38.568924] PCI: Calling quirk c026d830 for 0000:00:13.1
[ 38.568926] PCI: Calling quirk c026dc40 for 0000:00:13.1
[ 38.568953] PCI: Found 0000:00:13.2 [1002/4373] 000c03 00
[ 38.568997] PCI: Calling quirk c01e3800 for 0000:00:13.2
[ 38.568999] PCI: Calling quirk c026d830 for 0000:00:13.2
[ 38.569002] PCI: Calling quirk c026dc40 for 0000:00:13.2
[ 38.569033] PCI: Found 0000:00:14.0 [1002/4372] 000c05 00
[ 38.569074] PCI: Calling quirk c01e3800 for 0000:00:14.0
[ 38.569076] PCI: Calling quirk c026d830 for 0000:00:14.0
[ 38.569078] PCI: Calling quirk c026dc40 for 0000:00:14.0
[ 38.569126] PCI: Found 0000:00:14.1 [1002/4376] 000101 00
[ 38.569168] PCI: Calling quirk c01e3800 for 0000:00:14.1
[ 38.569171] PCI: Ignoring BAR0-3 of IDE controller 0000:00:14.1
[ 38.569176] PCI: Calling quirk c026d830 for 0000:00:14.1
[ 38.569178] PCI: Calling quirk c026dc40 for 0000:00:14.1
[ 38.569192] PCI: Found 0000:00:14.3 [1002/4377] 000601 00
[ 38.569233] PCI: Calling quirk c01e3800 for 0000:00:14.3
[ 38.569236] PCI: Calling quirk c026d830 for 0000:00:14.3
[ 38.569238] PCI: Calling quirk c026dc40 for 0000:00:14.3
[ 38.569251] PCI: Found 0000:00:14.4 [1002/4371] 000604 01
[ 38.569267] PCI: Calling quirk c01e3800 for 0000:00:14.4
[ 38.569270] PCI: Calling quirk c026d830 for 0000:00:14.4
[ 38.569272] PCI: Calling quirk c026dc40 for 0000:00:14.4
[ 38.569294] PCI: Found 0000:00:14.5 [1002/4370] 000401 00
[ 38.569336] PCI: Calling quirk c01e3800 for 0000:00:14.5
[ 38.569339] PCI: Calling quirk c026d830 for 0000:00:14.5
[ 38.569341] PCI: Calling quirk c026dc40 for 0000:00:14.5
[ 38.569362] PCI: Found 0000:00:14.6 [1002/4378] 000703 00
[ 38.569405] PCI: Calling quirk c01e3800 for 0000:00:14.6
[ 38.569407] PCI: Calling quirk c026d830 for 0000:00:14.6
[ 38.569410] PCI: Calling quirk c026dc40 for 0000:00:14.6
[ 38.569425] PCI: Found 0000:00:18.0 [1022/1100] 000600 00
[ 38.569437] PCI: Calling quirk c01e3800 for 0000:00:18.0
[ 38.569440] PCI: Calling quirk c026d830 for 0000:00:18.0
[ 38.569442] PCI: Calling quirk c026dc40 for 0000:00:18.0
[ 38.569448] PCI: Found 0000:00:18.1 [1022/1101] 000600 00
[ 38.569460] PCI: Calling quirk c01e3800 for 0000:00:18.1
[ 38.569462] PCI: Calling quirk c026d830 for 0000:00:18.1
[ 38.569465] PCI: Calling quirk c026dc40 for 0000:00:18.1
[ 38.569471] PCI: Found 0000:00:18.2 [1022/1102] 000600 00
[ 38.569482] PCI: Calling quirk c01e3800 for 0000:00:18.2
[ 38.569485] PCI: Calling quirk c026d830 for 0000:00:18.2
[ 38.569487] PCI: Calling quirk c026dc40 for 0000:00:18.2
[ 38.569493] PCI: Found 0000:00:18.3 [1022/1103] 000600 00
[ 38.569505] PCI: Calling quirk c01e3800 for 0000:00:18.3
[ 38.569507] PCI: Calling quirk c026d830 for 0000:00:18.3
[ 38.569510] PCI: Calling quirk c026dc40 for 0000:00:18.3
[ 38.569527] PCI: Fixups for bus 0000:00
[ 38.569531] PCI: Scanning behind PCI bridge 0000:00:01.0, config 010100, pass 0
[ 38.569553] PCI: Scanning bus 0000:01
[ 38.569565] PCI: Found 0000:01:05.0 [1002/5955] 000300 00
[ 38.569575] PCI: Calling quirk c01e3800 for 0000:01:05.0
[ 38.569578] PCI: Calling quirk c026d830 for 0000:01:05.0
[ 38.569580] PCI: Calling quirk c026dc40 for 0000:01:05.0
[ 38.569584] Boot video device is 0000:01:05.0
[ 38.569605] PCI: Fixups for bus 0000:01
[ 38.569611] PCI: Bus scan for 0000:01 returning with max=01
[ 38.569617] PCI: Scanning behind PCI bridge 0000:00:14.4, config 030200, pass 0
[ 38.569637] PCI: Scanning bus 0000:02
[ 38.569669] PCI: Found 0000:02:03.0 [10ec/8139] 000200 00
[ 38.569725] PCI: Calling quirk c01e3800 for 0000:02:03.0
[ 38.569728] PCI: Calling quirk c026d830 for 0000:02:03.0
[ 38.569730] PCI: Calling quirk c026dc40 for 0000:02:03.0
[ 38.569760] PCI: Found 0000:02:05.0 [1217/7134] 000607 02
[ 38.569777] PCI: Calling quirk c01e3800 for 0000:02:05.0
[ 38.569779] PCI: Calling quirk c026d830 for 0000:02:05.0
[ 38.569782] PCI: Calling quirk c026dc40 for 0000:02:05.0
[ 38.569810] PCI: Found 0000:02:05.2 [1217/7120] 000805 00
[ 38.569867] PCI: Calling quirk c01e3800 for 0000:02:05.2
[ 38.569869] PCI: Calling quirk c026d830 for 0000:02:05.2
[ 38.569872] PCI: Calling quirk c026dc40 for 0000:02:05.2
[ 38.569898] PCI: Found 0000:02:05.3 [1217/7130] 000680 00
[ 38.569955] PCI: Calling quirk c01e3800 for 0000:02:05.3
[ 38.569958] PCI: Calling quirk c026d830 for 0000:02:05.3
[ 38.569960] PCI: Calling quirk c026dc40 for 0000:02:05.3
[ 38.569985] PCI: Found 0000:02:05.4 [1217/00f7] 000c00 00
[ 38.570040] PCI: Calling quirk c01e3800 for 0000:02:05.4
[ 38.570042] PCI: Calling quirk c026d830 for 0000:02:05.4
[ 38.570045] PCI: Calling quirk c026dc40 for 0000:02:05.4
[ 38.570112] PCI: Found 0000:02:09.0 [1814/0302] 000280 00
[ 38.570168] PCI: Calling quirk c01e3800 for 0000:02:09.0
[ 38.570170] PCI: Calling quirk c026d830 for 0000:02:09.0
[ 38.570173] PCI: Calling quirk c026dc40 for 0000:02:09.0
[ 38.570225] PCI: Fixups for bus 0000:02
[ 38.570227] PCI: Transparent bridge - 0000:00:14.4
[ 38.570247] PCI: Scanning behind PCI bridge 0000:02:05.0, config 030302, pass 0
[ 38.570263] PCI: Scanning behind PCI bridge 0000:02:05.0, config 030302, pass 1
[ 38.570294] PCI: Bus scan for 0000:02 returning with max=06
[ 38.570299] PCI: Scanning behind PCI bridge 0000:00:01.0, config 010100, pass 1
[ 38.570307] PCI: Scanning behind PCI bridge 0000:00:14.4, config 030200, pass 1
[ 38.570314] PCI: Bus scan for 0000:00 returning with max=06
[ 38.570321] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
[ 38.577689] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT]
[ 38.578407] ACPI: Embedded Controller [EC] (gpe 6)
[ 38.585036] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.POP2._PRT]
[ 38.587138] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 6 7 10 11 12 14 15) *0, disabled.
[ 38.587351] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 6 7 *10 11 12 14 15)
[ 38.587558] ACPI: PCI Interrupt Link [LNKC] (IRQs *5 6 7 10 11 12 14 15)
[ 38.587768] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 6 7 10 *11 12 14 15)
[ 38.587975] ACPI: PCI Interrupt Link [LNKE] (IRQs 5 6 7 10 11 12 14 15) *0, disabled.
[ 38.588215] ACPI: PCI Interrupt Link [LNKF] (IRQs 5 6 7 10 11 12 14 15) *0, disabled.
[ 38.588426] ACPI: PCI Interrupt Link [LNKG] (IRQs 5 6 *7 10 11 12 14 15)
[ 38.588633] ACPI: PCI Interrupt Link [LNKH] (IRQs 5 6 7 10 11 12 14 15) *0, disabled.
[ 38.588763] PCI: Using ACPI for IRQ routing
[ 38.588769] PCI: If a device doesn't work, try "pci=routeirq". If it helps, post a report
[ 38.592595] PCI: Device 0000:02:03.0 not found by BIOS
[ 38.592730] PCI: Device 0000:02:05.0 not found by BIOS
[ 38.592864] PCI: Device 0000:02:05.2 not found by BIOS
[ 38.592998] PCI: Device 0000:02:05.3 not found by BIOS
[ 38.593158] PCI: Device 0000:02:05.4 not found by BIOS
[ 38.593292] PCI: Device 0000:02:09.0 not found by BIOS
[ 38.593973] PCI: Bridge: 0000:00:01.0
[ 38.593979] IO window: d000-dfff
[ 38.593983] MEM window: fbe00000-fbefffff
[ 38.593987] PREFETCH window: f0000000-faffffff
[ 38.593995] got res [32000000:3200ffff] bus [32000000:3200ffff] flags 7200 for BAR 6 of 0000:02:03.0
[ 38.594001] got res [fbf00000:fbf00fff] bus [fbf00000:fbf00fff] flags 200 for BAR 0 of 0000:02:05.0
[ 38.594008] PCI: moved device 0000:02:05.0 resource 0 (200) to fbf00000
[ 38.594011] PCI: Bus 3, cardbus bridge: 0000:02:05.0
[ 38.594015] IO window: 0000e000-0000e0ff
[ 38.594019] IO window: 0000e400-0000e4ff
[ 38.594023] PREFETCH window: 30000000-31ffffff
[ 38.594027] MEM window: 34000000-35ffffff
[ 38.594030] PCI: Bridge: 0000:00:14.4
[ 38.594063] IO window: e000-efff
[ 38.594067] MEM window: fbf00000-fbffffff
[ 38.594071] PREFETCH window: 30000000-32ffffff
[ 38.594108] ACPI: PCI Interrupt 0000:02:05.0[A] -> GSI 19 (level, low) -> IRQ 16
[ 38.594593] Initializing Cryptographic API
[ 38.594600] io scheduler noop registered
[ 38.594608] io scheduler anticipatory registered
[ 38.594616] io scheduler deadline registered
[ 38.594632] io scheduler cfq registered
[ 38.594636] PCI: Calling quirk c01e36d0 for 0000:00:00.0
[ 38.594639] PCI: Calling quirk c0255f20 for 0000:00:00.0
[ 38.594642] PCI: Calling quirk c01e36d0 for 0000:00:01.0
[ 38.594645] PCI: Calling quirk c0255f20 for 0000:00:01.0
[ 38.594647] PCI: Calling quirk c01e36d0 for 0000:00:13.0
[ 38.594650] PCI: Calling quirk c0255f20 for 0000:00:13.0
[ 38.622002] PCI: Calling quirk c01e36d0 for 0000:00:13.1
[ 38.622005] PCI: Calling quirk c0255f20 for 0000:00:13.1
[ 38.637966] PCI: Calling quirk c01e36d0 for 0000:00:13.2
[ 38.637969] PCI: Calling quirk c0255f20 for 0000:00:13.2
[ 38.637982] PCI: Calling quirk c01e36d0 for 0000:00:14.0
[ 38.637985] PCI: Calling quirk c0255f20 for 0000:00:14.0
[ 38.637987] PCI: Calling quirk c01e36d0 for 0000:00:14.1
[ 38.637990] PCI: Calling quirk c0255f20 for 0000:00:14.1
[ 38.637993] PCI: Calling quirk c01e36d0 for 0000:00:14.3
[ 38.637995] PCI: Calling quirk c0255f20 for 0000:00:14.3
[ 38.637998] PCI: Calling quirk c01e36d0 for 0000:00:14.4
[ 38.638000] PCI: Calling quirk c0255f20 for 0000:00:14.4
[ 38.638003] PCI: Calling quirk c01e36d0 for 0000:00:14.5
[ 38.638005] PCI: Calling quirk c0255f20 for 0000:00:14.5
[ 38.638008] PCI: Calling quirk c01e36d0 for 0000:00:14.6
[ 38.638010] PCI: Calling quirk c0255f20 for 0000:00:14.6
[ 38.638013] PCI: Calling quirk c01e36d0 for 0000:00:18.0
[ 38.638015] PCI: Calling quirk c0255f20 for 0000:00:18.0
[ 38.638018] PCI: Calling quirk c01e36d0 for 0000:00:18.1
[ 38.638020] PCI: Calling quirk c0255f20 for 0000:00:18.1
[ 38.638023] PCI: Calling quirk c01e36d0 for 0000:00:18.2
[ 38.638025] PCI: Calling quirk c0255f20 for 0000:00:18.2
[ 38.638028] PCI: Calling quirk c01e36d0 for 0000:00:18.3
[ 38.638030] PCI: Calling quirk c0255f20 for 0000:00:18.3
[ 38.638033] PCI: Calling quirk c01e36d0 for 0000:01:05.0
[ 38.638035] PCI: Calling quirk c0255f20 for 0000:01:05.0
[ 38.638038] PCI: Calling quirk c01e36d0 for 0000:02:03.0
[ 38.638040] PCI: Calling quirk c0255f20 for 0000:02:03.0
[ 38.638043] PCI: Calling quirk c01e36d0 for 0000:02:05.0
[ 38.638046] PCI: Calling quirk c0255f20 for 0000:02:05.0
[ 38.638049] PCI: Calling quirk c01e36d0 for 0000:02:05.2
[ 38.638052] PCI: Calling quirk c0255f20 for 0000:02:05.2
[ 38.638054] PCI: Calling quirk c01e36d0 for 0000:02:05.3
[ 38.638057] PCI: Calling quirk c0255f20 for 0000:02:05.3
[ 38.638059] PCI: Calling quirk c01e36d0 for 0000:02:05.4
[ 38.638062] PCI: Calling quirk c0255f20 for 0000:02:05.4
[ 38.638064] PCI: Calling quirk c01e36d0 for 0000:02:09.0
[ 38.638067] PCI: Calling quirk c0255f20 for 0000:02:09.0
[ 38.638190] vesafb: framebuffer at 0xf0000000, mapped to 0xdc880000, using 1536k, total 65536k
[ 38.638198] vesafb: mode is 1024x768x8, linelength=1024, pages=84
[ 38.638202] vesafb: protected mode interface info at c000:52f9
[ 38.638206] vesafb: scrolling: redraw
[ 38.638210] vesafb: Pseudocolor: size=8:8:8:8, shift=0:0:0:0
[ 38.638214] vesafb: Mode is VGA compatible
[ 38.696032] Console: switching to colour frame buffer device 128x48
[ 38.696368] fb0: VESA VGA frame buffer device
[ 38.696663] ACPI: AC Adapter [ADP1] (on-line)
[ 38.708993] ACPI: Battery Slot [BAT1] (battery present)
[ 38.709293] ACPI: Power Button (FF) [PWRF]
[ 38.709526] ACPI: Lid Switch [LID0]
[ 38.709718] ACPI: Sleep Button (CM) [SLPB]
[ 38.709967] ACPI: Power Button (CM) [PWRB]
[ 38.710256] Using specific hotkey driver
[ 38.710594] ACPI: CPU0 (power states: C1[C1] C2[C2] C3[C3])
[ 38.714910] ACPI: Thermal Zone [THRM] (56 C)
[ 38.716160] Real Time Clock Driver v1.12
[ 38.716559] i8042.c: Detected active multiplexing controller, rev 1.1.
[ 38.716989] serio: i8042 AUX0 port at 0x60,0x64 irq 12
[ 38.717279] serio: i8042 AUX1 port at 0x60,0x64 irq 12
[ 38.717566] serio: i8042 AUX2 port at 0x60,0x64 irq 12
[ 38.717878] serio: i8042 AUX3 port at 0x60,0x64 irq 12
[ 38.718165] serio: i8042 KBD port at 0x60,0x64 irq 1
[ 38.718434] Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled
[ 38.727054] ACPI: PCI Interrupt 0000:00:14.6[B] -> GSI 17 (level, low) -> IRQ 17
[ 38.735493] ACPI: PCI interrupt for device 0000:00:14.6 disabled
[ 38.743918] Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
[ 38.752583] ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
[ 38.761578] ATIIXP: IDE controller at PCI slot 0000:00:14.1
[ 38.770636] ACPI: PCI Interrupt 0000:00:14.1[A] -> GSI 16 (level, low) -> IRQ 18
[ 38.779987] ATIIXP: chipset revision 0
[ 38.789297] ATIIXP: not 100% native mode: will probe irqs later
[ 38.798777] ide0: BM-DMA at 0xff00-0xff07, BIOS settings: hda:DMA, hdb:pio
[ 38.808522] ide1: BM-DMA at 0xff08-0xff0f, BIOS settings: hdc:DMA, hdd:pio
[ 38.818071] Probing IDE interface ide0...
[ 38.956719] hda: WDC WD800VE-00HDT0, ATA DISK drive
[ 39.276717] ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
[ 39.286101] Probing IDE interface ide1...
[ 39.632271] hdc: HL-DT-ST DVD-RW GWA-4082N, ATAPI CD/DVD-ROM drive
[ 39.798389] ide1 at 0x170-0x177,0x376 on irq 15
[ 39.808122] hda: max request size: 128KiB
[ 39.817771] hda: 156301488 sectors (80026 MB) w/8192KiB Cache, CHS=65535/16/63, UDMA(100)
[ 40.093036] hda: cache flushes supported
[ 40.102987] hda: hda1 hda2 hda3 hda4
[ 40.119459] mice: PS/2 mouse device common for all mice
[ 40.129169] ts: Compaq touchscreen protocol output
[ 40.138854] input: PC Speaker as /class/input/input0
[ 40.148665] NET: Registered protocol family 2
[ 40.167731] IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
[ 40.177777] TCP established hash table entries: 16384 (order: 4, 65536 bytes)
[ 40.187790] TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
[ 40.197793] TCP: Hash tables configured (established 16384 bind 16384)
[ 40.207816] TCP reno registered
[ 40.217744] TCP bic registered
[ 40.227581] Initializing IPsec netlink socket
[ 40.237540] NET: Registered protocol family 1
[ 40.247535] NET: Registered protocol family 17
[ 40.257501] NET: Registered protocol family 15
[ 40.267335] NET: Registered protocol family 8
[ 40.276973] NET: Registered protocol family 20
[ 40.286456] powernow-k8: Found 1 AMD Athlon 64 / Opteron processors (version 1.50.4)
[ 40.304425] powernow-k8: 0 : fid 0x0 (800 MHz), vid 0x14 (1050 mV)
[ 40.314211] powernow-k8: 1 : fid 0x8 (1600 MHz), vid 0xa (1300 mV)
[ 40.323841] cpu_init done, current fid 0x8, vid 0x8
[ 40.333766] powernow-k8: ph2 null fid transition 0x8
[ 40.343750] Using IPI Shortcut mode
[ 40.353853] swsusp: Resume From Partition dev/hda3
[ 40.353855] PM: Checking swsusp image.
[ 40.353862] swsusp: Error -6 check for resume file
[ 40.353864] PM: Resume from disk failed.
[ 40.353940] ACPI wakeup devices:
[ 40.363965] POP2 RTL USB1 USB2 EUSB AC97 MC97
[ 40.373998] ACPI: (supports S0 S1 S3 S4 S5)
[ 40.383841] BIOS EDD facility v0.16 2004-Jun-25, 1 devices found
[ 40.411188] kjournald starting. Commit interval 5 seconds
[ 40.420954] EXT3-fs: mounted filesystem with ordered data mode.
[ 40.430655] VFS: Mounted root (ext3 filesystem) readonly.
[ 40.440365] Freeing unused kernel memory: 172k freed
[ 40.635743] input: AT Translated Set 2 keyboard as /class/input/input1
[ 40.792065] logips2pp: Detected unknown logitech mouse model 99
[ 40.875046] input: ImPS/2 Logitech Wheel Mouse as /class/input/input2
[ 41.139612] logips2pp: Detected unknown logitech mouse model 99
[ 41.222576] input: ImPS/2 Logitech Wheel Mouse as /class/input/input3
[ 43.564568] Adding 1953496k swap on /dev/hda3. Priority:-1 extents:1 across:1953496k
[ 43.805920] EXT3 FS on hda2, internal journal
[ 44.424324] kjournald starting. Commit interval 5 seconds
[ 44.424577] EXT3 FS on hda4, internal journal
[ 44.424581] EXT3-fs: mounted filesystem with ordered data mode.
[ 44.499518] usbcore: registered new driver usbfs
[ 44.499538] usbcore: registered new driver hub


2006-01-04 23:54:49

by Oliver Neukum

[permalink] [raw]
Subject: Re: Clock going way too fast on 2.6.15 for amd64 processor

Am Donnerstag, 5. Januar 2006 00:39 schrieb Greg KH:
> Hi,
>
> I tried digging through the mess in
> http://bugzilla.kernel.org/show_bug.cgi?id=3927
> but got lost in a see of conflicting patches.
>
> I too have a amd64 box that is showing that the clock is running way too
> fast (feels about double speed, haven't checked for sure.) I'm running
> it in 32bit mode for now, and the boot dmesg is below.
>
> Any hints on patches that I should test out to try to track this down?
> I haven't run any real old kernels on it to see if it is something new
> (shows up on a 2.6.13 and 2.6.14 kernel too.)

Did you try "disable_timer_pin_1" on the kernel command line?

HTH
Oliver

2006-01-05 00:28:07

by Greg KH

[permalink] [raw]
Subject: Re: Clock going way too fast on 2.6.15 for amd64 processor

On Thu, Jan 05, 2006 at 12:54:45AM +0100, Oliver Neukum wrote:
> Am Donnerstag, 5. Januar 2006 00:39 schrieb Greg KH:
> > Hi,
> >
> > I tried digging through the mess in
> > http://bugzilla.kernel.org/show_bug.cgi?id=3927
> > but got lost in a see of conflicting patches.
> >
> > I too have a amd64 box that is showing that the clock is running way too
> > fast (feels about double speed, haven't checked for sure.) I'm running
> > it in 32bit mode for now, and the boot dmesg is below.
> >
> > Any hints on patches that I should test out to try to track this down?
> > I haven't run any real old kernels on it to see if it is something new
> > (shows up on a 2.6.13 and 2.6.14 kernel too.)
>
> Did you try "disable_timer_pin_1" on the kernel command line?

Nice, that worked just fine, no kernel patch needed. Thanks for
pointing it out to me, I totally missed it.

Now to go fix the usb irq "ignore" issue for this machine, and I'll be
able to switch to using it all the time...

greg k-h

2006-01-05 00:40:54

by Oliver Neukum

[permalink] [raw]
Subject: Re: Clock going way too fast on 2.6.15 for amd64 processor

Am Donnerstag, 5. Januar 2006 01:28 schrieb Greg KH:
> On Thu, Jan 05, 2006 at 12:54:45AM +0100, Oliver Neukum wrote:
> > Am Donnerstag, 5. Januar 2006 00:39 schrieb Greg KH:
> > > Hi,
> > >
> > > I tried digging through the mess in
> > > http://bugzilla.kernel.org/show_bug.cgi?id=3927
> > > but got lost in a see of conflicting patches.
> > >
> > > I too have a amd64 box that is showing that the clock is running way too
> > > fast (feels about double speed, haven't checked for sure.) I'm running
> > > it in 32bit mode for now, and the boot dmesg is below.
> > >
> > > Any hints on patches that I should test out to try to track this down?
> > > I haven't run any real old kernels on it to see if it is something new
> > > (shows up on a 2.6.13 and 2.6.14 kernel too.)
> >
> > Did you try "disable_timer_pin_1" on the kernel command line?
>
> Nice, that worked just fine, no kernel patch needed. Thanks for
> pointing it out to me, I totally missed it.
>
> Now to go fix the usb irq "ignore" issue for this machine, and I'll be
> able to switch to using it all the time...

My machine which needs this is basically useless without ACPI.

HTH
Oliver

2006-01-05 03:18:09

by Kurt Wall

[permalink] [raw]
Subject: Re: Clock going way too fast on 2.6.15 for amd64 processor

On Wed, Jan 04, 2006 at 03:39:19PM -0800, Greg KH took 0 lines to write:
> Hi,
>
> I tried digging through the mess in
> http://bugzilla.kernel.org/show_bug.cgi?id=3927
> but got lost in a see of conflicting patches.

Yup.

> I too have a amd64 box that is showing that the clock is running way too
> fast (feels about double speed, haven't checked for sure.) I'm running
> it in 32bit mode for now, and the boot dmesg is below.
>
> Any hints on patches that I should test out to try to track this down?
> I haven't run any real old kernels on it to see if it is something new
> (shows up on a 2.6.13 and 2.6.14 kernel too.)

Here's one from Andi that WORKSFORME. Requires acpi_skip_timer_override
on the kernel command line.

--- cut here ---
Remove support for interrupt 0/timer routing on non ACPI compliant boards.
Timer interrupt is now always routed through the local APIC and the 8259
is always fully masked when APIC mode is active. All the special case
code for timer interrupts has been removed and interrupt 0 is now
handled like all other interrupts.

This should fix persistent timer problems on ATI and some Nvidia
boards. I tested it on different machines with different chipsets
I had available, but it needs more testing.

On an ATI IXP machine I still have some minor instability in the
local APIC timing compared to other chipsets, but the pattern is quite
regular and shouldn't cause big problems.

It mainly consists of removing code. I also removed support
for the IO-APIC watchdog, because it complicated the code paths
and wasn't used. Some other code also went that wasn't directly
related like support for MCA and EISA busses.

32bit is not changed right now, although it has the same troubles.
Problem is that it still has to support the old broken legacy systems
with weird interrupt routing. Perhaps the best way would be there
to check if the machine has ACPI tables (not necessarily using
ACPI, just checking if it claims to be ACPI compliant hardware) and if
yes disable all the code I removed here on 64bit.

Signed-off-by: Andi Kleen <[email protected]>

Documentation/nmi_watchdog.txt | 4
arch/x86_64/kernel/apic.c | 24 -
arch/x86_64/kernel/i8259.c | 48 +--
arch/x86_64/kernel/io_apic.c | 538 -----------------------------------------
arch/x86_64/kernel/nmi.c | 25 -
arch/x86_64/kernel/setup.c | 5
arch/x86_64/kernel/smpboot.c | 6
drivers/acpi/sleep/main.c | 2
include/asm-x86_64/apic.h | 8
include/asm-x86_64/hw_irq.h | 18 -
include/asm-x86_64/io_apic.h | 2
include/asm-x86_64/nmi.h | 0
12 files changed, 51 insertions(+), 629 deletions(-)



diff -u linux-2.6.15rc2-work/Documentation/nmi_watchdog.txt-o linux-2.6.15rc2-work/Documentation/nmi_watchdog.txt
--- linux-2.6.15rc2-work/Documentation/nmi_watchdog.txt-o 2005-08-29 01:41:01.000000000 +0200
+++ linux-2.6.15rc2-work/Documentation/nmi_watchdog.txt 2005-11-24 16:14:10.000000000 +0100
@@ -72,8 +72,8 @@
you have to enable it with a boot time parameter. Prior to 2.4.2-ac18
the NMI-oopser is enabled unconditionally on x86 SMP boxes.

-On x86-64 the NMI oopser is on by default. On 64bit Intel CPUs
-it uses IO-APIC by default and on AMD it uses local APIC.
+On x86-64 the NMI watchdog is on by default if the CPU is supported.
+Only the local APIC watchdog exists.

[ feel free to send bug reports, suggestions and patches to
Ingo Molnar <[email protected]> or the Linux SMP mailing
diff -u linux-2.6.15rc2-work/arch/x86_64/kernel/nmi.c-o linux-2.6.15rc2-work/arch/x86_64/kernel/nmi.c
--- linux-2.6.15rc2-work/arch/x86_64/kernel/nmi.c-o 2005-10-30 16:09:03.000000000 +0100
+++ linux-2.6.15rc2-work/arch/x86_64/kernel/nmi.c 2005-11-24 16:30:09.000000000 +0100
@@ -116,7 +116,7 @@
if (nmi_known_cpu())
nmi_watchdog = NMI_LOCAL_APIC;
else
- nmi_watchdog = NMI_IO_APIC;
+ printk(KERN_WARNING "Unknown CPU: no NMI watchdog support\n");
}

#ifdef CONFIG_SMP
@@ -264,27 +264,6 @@
enable_lapic_nmi_watchdog();
}

-void disable_timer_nmi_watchdog(void)
-{
- if ((nmi_watchdog != NMI_IO_APIC) || (nmi_active <= 0))
- return;
-
- disable_irq(0);
- unset_nmi_callback();
- nmi_active = -1;
- nmi_watchdog = NMI_NONE;
-}
-
-void enable_timer_nmi_watchdog(void)
-{
- if (nmi_active < 0) {
- nmi_watchdog = NMI_IO_APIC;
- touch_nmi_watchdog();
- nmi_active = 1;
- enable_irq(0);
- }
-}
-
#ifdef CONFIG_PM

static int nmi_pm_active; /* nmi_active before suspend */
@@ -585,6 +564,4 @@
EXPORT_SYMBOL(nmi_watchdog);
EXPORT_SYMBOL(reserve_lapic_nmi);
EXPORT_SYMBOL(release_lapic_nmi);
-EXPORT_SYMBOL(disable_timer_nmi_watchdog);
-EXPORT_SYMBOL(enable_timer_nmi_watchdog);
EXPORT_SYMBOL(touch_nmi_watchdog);
diff -u linux-2.6.15rc2-work/arch/x86_64/kernel/setup.c-o linux-2.6.15rc2-work/arch/x86_64/kernel/setup.c
--- linux-2.6.15rc2-work/arch/x86_64/kernel/setup.c-o 2005-11-22 17:15:10.000000000 +0100
+++ linux-2.6.15rc2-work/arch/x86_64/kernel/setup.c 2005-11-24 17:06:28.000000000 +0100
@@ -336,11 +336,6 @@
#endif
#endif

- if (!memcmp(from, "disable_timer_pin_1", 19))
- disable_timer_pin_1 = 1;
- if (!memcmp(from, "enable_timer_pin_1", 18))
- disable_timer_pin_1 = -1;
-
if (!memcmp(from, "nolapic", 7) ||
!memcmp(from, "disableapic", 11))
disable_apic = 1;
diff -u linux-2.6.15rc2-work/arch/x86_64/kernel/io_apic.c-o linux-2.6.15rc2-work/arch/x86_64/kernel/io_apic.c
--- linux-2.6.15rc2-work/arch/x86_64/kernel/io_apic.c-o 2005-11-22 17:15:10.000000000 +0100
+++ linux-2.6.15rc2-work/arch/x86_64/kernel/io_apic.c 2005-11-24 18:03:39.000000000 +0100
@@ -18,6 +18,8 @@
* and Rolf G. Tews
* for testing these extensively
* Paul Diefenbaugh : Added full ACPI support
+ * Andi Kleen : Removed support for non ACPI compliant
+ * systems.
*/

#include <linux/mm.h>
@@ -42,10 +44,6 @@

int sis_apic_bug; /* not actually supported, dummy for compile */

-static int no_timer_check;
-
-int disable_timer_pin_1 __initdata;
-
static DEFINE_SPINLOCK(ioapic_lock);

/*
@@ -361,27 +359,6 @@
}

/*
- * Find the pin to which IRQ[irq] (ISA) is connected
- */
-static int find_isa_irq_pin(int irq, int type)
-{
- int i;
-
- for (i = 0; i < mp_irq_entries; i++) {
- int lbus = mp_irqs[i].mpc_srcbus;
-
- if ((mp_bus_id_to_type[lbus] == MP_BUS_ISA ||
- mp_bus_id_to_type[lbus] == MP_BUS_EISA ||
- mp_bus_id_to_type[lbus] == MP_BUS_MCA) &&
- (mp_irqs[i].mpc_irqtype == type) &&
- (mp_irqs[i].mpc_srcbusirq == irq))
-
- return mp_irqs[i].mpc_dstirq;
- }
- return -1;
-}
-
-/*
* Find a specific PCI IRQ entry.
* Not an __init, possibly needed by modules
*/
@@ -428,27 +405,6 @@
return best_guess;
}

-/*
- * EISA Edge/Level control register, ELCR
- */
-static int EISA_ELCR(unsigned int irq)
-{
- if (irq < 16) {
- unsigned int port = 0x4d0 + (irq >> 3);
- return (inb(port) >> (irq & 7)) & 1;
- }
- apic_printk(APIC_VERBOSE, "Broken MPtable reports ISA irq %d\n", irq);
- return 0;
-}
-
-/* EISA interrupts are always polarity zero and can be edge or level
- * trigger depending on the ELCR value. If an interrupt is listed as
- * EISA conforming in the MP table, that means its trigger type must
- * be read in from the ELCR */
-
-#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mpc_srcbusirq))
-#define default_EISA_polarity(idx) (0)
-
/* ISA interrupts are always polarity zero edge triggered,
* when listed as conforming in the MP table. */

@@ -461,12 +417,6 @@
#define default_PCI_trigger(idx) (1)
#define default_PCI_polarity(idx) (1)

-/* MCA interrupts are always polarity zero level triggered,
- * when listed as conforming in the MP table. */
-
-#define default_MCA_trigger(idx) (1)
-#define default_MCA_polarity(idx) (0)
-
static int __init MPBIOS_polarity(int idx)
{
int bus = mp_irqs[idx].mpc_srcbus;
@@ -486,21 +436,11 @@
polarity = default_ISA_polarity(idx);
break;
}
- case MP_BUS_EISA: /* EISA pin */
- {
- polarity = default_EISA_polarity(idx);
- break;
- }
case MP_BUS_PCI: /* PCI pin */
{
polarity = default_PCI_polarity(idx);
break;
}
- case MP_BUS_MCA: /* MCA pin */
- {
- polarity = default_MCA_polarity(idx);
- break;
- }
default:
{
printk(KERN_WARNING "broken BIOS!!\n");
@@ -555,21 +495,11 @@
trigger = default_ISA_trigger(idx);
break;
}
- case MP_BUS_EISA: /* EISA pin */
- {
- trigger = default_EISA_trigger(idx);
- break;
- }
case MP_BUS_PCI: /* PCI pin */
{
trigger = default_PCI_trigger(idx);
break;
}
- case MP_BUS_MCA: /* MCA pin */
- {
- trigger = default_MCA_trigger(idx);
- break;
- }
default:
{
printk(KERN_WARNING "broken BIOS!!\n");
@@ -687,8 +617,6 @@
switch (mp_bus_id_to_type[bus])
{
case MP_BUS_ISA: /* ISA pin */
- case MP_BUS_EISA:
- case MP_BUS_MCA:
{
irq = mp_irqs[idx].mpc_srcbusirq;
break;
@@ -847,17 +775,10 @@
irq = pin_2_irq(idx, apic, pin);
add_pin_to_irq(irq, apic, pin);

- if (!apic && !IO_APIC_IRQ(irq))
- continue;
-
- if (IO_APIC_IRQ(irq)) {
- vector = assign_irq_vector(irq);
- entry.vector = vector;
-
- ioapic_register_intr(irq, vector, IOAPIC_AUTO);
- if (!apic && (irq < 16))
- disable_8259A_irq(irq);
- }
+ vector = assign_irq_vector(irq);
+ entry.vector = vector;
+
+ ioapic_register_intr(irq, vector, IOAPIC_AUTO);
spin_lock_irqsave(&ioapic_lock, flags);
io_apic_write(apic, 0x11+2*pin, *(((int *)&entry)+1));
io_apic_write(apic, 0x10+2*pin, *(((int *)&entry)+0));
@@ -870,51 +791,6 @@
apic_printk(APIC_VERBOSE," not connected.\n");
}

-/*
- * Set up the 8259A-master output pin as broadcast to all
- * CPUs.
- */
-static void __init setup_ExtINT_IRQ0_pin(unsigned int pin, int vector)
-{
- struct IO_APIC_route_entry entry;
- unsigned long flags;
-
- memset(&entry,0,sizeof(entry));
-
- disable_8259A_irq(0);
-
- /* mask LVT0 */
- apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
-
- /*
- * We use logical delivery to get the timer IRQ
- * to the first CPU.
- */
- entry.dest_mode = INT_DEST_MODE;
- entry.mask = 0; /* unmask IRQ now */
- entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS);
- entry.delivery_mode = INT_DELIVERY_MODE;
- entry.polarity = 0;
- entry.trigger = 0;
- entry.vector = vector;
-
- /*
- * The timer IRQ doesn't have to know that behind the
- * scene we have a 8259A-master in AEOI mode ...
- */
- irq_desc[0].handler = &ioapic_edge_type;
-
- /*
- * Add it to the IO-APIC irq-routing table:
- */
- spin_lock_irqsave(&ioapic_lock, flags);
- io_apic_write(0, 0x11+2*pin, *(((int *)&entry)+1));
- io_apic_write(0, 0x10+2*pin, *(((int *)&entry)+0));
- spin_unlock_irqrestore(&ioapic_lock, flags);
-
- enable_8259A_irq(0);
-}
-
void __init UNEXPECTED_IO_APIC(void)
{
}
@@ -959,17 +835,6 @@

printk(KERN_DEBUG ".... register #01: %08X\n", *(int *)&reg_01);
printk(KERN_DEBUG "....... : max redirection entries: %04X\n", reg_01.bits.entries);
- if ( (reg_01.bits.entries != 0x0f) && /* older (Neptune) boards */
- (reg_01.bits.entries != 0x17) && /* typical ISA+PCI boards */
- (reg_01.bits.entries != 0x1b) && /* Compaq Proliant boards */
- (reg_01.bits.entries != 0x1f) && /* dual Xeon boards */
- (reg_01.bits.entries != 0x22) && /* bigger Xeon boards */
- (reg_01.bits.entries != 0x2E) &&
- (reg_01.bits.entries != 0x3F) &&
- (reg_01.bits.entries != 0x03)
- )
- UNEXPECTED_IO_APIC();
-
printk(KERN_DEBUG "....... : PRQ implemented: %X\n", reg_01.bits.PRQ);
printk(KERN_DEBUG "....... : IO APIC version: %04X\n", reg_01.bits.version);
if ( (reg_01.bits.version != 0x01) && /* 82489DX IO-APICs */
@@ -1151,37 +1016,6 @@
on_each_cpu(print_local_APIC, NULL, 1, 1);
}

-void __apicdebuginit print_PIC(void)
-{
- unsigned int v;
- unsigned long flags;
-
- if (apic_verbosity == APIC_QUIET)
- return;
-
- printk(KERN_DEBUG "\nprinting PIC contents\n");
-
- spin_lock_irqsave(&i8259A_lock, flags);
-
- v = inb(0xa1) << 8 | inb(0x21);
- printk(KERN_DEBUG "... PIC IMR: %04x\n", v);
-
- v = inb(0xa0) << 8 | inb(0x20);
- printk(KERN_DEBUG "... PIC IRR: %04x\n", v);
-
- outb(0x0b,0xa0);
- outb(0x0b,0x20);
- v = inb(0xa0) << 8 | inb(0x20);
- outb(0x0a,0xa0);
- outb(0x0a,0x20);
-
- spin_unlock_irqrestore(&i8259A_lock, flags);
-
- printk(KERN_DEBUG "... PIC ISR: %04x\n", v);
-
- v = inb(0x4d1) << 8 | inb(0x4d0);
- printk(KERN_DEBUG "... PIC ELCR: %04x\n", v);
-}

#endif /* 0 */

@@ -1220,44 +1054,11 @@
*/
void disable_IO_APIC(void)
{
- int pin;
/*
* Clear the IO-APIC before rebooting:
*/
clear_IO_APIC();
-
- /*
- * If the i8259 is routed through an IOAPIC
- * Put that IOAPIC in virtual wire mode
- * so legacy interrupts can be delivered.
- */
- pin = find_isa_irq_pin(0, mp_ExtINT);
- if (pin != -1) {
- struct IO_APIC_route_entry entry;
- unsigned long flags;
-
- memset(&entry, 0, sizeof(entry));
- entry.mask = 0; /* Enabled */
- entry.trigger = 0; /* Edge */
- entry.irr = 0;
- entry.polarity = 0; /* High */
- entry.delivery_status = 0;
- entry.dest_mode = 0; /* Physical */
- entry.delivery_mode = 7; /* ExtInt */
- entry.vector = 0;
- entry.dest.physical.physical_dest = 0;
-
-
- /*
- * Add it to the IO-APIC irq-routing table:
- */
- spin_lock_irqsave(&ioapic_lock, flags);
- io_apic_write(0, 0x11+2*pin, *(((int *)&entry)+1));
- io_apic_write(0, 0x10+2*pin, *(((int *)&entry)+0));
- spin_unlock_irqrestore(&ioapic_lock, flags);
- }
-
- disconnect_bsp_APIC(pin != -1);
+ disconnect_bsp_APIC();
}

/*
@@ -1327,36 +1128,6 @@
}

/*
- * There is a nasty bug in some older SMP boards, their mptable lies
- * about the timer IRQ. We do the following to work around the situation:
- *
- * - timer IRQ defaults to IO-APIC IRQ
- * - if this function detects that timer IRQs are defunct, then we fall
- * back to ISA timer IRQs
- */
-static int __init timer_irq_works(void)
-{
- unsigned long t1 = jiffies;
-
- local_irq_enable();
- /* Let ten ticks pass... */
- mdelay((10 * 1000) / HZ);
-
- /*
- * Expect a few ticks at least, to be sure some possible
- * glue logic does not lock up after one or two first
- * ticks in a non-ExtINT mode. Also the local APIC
- * might have cached one ExtINT interrupt. Finally, at
- * least one tick may be lost due to delays.
- */
-
- /* jiffies wrap? */
- if (jiffies - t1 > 4)
- return 1;
- return 0;
-}
-
-/*
* In the SMP+IOAPIC case it might happen that there are an unspecified
* number of pending IRQ events unhandled. These cases are very rare,
* so we 'resend' these IRQs via IPIs, to the same CPU. It's much
@@ -1385,8 +1156,7 @@
unsigned long flags;

spin_lock_irqsave(&ioapic_lock, flags);
- if (irq < 16) {
- disable_8259A_irq(irq);
+ if (irq < 16) { /* needed? */
if (i8259A_irq_pending(irq))
was_pending = 1;
}
@@ -1529,291 +1299,13 @@
#endif
};

-static inline void init_IO_APIC_traps(void)
-{
- int irq;
-
- /*
- * NOTE! The local APIC isn't very good at handling
- * multiple interrupts at the same interrupt level.
- * As the interrupt level is determined by taking the
- * vector number and shifting that right by 4, we
- * want to spread these out a bit so that they don't
- * all fall in the same interrupt level.
- *
- * Also, we've got to be careful not to trash gate
- * 0x80, because int 0x80 is hm, kind of importantish. ;)
- */
- for (irq = 0; irq < NR_IRQS ; irq++) {
- int tmp = irq;
- if (use_pci_vector()) {
- if (!platform_legacy_irq(tmp))
- if ((tmp = vector_to_irq(tmp)) == -1)
- continue;
- }
- if (IO_APIC_IRQ(tmp) && !IO_APIC_VECTOR(tmp)) {
- /*
- * Hmm.. We don't have an entry for this,
- * so default to an old-fashioned 8259
- * interrupt if we can..
- */
- if (irq < 16)
- make_8259A_irq(irq);
- else
- /* Strange. Oh, well.. */
- irq_desc[irq].handler = &no_irq_type;
- }
- }
-}
-
-static void enable_lapic_irq (unsigned int irq)
-{
- unsigned long v;
-
- v = apic_read(APIC_LVT0);
- apic_write_around(APIC_LVT0, v & ~APIC_LVT_MASKED);
-}
-
-static void disable_lapic_irq (unsigned int irq)
-{
- unsigned long v;
-
- v = apic_read(APIC_LVT0);
- apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED);
-}
-
-static void ack_lapic_irq (unsigned int irq)
-{
- ack_APIC_irq();
-}
-
-static void end_lapic_irq (unsigned int i) { /* nothing */ }
-
-static struct hw_interrupt_type lapic_irq_type __read_mostly = {
- .typename = "local-APIC-edge",
- .startup = NULL, /* startup_irq() not used for IRQ0 */
- .shutdown = NULL, /* shutdown_irq() not used for IRQ0 */
- .enable = enable_lapic_irq,
- .disable = disable_lapic_irq,
- .ack = ack_lapic_irq,
- .end = end_lapic_irq,
-};
-
-static void setup_nmi (void)
-{
- /*
- * Dirty trick to enable the NMI watchdog ...
- * We put the 8259A master into AEOI mode and
- * unmask on all local APICs LVT0 as NMI.
- *
- * The idea to use the 8259A in AEOI mode ('8259A Virtual Wire')
- * is from Maciej W. Rozycki - so we do not have to EOI from
- * the NMI handler or the timer interrupt.
- */
- printk(KERN_INFO "activating NMI Watchdog ...");
-
- enable_NMI_through_LVT0(NULL);
-
- printk(" done.\n");
-}
-
-/*
- * This looks a bit hackish but it's about the only one way of sending
- * a few INTA cycles to 8259As and any associated glue logic. ICR does
- * not support the ExtINT mode, unfortunately. We need to send these
- * cycles as some i82489DX-based boards have glue logic that keeps the
- * 8259A interrupt line asserted until INTA. --macro
- */
-static inline void unlock_ExtINT_logic(void)
-{
- int pin, i;
- struct IO_APIC_route_entry entry0, entry1;
- unsigned char save_control, save_freq_select;
- unsigned long flags;
-
- pin = find_isa_irq_pin(8, mp_INT);
- if (pin == -1)
- return;
-
- spin_lock_irqsave(&ioapic_lock, flags);
- *(((int *)&entry0) + 1) = io_apic_read(0, 0x11 + 2 * pin);
- *(((int *)&entry0) + 0) = io_apic_read(0, 0x10 + 2 * pin);
- spin_unlock_irqrestore(&ioapic_lock, flags);
- clear_IO_APIC_pin(0, pin);
-
- memset(&entry1, 0, sizeof(entry1));
-
- entry1.dest_mode = 0; /* physical delivery */
- entry1.mask = 0; /* unmask IRQ now */
- entry1.dest.physical.physical_dest = hard_smp_processor_id();
- entry1.delivery_mode = dest_ExtINT;
- entry1.polarity = entry0.polarity;
- entry1.trigger = 0;
- entry1.vector = 0;
-
- spin_lock_irqsave(&ioapic_lock, flags);
- io_apic_write(0, 0x11 + 2 * pin, *(((int *)&entry1) + 1));
- io_apic_write(0, 0x10 + 2 * pin, *(((int *)&entry1) + 0));
- spin_unlock_irqrestore(&ioapic_lock, flags);
-
- save_control = CMOS_READ(RTC_CONTROL);
- save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
- CMOS_WRITE((save_freq_select & ~RTC_RATE_SELECT) | 0x6,
- RTC_FREQ_SELECT);
- CMOS_WRITE(save_control | RTC_PIE, RTC_CONTROL);
-
- i = 100;
- while (i-- > 0) {
- mdelay(10);
- if ((CMOS_READ(RTC_INTR_FLAGS) & RTC_PF) == RTC_PF)
- i -= 10;
- }
-
- CMOS_WRITE(save_control, RTC_CONTROL);
- CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
- clear_IO_APIC_pin(0, pin);
-
- spin_lock_irqsave(&ioapic_lock, flags);
- io_apic_write(0, 0x11 + 2 * pin, *(((int *)&entry0) + 1));
- io_apic_write(0, 0x10 + 2 * pin, *(((int *)&entry0) + 0));
- spin_unlock_irqrestore(&ioapic_lock, flags);
-}
-
-/*
- * This code may look a bit paranoid, but it's supposed to cooperate with
- * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ
- * is so screwy. Thanks to Brian Perkins for testing/hacking this beast
- * fanatically on his truly buggy board.
- */
-static inline void check_timer(void)
-{
- int pin1, pin2;
- int vector;
-
- /*
- * get/set the timer IRQ vector:
- */
- disable_8259A_irq(0);
- vector = assign_irq_vector(0);
- set_intr_gate(vector, interrupt[0]);
-
- /*
- * Subtle, code in do_timer_interrupt() expects an AEOI
- * mode for the 8259A whenever interrupts are routed
- * through I/O APICs. Also IRQ0 has to be enabled in
- * the 8259A which implies the virtual wire has to be
- * disabled in the local APIC.
- */
- apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
- init_8259A(1);
- enable_8259A_irq(0);
-
- pin1 = find_isa_irq_pin(0, mp_INT);
- pin2 = find_isa_irq_pin(0, mp_ExtINT);
-
- apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X pin1=%d pin2=%d\n", vector, pin1, pin2);
-
- if (pin1 != -1) {
- /*
- * Ok, does IRQ0 through the IOAPIC work?
- */
- unmask_IO_APIC_irq(0);
- if (!no_timer_check && timer_irq_works()) {
- nmi_watchdog_default();
- if (nmi_watchdog == NMI_IO_APIC) {
- disable_8259A_irq(0);
- setup_nmi();
- enable_8259A_irq(0);
- }
- if (disable_timer_pin_1 > 0)
- clear_IO_APIC_pin(0, pin1);
- return;
- }
- clear_IO_APIC_pin(0, pin1);
- apic_printk(APIC_QUIET,KERN_ERR "..MP-BIOS bug: 8254 timer not connected to IO-APIC\n");
- }
-
- apic_printk(APIC_VERBOSE,KERN_INFO "...trying to set up timer (IRQ0) through the 8259A ... ");
- if (pin2 != -1) {
- apic_printk(APIC_VERBOSE,"\n..... (found pin %d) ...", pin2);
- /*
- * legacy devices should be connected to IO APIC #0
- */
- setup_ExtINT_IRQ0_pin(pin2, vector);
- if (timer_irq_works()) {
- printk("works.\n");
- nmi_watchdog_default();
- if (nmi_watchdog == NMI_IO_APIC) {
- setup_nmi();
- }
- return;
- }
- /*
- * Cleanup, just in case ...
- */
- clear_IO_APIC_pin(0, pin2);
- }
- printk(" failed.\n");
-
- if (nmi_watchdog) {
- printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n");
- nmi_watchdog = 0;
- }
-
- apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
-
- disable_8259A_irq(0);
- irq_desc[0].handler = &lapic_irq_type;
- apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */
- enable_8259A_irq(0);
-
- if (timer_irq_works()) {
- apic_printk(APIC_QUIET, " works.\n");
- return;
- }
- apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | vector);
- apic_printk(APIC_VERBOSE," failed.\n");
-
- apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as ExtINT IRQ...");
-
- init_8259A(0);
- make_8259A_irq(0);
- apic_write_around(APIC_LVT0, APIC_DM_EXTINT);
-
- unlock_ExtINT_logic();
-
- if (timer_irq_works()) {
- apic_printk(APIC_VERBOSE," works.\n");
- return;
- }
- apic_printk(APIC_VERBOSE," failed :(.\n");
- panic("IO-APIC + timer doesn't work! Try using the 'noapic' kernel parameter\n");
-}
-
-static int __init notimercheck(char *s)
-{
- no_timer_check = 1;
- return 1;
-}
-__setup("no_timer_check", notimercheck);
-
-/*
- *
- * IRQ's that are handled by the PIC in the MPS IOAPIC case.
- * - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ.
- * Linux doesn't really care, as it's not actually used
- * for any interrupt handling anyway.
- */
-#define PIC_IRQS (1<<2)
-
void __init setup_IO_APIC(void)
{
+ apic_printk(APIC_VERBOSE, "ENABLING IO-APIC\n");
+
enable_IO_APIC();

- if (acpi_ioapic)
- io_apic_irqs = ~0; /* all IRQs go through IOAPIC */
- else
- io_apic_irqs = ~PIC_IRQS;
+ disable_8259A_completely();

apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n");

@@ -1824,8 +1316,6 @@
setup_ioapic_ids_from_mpc();
sync_Arb_IDs();
setup_IO_APIC_irqs();
- init_IO_APIC_traps();
- check_timer();
if (!acpi_ioapic)
print_IO_APIC();
}
@@ -1961,12 +1451,6 @@
struct IO_APIC_route_entry entry;
unsigned long flags;

- if (!IO_APIC_IRQ(irq)) {
- apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n",
- ioapic);
- return -EINVAL;
- }
-
/*
* Generate a PCI IRQ routing entry and program the IOAPIC accordingly.
* Note that we mask (disable) IRQs now -- these get enabled when the
diff -u linux-2.6.15rc2-work/arch/x86_64/kernel/apic.c-o linux-2.6.15rc2-work/arch/x86_64/kernel/apic.c
--- linux-2.6.15rc2-work/arch/x86_64/kernel/apic.c-o 2005-11-22 17:15:10.000000000 +0100
+++ linux-2.6.15rc2-work/arch/x86_64/kernel/apic.c 2005-11-24 16:56:09.000000000 +0100
@@ -129,7 +129,7 @@
}
}

-void disconnect_bsp_APIC(int virt_wire_setup)
+void disconnect_bsp_APIC(void)
{
if (pic_mode) {
/*
@@ -153,20 +153,14 @@
value |= 0xf;
apic_write_around(APIC_SPIV, value);

- if (!virt_wire_setup) {
- /* For LVT0 make it edge triggered, active high, external and enabled */
- value = apic_read(APIC_LVT0);
- value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
- APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
- APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED );
- value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
- value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
- apic_write_around(APIC_LVT0, value);
- }
- else {
- /* Disable LVT0 */
- apic_write_around(APIC_LVT0, APIC_LVT_MASKED);
- }
+ /* For LVT0 make it edge triggered, active high, external and enabled */
+ value = apic_read(APIC_LVT0);
+ value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
+ APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
+ APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED );
+ value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
+ value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
+ apic_write_around(APIC_LVT0, value);

/* For LVT1 make it edge triggered, active high, nmi and enabled */
value = apic_read(APIC_LVT1);
diff -u linux-2.6.15rc2-work/arch/x86_64/kernel/i8259.c-o linux-2.6.15rc2-work/arch/x86_64/kernel/i8259.c
--- linux-2.6.15rc2-work/arch/x86_64/kernel/i8259.c-o 2005-11-22 17:15:10.000000000 +0100
+++ linux-2.6.15rc2-work/arch/x86_64/kernel/i8259.c 2005-11-24 16:27:07.000000000 +0100
@@ -176,16 +176,6 @@
#define cached_21 (__byte(0,cached_irq_mask))
#define cached_A1 (__byte(1,cached_irq_mask))

-/*
- * Not all IRQs can be routed through the IO-APIC, eg. on certain (older)
- * boards the timer interrupt is not really connected to any IO-APIC pin,
- * it's fed to the master 8259A's IR0 line only.
- *
- * Any '1' bit in this mask means the IRQ is routed through the IO-APIC.
- * this 'mixed mode' IRQ handling costs nothing because it's only used
- * at IRQ setup time.
- */
-unsigned long io_apic_irqs;

void disable_8259A_irq(unsigned int irq)
{
@@ -231,14 +221,6 @@
return ret;
}

-void make_8259A_irq(unsigned int irq)
-{
- disable_irq_nosync(irq);
- io_apic_irqs &= ~(1<<irq);
- irq_desc[irq].handler = &i8259A_irq_type;
- enable_irq(irq);
-}
-
/*
* This function assumes to be called rarely. Switching between
* 8259A registers is slow.
@@ -338,7 +320,17 @@
}
}

-void init_8259A(int auto_eoi)
+/* Called by the IO-APIC code when it takes over */
+void disable_8259A_completely(void)
+{
+ unsigned long flags;
+ spin_lock_irqsave(&i8259A_lock, flags);
+ outb(0xff, 0x21); /* mask all of 8259A-1 */
+ outb(0xff, 0xA1); /* mask all of 8259A-2 */
+ spin_unlock_irqrestore(&i8259A_lock, flags);
+}
+
+static void init_8259A(void)
{
unsigned long flags;

@@ -353,10 +345,7 @@
outb_p(0x11, 0x20); /* ICW1: select 8259A-1 init */
outb_p(0x20 + 0, 0x21); /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
outb_p(0x04, 0x21); /* 8259A-1 (the master) has a slave on IR2 */
- if (auto_eoi)
- outb_p(0x03, 0x21); /* master does Auto EOI */
- else
- outb_p(0x01, 0x21); /* master expects normal EOI */
+ outb_p(0x01, 0x21); /* master expects normal EOI */

outb_p(0x11, 0xA0); /* ICW1: select 8259A-2 init */
outb_p(0x20 + 8, 0xA1); /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
@@ -364,14 +353,7 @@
outb_p(0x01, 0xA1); /* (slave's support for AEOI in flat mode
is to be investigated) */

- if (auto_eoi)
- /*
- * in AEOI mode we just have to mask the interrupt
- * when acking.
- */
- i8259A_irq_type.ack = disable_8259A_irq;
- else
- i8259A_irq_type.ack = mask_and_ack_8259A;
+ i8259A_irq_type.ack = mask_and_ack_8259A;

udelay(100); /* wait for 8259A to initialize */

@@ -400,7 +382,7 @@

static int i8259A_resume(struct sys_device *dev)
{
- init_8259A(0);
+ init_8259A();
restore_ELCR(irq_trigger);
return 0;
}
@@ -457,7 +439,7 @@
#ifdef CONFIG_X86_LOCAL_APIC
init_bsp_APIC();
#endif
- init_8259A(0);
+ init_8259A();

for (i = 0; i < NR_IRQS; i++) {
irq_desc[i].status = IRQ_DISABLED;
diff -u linux-2.6.15rc2-work/arch/x86_64/kernel/smpboot.c-o linux-2.6.15rc2-work/arch/x86_64/kernel/smpboot.c
--- linux-2.6.15rc2-work/arch/x86_64/kernel/smpboot.c-o 2005-11-22 17:15:10.000000000 +0100
+++ linux-2.6.15rc2-work/arch/x86_64/kernel/smpboot.c 2005-11-24 16:29:52.000000000 +0100
@@ -516,12 +516,6 @@

Dprintk("cpu %d: enabling apic timer\n", smp_processor_id());

- if (nmi_watchdog == NMI_IO_APIC) {
- disable_8259A_irq(0);
- enable_NMI_through_LVT0(NULL);
- enable_8259A_irq(0);
- }
-
enable_APIC_timer();

/*
diff -u linux-2.6.15rc2-work/drivers/acpi/sleep/main.c-o linux-2.6.15rc2-work/drivers/acpi/sleep/main.c
--- linux-2.6.15rc2-work/drivers/acpi/sleep/main.c-o 2005-11-16 00:34:18.000000000 +0100
+++ linux-2.6.15rc2-work/drivers/acpi/sleep/main.c 2005-11-24 17:41:56.000000000 +0100
@@ -137,10 +137,12 @@
/* reset firmware waking vector */
acpi_set_firmware_waking_vector((acpi_physical_address) 0);

+#ifndef CONFIG_X86_64
if (init_8259A_after_S1) {
printk("Broken toshiba laptop -> kicking interrupts\n");
init_8259A(0);
}
+#endif
return 0;
}

diff -u linux-2.6.15rc2-work/include/asm-x86_64/apic.h-o linux-2.6.15rc2-work/include/asm-x86_64/apic.h
--- linux-2.6.15rc2-work/include/asm-x86_64/apic.h-o 2005-11-22 17:15:13.000000000 +0100
+++ linux-2.6.15rc2-work/include/asm-x86_64/apic.h 2005-11-24 16:54:40.000000000 +0100
@@ -77,7 +77,7 @@
extern int get_maxlvt (void);
extern void clear_local_APIC (void);
extern void connect_bsp_APIC (void);
-extern void disconnect_bsp_APIC (int virt_wire_setup);
+extern void disconnect_bsp_APIC (void);
extern void disable_local_APIC (void);
extern int verify_local_APIC (void);
extern void cache_APIC_registers (void);
@@ -91,8 +91,9 @@
extern void setup_apic_nmi_watchdog (void);
extern int reserve_lapic_nmi(void);
extern void release_lapic_nmi(void);
-extern void disable_timer_nmi_watchdog(void);
-extern void enable_timer_nmi_watchdog(void);
+/* For oprofile. not needed anymore */
+static inline void enable_timer_nmi_watchdog(void) {}
+static inline void disable_timer_nmi_watchdog(void) {}
extern void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason);
extern int APIC_init_uniprocessor (void);
extern void disable_APIC_timer(void);
@@ -105,7 +106,6 @@
extern unsigned int nmi_watchdog;
#define NMI_DEFAULT -1
#define NMI_NONE 0
-#define NMI_IO_APIC 1
#define NMI_LOCAL_APIC 2
#define NMI_INVALID 3

diff -u linux-2.6.15rc2-work/include/asm-x86_64/hw_irq.h-o linux-2.6.15rc2-work/include/asm-x86_64/hw_irq.h
--- linux-2.6.15rc2-work/include/asm-x86_64/hw_irq.h-o 2005-11-22 17:15:13.000000000 +0100
+++ linux-2.6.15rc2-work/include/asm-x86_64/hw_irq.h 2005-11-24 17:26:29.000000000 +0100
@@ -93,8 +93,7 @@
extern void enable_8259A_irq(unsigned int irq);
extern int i8259A_irq_pending(unsigned int irq);
extern void make_8259A_irq(unsigned int irq);
-extern void init_8259A(int aeoi);
-extern void FASTCALL(send_IPI_self(int vector));
+extern void send_IPI_self(int vector);
extern void init_VISWS_APIC_irqs(void);
extern void setup_IO_APIC(void);
extern void disable_IO_APIC(void);
@@ -102,13 +101,12 @@
extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
extern void send_IPI(int dest, int vector);
extern void setup_ioapic_dest(void);
-
-extern unsigned long io_apic_irqs;
+extern void disable_8259A_completely(void);

extern atomic_t irq_err_count;
extern atomic_t irq_mis_count;

-#define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs))
+#define IO_APIC_IRQ(x) 1

#define __STR(x) #x
#define STR(x) __STR(x)
@@ -130,14 +128,10 @@
"push $" #nr "-256 ; " \
"jmp common_interrupt");

-#if defined(CONFIG_X86_IO_APIC)
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {
- if (IO_APIC_IRQ(i))
- send_IPI_self(IO_APIC_VECTOR(i));
+static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
+{
+ send_IPI_self(IO_APIC_VECTOR(i));
}
-#else
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
-#endif

#define platform_legacy_irq(irq) ((irq) < 16)

diff -u linux-2.6.15rc2-work/include/asm-x86_64/nmi.h-o linux-2.6.15rc2-work/include/asm-x86_64/nmi.h
diff -u linux-2.6.15rc2-work/include/asm-x86_64/io_apic.h-o linux-2.6.15rc2-work/include/asm-x86_64/io_apic.h
--- linux-2.6.15rc2-work/include/asm-x86_64/io_apic.h-o 2005-10-30 16:09:11.000000000 +0100
+++ linux-2.6.15rc2-work/include/asm-x86_64/io_apic.h 2005-11-24 17:26:28.000000000 +0100
@@ -199,7 +199,7 @@
* If we use the IO-APIC for IRQ routing, disable automatic
* assignment of PCI IRQ's.
*/
-#define io_apic_assign_pci_irqs (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
+#define io_apic_assign_pci_irqs (!skip_ioapic_setup)

#ifdef CONFIG_ACPI
extern int io_apic_get_version (int ioapic);
-
--- cut here ---

Kurt
--
Naeser's Law:
You can make it foolproof, but you can't make it
damnfoolproof.

2006-01-05 03:43:13

by Dave Jones

[permalink] [raw]
Subject: Re: Clock going way too fast on 2.6.15 for amd64 processor

On Wed, Jan 04, 2006 at 03:39:19PM -0800, Greg KH wrote:
> Hi,
>
> I tried digging through the mess in
> http://bugzilla.kernel.org/show_bug.cgi?id=3927
> but got lost in a see of conflicting patches.
>
> I too have a amd64 box that is showing that the clock is running way too
> fast (feels about double speed, haven't checked for sure.) I'm running
> it in 32bit mode for now, and the boot dmesg is below.
>
> [ 38.568719] PCI: Found 0000:00:00.0 [1002/5950] 000600 00

Meet the quirky ATI bridge.
http://bugme.osdl.org/show_bug.cgi?id=3927

(It really annoys me btw that you have to go look up
"who is vendor id 1002" when reading bug reports.
Losing pci.ids support isn't all it's cracked up to be imo).

> [ 38.594636] PCI: Calling quirk c01e36d0 for 0000:00:00.0
> [ 38.594639] PCI: Calling quirk c0255f20 for 0000:00:00.0
> [ 38.594642] PCI: Calling quirk c01e36d0 for 0000:00:01.0
> [ 38.594645] PCI: Calling quirk c0255f20 for 0000:00:01.0
> [ 38.594647] PCI: Calling quirk c01e36d0 for 0000:00:13.0
> [ 38.594650] PCI: Calling quirk c0255f20 for 0000:00:13.0
> [ 38.622002] PCI: Calling quirk c01e36d0 for 0000:00:13.1
> [ 38.622005] PCI: Calling quirk c0255f20 for 0000:00:13.1
> [ 38.637966] PCI: Calling quirk c01e36d0 for 0000:00:13.2
> [ 38.637969] PCI: Calling quirk c0255f20 for 0000:00:13.2
> [ 38.637982] PCI: Calling quirk c01e36d0 for 0000:00:14.0
> [ 38.637985] PCI: Calling quirk c0255f20 for 0000:00:14.0
> [ 38.637987] PCI: Calling quirk c01e36d0 for 0000:00:14.1
> [ 38.637990] PCI: Calling quirk c0255f20 for 0000:00:14.1
> [ 38.637993] PCI: Calling quirk c01e36d0 for 0000:00:14.3
> [ 38.637995] PCI: Calling quirk c0255f20 for 0000:00:14.3
> [ 38.637998] PCI: Calling quirk c01e36d0 for 0000:00:14.4
> [ 38.638000] PCI: Calling quirk c0255f20 for 0000:00:14.4
> [ 38.638003] PCI: Calling quirk c01e36d0 for 0000:00:14.5
> [ 38.638005] PCI: Calling quirk c0255f20 for 0000:00:14.5
> [ 38.638008] PCI: Calling quirk c01e36d0 for 0000:00:14.6
> [ 38.638010] PCI: Calling quirk c0255f20 for 0000:00:14.6
> [ 38.638013] PCI: Calling quirk c01e36d0 for 0000:00:18.0
> [ 38.638015] PCI: Calling quirk c0255f20 for 0000:00:18.0
> [ 38.638018] PCI: Calling quirk c01e36d0 for 0000:00:18.1
> [ 38.638020] PCI: Calling quirk c0255f20 for 0000:00:18.1
> [ 38.638023] PCI: Calling quirk c01e36d0 for 0000:00:18.2
> [ 38.638025] PCI: Calling quirk c0255f20 for 0000:00:18.2
> [ 38.638028] PCI: Calling quirk c01e36d0 for 0000:00:18.3
> [ 38.638030] PCI: Calling quirk c0255f20 for 0000:00:18.3
> [ 38.638033] PCI: Calling quirk c01e36d0 for 0000:01:05.0
> [ 38.638035] PCI: Calling quirk c0255f20 for 0000:01:05.0
> [ 38.638038] PCI: Calling quirk c01e36d0 for 0000:02:03.0
> [ 38.638040] PCI: Calling quirk c0255f20 for 0000:02:03.0
> [ 38.638043] PCI: Calling quirk c01e36d0 for 0000:02:05.0
> [ 38.638046] PCI: Calling quirk c0255f20 for 0000:02:05.0
> [ 38.638049] PCI: Calling quirk c01e36d0 for 0000:02:05.2
> [ 38.638052] PCI: Calling quirk c0255f20 for 0000:02:05.2
> [ 38.638054] PCI: Calling quirk c01e36d0 for 0000:02:05.3
> [ 38.638057] PCI: Calling quirk c0255f20 for 0000:02:05.3
> [ 38.638059] PCI: Calling quirk c01e36d0 for 0000:02:05.4
> [ 38.638062] PCI: Calling quirk c0255f20 for 0000:02:05.4
> [ 38.638064] PCI: Calling quirk c01e36d0 for 0000:02:09.0
> [ 38.638067] PCI: Calling quirk c0255f20 for 0000:02:09.0

quirky much ? :-)

Dave