2006-09-08 18:20:45

by Valerie Henson

[permalink] [raw]
Subject: [patch 04/10] [TULIP] Flush MMIO writes in reset sequence

From: Grant Grundler <[email protected]>

The obvious safe registers to read is one from PCI config space.

Signed-off-by: Grant Grundler <[email protected]>
Signed-off-by: Kyle McMartin <[email protected]>
Signed-off-by: Valerie Henson <[email protected]>
Signed-off-by: Jeff Garzik <[email protected]>

---
drivers/net/tulip/tulip_core.c | 2 ++
1 files changed, 2 insertions(+)

--- linux-2.6.18-rc4-mm1.orig/drivers/net/tulip/tulip_core.c
+++ linux-2.6.18-rc4-mm1/drivers/net/tulip/tulip_core.c
@@ -295,12 +295,14 @@ static void tulip_up(struct net_device *

/* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
iowrite32(0x00000001, ioaddr + CSR0);
+ pci_read_config_dword(tp->pdev, PCI_COMMAND, &i); /* flush write */
udelay(100);

/* Deassert reset.
Wait the specified 50 PCI cycles after a reset by initializing
Tx and Rx queues and the address filter list. */
iowrite32(tp->csr0, ioaddr + CSR0);
+ pci_read_config_dword(tp->pdev, PCI_COMMAND, &i); /* flush write */
udelay(100);

if (tulip_debug > 1)

--