Hello,
the following series of patches adds support for Instruction Based
Sampling (IBS) of Barcelona CPUs. IBS is a code profiling mechanism
that enables the processor to select a random instruction fetch or
micro-op after a programmed time interval has expired and record
specific performance information about the operation.
The patches also include a new AMD64 PMU description that dynamically
detects the availability of PMU features of the CPU during
configuration. Thus, there is only one description needed for all AMD
CPU families and models (includes K8, families 10h and above).
The patches are relative to Stephane's 22 patches for 2.6.22-rc3.
Regards,
Robert
--
AMD Saxony, Dresden, Germany
Operating System Research Center
email: [email protected]