Hi,
I got the following error on MIPS Cobalt.
PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
pata_via 0000:00:09.1: failed to request/iomap BARs for port 0 (errno=-16)
PCI: Unable to reserve I/O region #3:8@f0000170 for device 0000:00:09.1
pata_via 0000:00:09.1: failed to request/iomap BARs for port 1 (errno=-16)
pata_via 0000:00:09.1: no available native port
The legacy mode IDE resources set the following order.
pci_setup_device()
Legacy mode ATA controllers have fixed addresses.
IDE resources: 0x1F0-0x1F7, 0x3F6, 0x170-0x177, 0x376
|
V
pcibios_fixup_bus()
MIPS Cobalt PCI bus regions have the -0x10000000 offset from PCI resources.
pcibios_fixup_bus() fix PCI bus regions.
0x1F0 - 0x10000000 = 0xF00001F0
|
V
ata_pci_init_one()
PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
In some architectures, PCI bus regions have the offset from PCI resources.
For this reason, pci_setup_device() should set PCI bus regions to dev->resource[].
Yoichi
---
Fix legacy mode IDE resources
Signed-off-by: Yoichi Yuasa <[email protected]>
diff -pruN -X generic/Documentation/dontdiff generic-orig/drivers/pci/probe.c generic/drivers/pci/probe.c
--- generic-orig/drivers/pci/probe.c 2007-07-26 17:07:44.151670750 +0900
+++ generic/drivers/pci/probe.c 2007-07-26 17:25:42.227046250 +0900
@@ -744,22 +744,40 @@ static int pci_setup_device(struct pci_d
*/
if (class == PCI_CLASS_STORAGE_IDE) {
u8 progif;
+ struct pci_bus_region region;
+ struct resource resource;
pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
if ((progif & 1) == 0) {
- dev->resource[0].start = 0x1F0;
- dev->resource[0].end = 0x1F7;
- dev->resource[0].flags = LEGACY_IO_RESOURCE;
- dev->resource[1].start = 0x3F6;
- dev->resource[1].end = 0x3F6;
- dev->resource[1].flags = LEGACY_IO_RESOURCE;
+ resource.start = 0x1F0;
+ resource.end = 0x1F7;
+ resource.flags = LEGACY_IO_RESOURCE;
+ pcibios_resource_to_bus(dev, ®ion, &resource);
+ dev->resource[0].start = region.start;
+ dev->resource[0].end = region.end;
+ dev->resource[0].flags = resource.flags;
+ resource.start = 0x3F6;
+ resource.end = 0x3F6;
+ resource.flags = LEGACY_IO_RESOURCE;
+ pcibios_resource_to_bus(dev, ®ion, &resource);
+ dev->resource[1].start = region.start;
+ dev->resource[1].end = region.end;
+ dev->resource[1].flags = resource.flags;
}
if ((progif & 4) == 0) {
- dev->resource[2].start = 0x170;
- dev->resource[2].end = 0x177;
- dev->resource[2].flags = LEGACY_IO_RESOURCE;
- dev->resource[3].start = 0x376;
- dev->resource[3].end = 0x376;
- dev->resource[3].flags = LEGACY_IO_RESOURCE;
+ resource.start = 0x170;
+ resource.end = 0x177;
+ resource.flags = LEGACY_IO_RESOURCE;
+ pcibios_resource_to_bus(dev, ®ion, &resource);
+ dev->resource[2].start = region.start;
+ dev->resource[2].end = region.end;
+ dev->resource[2].flags = resource.flags;
+ resource.start = 0x376;
+ resource.end = 0x376;
+ resource.flags = LEGACY_IO_RESOURCE;
+ pcibios_resource_to_bus(dev, ®ion, &resource);
+ dev->resource[3].start = region.start;
+ dev->resource[3].end = region.end;
+ dev->resource[3].flags = resource.flags;
}
}
break;
On Fri, Aug 24, 2007 at 11:55:59AM +0900, Yoichi Yuasa wrote:
> Hi,
>
> I got the following error on MIPS Cobalt.
>
> PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
> pata_via 0000:00:09.1: failed to request/iomap BARs for port 0 (errno=-16)
> PCI: Unable to reserve I/O region #3:8@f0000170 for device 0000:00:09.1
> pata_via 0000:00:09.1: failed to request/iomap BARs for port 1 (errno=-16)
> pata_via 0000:00:09.1: no available native port
>
> The legacy mode IDE resources set the following order.
>
> pci_setup_device()
> Legacy mode ATA controllers have fixed addresses.
> IDE resources: 0x1F0-0x1F7, 0x3F6, 0x170-0x177, 0x376
> |
> V
> pcibios_fixup_bus()
> MIPS Cobalt PCI bus regions have the -0x10000000 offset from PCI resources.
> pcibios_fixup_bus() fix PCI bus regions.
> 0x1F0 - 0x10000000 = 0xF00001F0
> |
> V
> ata_pci_init_one()
> PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
>
> In some architectures, PCI bus regions have the offset from PCI resources.
> For this reason, pci_setup_device() should set PCI bus regions to dev->resource[].
I thought this patch was rejected in the past as it broke other
machines.
thanks,
greg k-h
>> PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
> >
> > In some architectures, PCI bus regions have the offset from PCI resources.
> > For this reason, pci_setup_device() should set PCI bus regions to dev->resource[].
>
> I thought this patch was rejected in the past as it broke other
> machines.
News to me.
Ths one looks sane and is different to the one Andrew has been fiddling
with to stop broken X servers from crashing.
Alan
On Fri, 24 Aug 2007 11:55:59 +0900
Yoichi Yuasa <[email protected]> wrote:
> Hi,
>
> I got the following error on MIPS Cobalt.
>
> PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
> pata_via 0000:00:09.1: failed to request/iomap BARs for port 0 (errno=-16)
> PCI: Unable to reserve I/O region #3:8@f0000170 for device 0000:00:09.1
> pata_via 0000:00:09.1: failed to request/iomap BARs for port 1 (errno=-16)
> pata_via 0000:00:09.1: no available native port
>
> The legacy mode IDE resources set the following order.
>
> pci_setup_device()
> Legacy mode ATA controllers have fixed addresses.
> IDE resources: 0x1F0-0x1F7, 0x3F6, 0x170-0x177, 0x376
> |
> V
> pcibios_fixup_bus()
> MIPS Cobalt PCI bus regions have the -0x10000000 offset from PCI resources.
> pcibios_fixup_bus() fix PCI bus regions.
> 0x1F0 - 0x10000000 = 0xF00001F0
> |
> V
> ata_pci_init_one()
> PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
>
> In some architectures, PCI bus regions have the offset from PCI resources.
> For this reason, pci_setup_device() should set PCI bus regions to dev->resource[].
>
> Yoichi
>
> ---
>
> Fix legacy mode IDE resources
>
> Signed-off-by: Yoichi Yuasa <[email protected]>
>
> diff -pruN -X generic/Documentation/dontdiff generic-orig/drivers/pci/probe.c generic/drivers/pci/probe.c
> --- generic-orig/drivers/pci/probe.c 2007-07-26 17:07:44.151670750 +0900
> +++ generic/drivers/pci/probe.c 2007-07-26 17:25:42.227046250 +0900
> @@ -744,22 +744,40 @@ static int pci_setup_device(struct pci_d
> */
> if (class == PCI_CLASS_STORAGE_IDE) {
> u8 progif;
> + struct pci_bus_region region;
> + struct resource resource;
> pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
> if ((progif & 1) == 0) {
> - dev->resource[0].start = 0x1F0;
> - dev->resource[0].end = 0x1F7;
> - dev->resource[0].flags = LEGACY_IO_RESOURCE;
> - dev->resource[1].start = 0x3F6;
> - dev->resource[1].end = 0x3F6;
> - dev->resource[1].flags = LEGACY_IO_RESOURCE;
> + resource.start = 0x1F0;
> + resource.end = 0x1F7;
> + resource.flags = LEGACY_IO_RESOURCE;
> + pcibios_resource_to_bus(dev, ®ion, &resource);
> + dev->resource[0].start = region.start;
> + dev->resource[0].end = region.end;
> + dev->resource[0].flags = resource.flags;
> + resource.start = 0x3F6;
> + resource.end = 0x3F6;
> + resource.flags = LEGACY_IO_RESOURCE;
> + pcibios_resource_to_bus(dev, ®ion, &resource);
> + dev->resource[1].start = region.start;
> + dev->resource[1].end = region.end;
> + dev->resource[1].flags = resource.flags;
> }
> if ((progif & 4) == 0) {
> - dev->resource[2].start = 0x170;
> - dev->resource[2].end = 0x177;
> - dev->resource[2].flags = LEGACY_IO_RESOURCE;
> - dev->resource[3].start = 0x376;
> - dev->resource[3].end = 0x376;
> - dev->resource[3].flags = LEGACY_IO_RESOURCE;
> + resource.start = 0x170;
> + resource.end = 0x177;
> + resource.flags = LEGACY_IO_RESOURCE;
> + pcibios_resource_to_bus(dev, ®ion, &resource);
> + dev->resource[2].start = region.start;
> + dev->resource[2].end = region.end;
> + dev->resource[2].flags = resource.flags;
> + resource.start = 0x376;
> + resource.end = 0x376;
> + resource.flags = LEGACY_IO_RESOURCE;
> + pcibios_resource_to_bus(dev, ®ion, &resource);
> + dev->resource[3].start = region.start;
> + dev->resource[3].end = region.end;
> + dev->resource[3].flags = resource.flags;
> }
> }
> break;
ho hum.
Below is the patch from Jan (which I'll now need to drop) which we are, in
a rather haphazard manner, trying to get into some sort of working shape.
Please discuss.
From: Jan Beulich <[email protected]>
Fix http://bugzilla.kernel.org/show_bug.cgi?id=8187
The change to force legacy mode IDE channels' resources to fixed non-zero
values confuses (at least some versions of) X, because the values reported by
the kernel and those readable from PCI config space aren't consistent anymore.
Therefore, this patch arranges for the respective BARs to also get updated if
possible.
[[email protected]: <alan>Just remove that chunk</aman>]
Signed-off-by: Jan Beulich <[email protected]>
Cc: Kristofer T. Karas" <[email protected]>
Cc: Bartlomiej Zolnierkiewicz <[email protected]>
Cc: Alan Cox <[email protected]>
Cc: Natalie Protasevich <[email protected]>
Cc: Greg KH <[email protected]>
Cc: Gabriel C <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
---
drivers/pci/probe.c | 40 +++++++++++++++++++++++++++-------------
1 files changed, 27 insertions(+), 13 deletions(-)
diff -puN drivers/pci/probe.c~pci-align-bar-settings-for-legacy-mode-ide drivers/pci/probe.c
--- a/drivers/pci/probe.c~pci-align-bar-settings-for-legacy-mode-ide
+++ a/drivers/pci/probe.c
@@ -741,7 +741,29 @@ static void pci_read_irq(struct pci_dev
dev->irq = irq;
}
-#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
+static void change_legacy_io_resource(struct pci_dev * dev, unsigned index,
+ resource_size_t start, resource_size_t end)
+{
+ resource_size_t base = start & PCI_BASE_ADDRESS_IO_MASK;
+ resource_size_t len = (end | ~PCI_BASE_ADDRESS_IO_MASK) - base + 1;
+
+ if (pci_resource_len(dev, index) != len) {
+ printk(KERN_WARNING "%s: cannot adjust BAR%u (size %Lx)\n",
+ pci_name(dev), index,
+ (unsigned long long)pci_resource_len(dev, index));
+ } else {
+ printk(KERN_INFO "%s: trying to change BAR%u from %Lx to %Lx\n",
+ pci_name(dev), index,
+ (unsigned long long)pci_resource_start(dev, index),
+ (unsigned long long)base);
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + index * 4,
+ base);
+ }
+ pci_resource_start(dev, index) = start;
+ pci_resource_end(dev, index) = end;
+ pci_resource_flags(dev, index) = IORESOURCE_IO|IORESOURCE_PCI_FIXED|
+ PCI_BASE_ADDRESS_SPACE_IO;
+}
/**
* pci_setup_device - fill in class and map information of a device
@@ -795,20 +817,12 @@ static int pci_setup_device(struct pci_d
u8 progif;
pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
if ((progif & 1) == 0) {
- dev->resource[0].start = 0x1F0;
- dev->resource[0].end = 0x1F7;
- dev->resource[0].flags = LEGACY_IO_RESOURCE;
- dev->resource[1].start = 0x3F6;
- dev->resource[1].end = 0x3F6;
- dev->resource[1].flags = LEGACY_IO_RESOURCE;
+ change_legacy_io_resource(dev, 0, 0x1F0, 0x1F7);
+ change_legacy_io_resource(dev, 1, 0x3F6, 0x3F6);
}
if ((progif & 4) == 0) {
- dev->resource[2].start = 0x170;
- dev->resource[2].end = 0x177;
- dev->resource[2].flags = LEGACY_IO_RESOURCE;
- dev->resource[3].start = 0x376;
- dev->resource[3].end = 0x376;
- dev->resource[3].flags = LEGACY_IO_RESOURCE;
+ change_legacy_io_resource(dev, 2, 0x170, 0x177);
+ change_legacy_io_resource(dev, 3, 0x376, 0x376);
}
}
break;
_
On Fri, Aug 24, 2007 at 05:37:13PM +0100, Alan Cox wrote:
> >> PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
> > >
> > > In some architectures, PCI bus regions have the offset from PCI resources.
> > > For this reason, pci_setup_device() should set PCI bus regions to dev->resource[].
> >
> > I thought this patch was rejected in the past as it broke other
> > machines.
>
> News to me.
>
> Ths one looks sane and is different to the one Andrew has been fiddling
> with to stop broken X servers from crashing.
Ok, I confused it with that one, sorry. But as this is in the same
area, some one needs to sort it all out :(
thanks,
greg k-h
>Please discuss.
I don't think there's much to discuss - Yoichi Yuasa's changes can be simply
brought through to the other patch (of which I continue to only state that X
has a problem, the patch fixes it for me [and perhaps *only* me], and afaik
X itself still hasn't been fixed in this respect).
Jan
* Alan Cox <[email protected]> [2007-08-24 17:37]:
> >> PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
> > > In some architectures, PCI bus regions have the offset from PCI resources.
> > > For this reason, pci_setup_device() should set PCI bus regions to dev->resource[].
> >
> > I thought this patch was rejected in the past as it broke other
> > machines.
>
> News to me.
>
> Ths one looks sane and is different to the one Andrew has been fiddling
> with to stop broken X servers from crashing.
Can this patch be added now or does there have to be more discussion?
I need this patch for IDE and PATA to work on my MIPS Cobalt.
Yoichi's original patch and explanation can be found at
http://lkml.org/lkml/2007/8/23/411
--
Martin Michlmayr
http://www.cyrius.com/
On Fri, 28 Sep 2007 10:48:41 +0200
Martin Michlmayr <[email protected]> wrote:
> * Alan Cox <[email protected]> [2007-08-24 17:37]:
> > >> PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
> > > > In some architectures, PCI bus regions have the offset from PCI resources.
> > > > For this reason, pci_setup_device() should set PCI bus regions to dev->resource[].
> > >
> > > I thought this patch was rejected in the past as it broke other
> > > machines.
> >
> > News to me.
> >
> > Ths one looks sane and is different to the one Andrew has been fiddling
> > with to stop broken X servers from crashing.
>
> Can this patch be added now or does there have to be more discussion?
> I need this patch for IDE and PATA to work on my MIPS Cobalt.
> Yoichi's original patch and explanation can be found at
> http://lkml.org/lkml/2007/8/23/411
I've no idea why it hasn't been applied unless nobody is quite sure who
owns it. As a PCI fix I guess Greg does (and drop it into -mm for
testing) ?
* Alan Cox <[email protected]> [2007-09-28 11:14]:
> > I need this patch for IDE and PATA to work on my MIPS Cobalt.
> > Yoichi's original patch and explanation can be found at
> > http://lkml.org/lkml/2007/8/23/411
>
> I've no idea why it hasn't been applied unless nobody is quite sure who
> owns it. As a PCI fix I guess Greg does (and drop it into -mm for
> testing) ?
I was also hoping Jeff would comment on the patch.
--
Martin Michlmayr
http://www.cyrius.com/
Martin Michlmayr wrote:
> * Alan Cox <[email protected]> [2007-09-28 11:14]:
>>> I need this patch for IDE and PATA to work on my MIPS Cobalt.
>>> Yoichi's original patch and explanation can be found at
>>> http://lkml.org/lkml/2007/8/23/411
>> I've no idea why it hasn't been applied unless nobody is quite sure who
>> owns it. As a PCI fix I guess Greg does (and drop it into -mm for
>> testing) ?
>
> I was also hoping Jeff would comment on the patch.
What sort of comment were you seeking? :)
Jeff
* Jeff Garzik <[email protected]> [2007-09-28 06:23]:
>>>> Yoichi's original patch and explanation can be found at
>>>> http://lkml.org/lkml/2007/8/23/411
>>> I've no idea why it hasn't been applied unless nobody is quite sure who
>>> owns it. As a PCI fix I guess Greg does (and drop it into -mm for
>>> testing) ?
>> I was also hoping Jeff would comment on the patch.
>
> What sort of comment were you seeking? :)
A comment whether this is the right approach. You asked for a
rationale when Yoichi originally submitted the patch in July but then
never responded to his explanation:
http://marc.info/?l=linux-kernel&m=118564639820460&w=2
--
Martin Michlmayr
http://www.cyrius.com/
Martin Michlmayr wrote:
> * Jeff Garzik <[email protected]> [2007-09-28 06:23]:
>>>>> Yoichi's original patch and explanation can be found at
>>>>> http://lkml.org/lkml/2007/8/23/411
>>>> I've no idea why it hasn't been applied unless nobody is quite sure who
>>>> owns it. As a PCI fix I guess Greg does (and drop it into -mm for
>>>> testing) ?
>>> I was also hoping Jeff would comment on the patch.
>> What sort of comment were you seeking? :)
>
> A comment whether this is the right approach. You asked for a
> rationale when Yoichi originally submitted the patch in July but then
> never responded to his explanation:
> http://marc.info/?l=linux-kernel&m=118564639820460&w=2
His explanation sounded sane enough :)
Jeff