2008-03-07 21:05:45

by Stephane Eranian

[permalink] [raw]
Subject: [PATCH 0/3] perfmon x86 infrastructure definitions (take 2)

Hello,

Take 2: correct titles and no attachment.

Here is a small set of patches for x86. They are used by perfmon
but they can be applied independently.

patch 1: adds cpu_has_arch_perfmon to cpufeature macros to test for
architectural perfmon on Intel processors
patch 2: adds AMD Northbridge config MSR definition
patch 3: adds AMD Northbridge PCI Id

Please apply.
Thanks.


2008-03-10 07:53:19

by Ingo Molnar

[permalink] [raw]
Subject: Re: [PATCH 0/3] perfmon x86 infrastructure definitions (take 2)


* stephane eranian <[email protected]> wrote:

> Hello,
>
> Take 2: correct titles and no attachment.

note, all the patches were whitespace damaged (all tabs were spaces). I
fixed this up by hand but please check Documentation/email-clients.txt.

> Here is a small set of patches for x86. They are used by perfmon but
> they can be applied independently.
>
> patch 1: adds cpu_has_arch_perfmon to cpufeature macros to test for
> architectural perfmon on Intel processors
> patch 2: adds AMD Northbridge config MSR definition
> patch 3: adds AMD Northbridge PCI Id

i've added all three to x86.git for convenience, but the PCI ID will
need to go via Greg KH's PCI tree i suspect.

Ingo

2008-03-11 16:37:30

by Stephane Eranian

[permalink] [raw]
Subject: Re: [PATCH 0/3] perfmon x86 infrastructure definitions (take 2)

Ingo,

Thanks. Will send the PCI id patch to Greg KH.


On Mon, Mar 10, 2008 at 12:52 AM, Ingo Molnar <[email protected]> wrote:
>
> * stephane eranian <[email protected]> wrote:
>
> > Hello,
> >
> > Take 2: correct titles and no attachment.
>
> note, all the patches were whitespace damaged (all tabs were spaces). I
> fixed this up by hand but please check Documentation/email-clients.txt.
>
>
> > Here is a small set of patches for x86. They are used by perfmon but
> > they can be applied independently.
> >
> > patch 1: adds cpu_has_arch_perfmon to cpufeature macros to test for
> > architectural perfmon on Intel processors
> > patch 2: adds AMD Northbridge config MSR definition
> > patch 3: adds AMD Northbridge PCI Id
>
> i've added all three to x86.git for convenience, but the PCI ID will
> need to go via Greg KH's PCI tree i suspect.
>
> Ingo
>