From: Krzysztof Helt <[email protected]>
The AMD K6-2 cpus have 2 mtrr registers
which are not detected by the latest Linux
kernel.
The mtrr capability is not reported through
the cpuid on these cpus. This fools early
detection function [mtrr_bp_init()] as the
mtrr capability bit is set later in
the init_amd() function.
Fix it by setting the K6 mtrr capability bit
just before the check in mtrr_bp_init().
The added condition is copied from the init_amd().
Signed-off-by: Krzysztof Helt <[email protected]>
---
It seems that the same problem affects Cyrix and
Centaur/VIA cpus. Can some x86 guy inspect the
mtrr initialization code ?
arch/x86/kernel/cpu/mtrr/main.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 58ac5d3..4bef914 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -1612,6 +1612,12 @@ void __init mtrr_bp_init(void)
} else {
switch (boot_cpu_data.x86_vendor) {
case X86_VENDOR_AMD:
+ if (boot_cpu_data.x86_model == 13 ||
+ boot_cpu_data.x86_model == 9 ||
+ (boot_cpu_data.x86_model == 8 &&
+ boot_cpu_data.x86_mask >= 8))
+ set_cpu_cap(&boot_cpu_data,
+ X86_FEATURE_K6_MTRR);
if (cpu_has_k6_mtrr) {
/* Pre-Athlon (K6) AMD CPU MTRRs */
mtrr_if = mtrr_ops[X86_VENDOR_AMD];
--
1.5.2.2
Krzysztof Helt wrote:
>
> It seems that the same problem affects Cyrix and
> Centaur/VIA cpus. Can some x86 guy inspect the
> mtrr initialization code ?
>
*GROAN*
I would prefer if we could move the CPU detection code before the MTRR
code; I don't think there is an inherent reason why we shouldn't be able
to. It would be much preferrable to scattering all kinds of CPU
detection information all over the system.
I am going to be away today so I can't look at this myself until
tomorrow at the earliest (tomorrow is a holiday here, though, so I can't
promise I'll be around then either.)
-hpa
On Sun, Aug 31, 2008 at 7:53 AM, H. Peter Anvin <[email protected]> wrote:
> Krzysztof Helt wrote:
>>
>> It seems that the same problem affects Cyrix and
>> Centaur/VIA cpus. Can some x86 guy inspect the
>> mtrr initialization code ?
>>
>
> *GROAN*
>
> I would prefer if we could move the CPU detection code before the MTRR code;
> I don't think there is an inherent reason why we shouldn't be able to. It
> would be much preferrable to scattering all kinds of CPU detection
> information all over the system.
>
> I am going to be away today so I can't look at this myself until tomorrow at
> the earliest (tomorrow is a holiday here, though, so I can't promise I'll be
> around then either.)
>
will send one for Helt to test it...
YH