Hi Pierre
Here is a patch which adds 8-bit bus width suport to the mmc
driver common part.
I've tested it with a test board with 8-bit eMMC device on Omap
3420 HSMMC controller. It speeds up DMA transfer from host to the
card and most of the time is spent in busy polling for the card
to become ready.
Regards
Jarkko Lavinen
>From d038f6ebe177f3f4ae2ae1f8a9dfc648e5625909 Mon Sep 17 00:00:00 2001
From: Jarkko Lavinen <[email protected]>
Date: Mon, 17 Nov 2008 14:30:17 +0200
Subject: [PATCH] MMC: Add 8-bit bus width support
Signed-off-by: Jarkko Lavinen <[email protected]>
---
drivers/mmc/core/mmc.c | 18 ++++++++++++++----
include/linux/mmc/host.h | 2 ++
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index fdd7c76..c232d11 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -434,13 +434,24 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
* Activate wide bus (if supported).
*/
if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
- (host->caps & MMC_CAP_4_BIT_DATA)) {
+ (host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) {
+ unsigned ext_csd_bit, bus_width;
+
+ if (host->caps & MMC_CAP_8_BIT_DATA) {
+ ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
+ bus_width = MMC_BUS_WIDTH_8;
+ } else {
+ ext_csd_bit = EXT_CSD_BUS_WIDTH_4;
+ bus_width = MMC_BUS_WIDTH_4;
+ }
+
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
- EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_4);
+ EXT_CSD_BUS_WIDTH, ext_csd_bit);
+
if (err)
goto free_card;
- mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4);
+ mmc_set_bus_width(card->host, bus_width);
}
if (!oldcard)
@@ -624,4 +635,3 @@ err:
return err;
}
-
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index f842f23..4e45725 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -41,6 +41,7 @@ struct mmc_ios {
#define MMC_BUS_WIDTH_1 0
#define MMC_BUS_WIDTH_4 2
+#define MMC_BUS_WIDTH_8 3
unsigned char timing; /* timing specification used */
@@ -116,6 +117,7 @@ struct mmc_host {
#define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
#define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
#define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
+#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
/* host specific block data */
unsigned int max_seg_size; /* see blk_queue_max_segment_size */
--
1.5.6.5
On Mon, Nov 17, 2008 at 02:35:21PM +0200, Jarkko Lavinen wrote:
> Hi Pierre
>
> Here is a patch which adds 8-bit bus width suport to the mmc
> driver common part.
>
> I've tested it with a test board with 8-bit eMMC device on Omap
> 3420 HSMMC controller. It speeds up DMA transfer from host to the
> card and most of the time is spent in busy polling for the card
> to become ready.
I'll try and give this a test on the S3C6410, which has the option
of having channel 1 being 8bit. Any idea of cards that support 8bit?
> Regards
> Jarkko Lavinen
>
> >From d038f6ebe177f3f4ae2ae1f8a9dfc648e5625909 Mon Sep 17 00:00:00 2001
> From: Jarkko Lavinen <[email protected]>
> Date: Mon, 17 Nov 2008 14:30:17 +0200
> Subject: [PATCH] MMC: Add 8-bit bus width support
>
> Signed-off-by: Jarkko Lavinen <[email protected]>
> ---
> drivers/mmc/core/mmc.c | 18 ++++++++++++++----
> include/linux/mmc/host.h | 2 ++
> 2 files changed, 16 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index fdd7c76..c232d11 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -434,13 +434,24 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
> * Activate wide bus (if supported).
> */
> if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
> - (host->caps & MMC_CAP_4_BIT_DATA)) {
> + (host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) {
> + unsigned ext_csd_bit, bus_width;
> +
> + if (host->caps & MMC_CAP_8_BIT_DATA) {
> + ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
> + bus_width = MMC_BUS_WIDTH_8;
> + } else {
> + ext_csd_bit = EXT_CSD_BUS_WIDTH_4;
> + bus_width = MMC_BUS_WIDTH_4;
> + }
> +
> err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
> - EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_4);
> + EXT_CSD_BUS_WIDTH, ext_csd_bit);
> +
> if (err)
> goto free_card;
>
> - mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4);
> + mmc_set_bus_width(card->host, bus_width);
> }
>
> if (!oldcard)
> @@ -624,4 +635,3 @@ err:
>
> return err;
> }
> -
> diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
> index f842f23..4e45725 100644
> --- a/include/linux/mmc/host.h
> +++ b/include/linux/mmc/host.h
> @@ -41,6 +41,7 @@ struct mmc_ios {
>
> #define MMC_BUS_WIDTH_1 0
> #define MMC_BUS_WIDTH_4 2
> +#define MMC_BUS_WIDTH_8 3
>
> unsigned char timing; /* timing specification used */
>
> @@ -116,6 +117,7 @@ struct mmc_host {
> #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
> #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
> #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
> +#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
>
> /* host specific block data */
> unsigned int max_seg_size; /* see blk_queue_max_segment_size */
> --
> 1.5.6.5
>
> --
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> Please read the FAQ at http://www.tux.org/lkml/
--
Ben ([email protected], http://www.fluff.org/)
'a smiley only costs 4 bytes'
On Mon, Nov 17, 2008 at 12:49:45PM +0000, ext Ben Dooks wrote:
> I'll try and give this a test on the S3C6410, which has the option
> of having channel 1 being 8bit. Any idea of cards that support 8bit?
Hi Ben
Below is sample for HSMMC driver which tells the mmc driver the
host has 8-bit capability and enables it when told to.
The test board has an eMMC chip with 8 data lines connected to
HSMMC controller. I am not aware of mmc cards having 8 pins yet.
Jarkko
>From 8318b7e7fd9a163b1fccf397a1b040d1a4e18d97 Mon Sep 17 00:00:00 2001
From: Jarkko Lavinen <[email protected]>
Date: Mon, 17 Nov 2008 21:05:31 +0200
Subject: [PATCH] OMAP: HSMMC: Add 8-bit bus width mode support
Signed-off-by: Jarkko Lavinen <[email protected]>
---
drivers/mmc/host/omap_hsmmc.c | 10 ++++++++++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 0df6841..28182af 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -75,6 +75,7 @@
#define MSBS (1 << 5)
#define BCE (1 << 1)
#define FOUR_BIT (1 << 1)
+#define DW8 (1 << 5)
#define CC 0x1
#define TC 0x02
#define OD 0x1
@@ -753,6 +754,7 @@ static void omap_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
u16 dsor = 0;
unsigned long regval;
unsigned long timeout;
+ u32 con;
switch (ios->power_mode) {
case MMC_POWER_OFF:
@@ -763,12 +765,18 @@ static void omap_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
break;
}
+ con = OMAP_HSMMC_READ(host->base, CON);
switch (mmc->ios.bus_width) {
+ case MMC_BUS_WIDTH_8:
+ OMAP_HSMMC_WRITE(host->base, CON, con | DW8);
+ break;
case MMC_BUS_WIDTH_4:
+ OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8);
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT);
break;
case MMC_BUS_WIDTH_1:
+ OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8);
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT);
break;
@@ -965,6 +973,8 @@ static int __init omap_mmc_probe(struct platform_device *pdev)
if (pdata->slots[host->slot_id].wires >= 4)
mmc->caps |= MMC_CAP_4_BIT_DATA;
+ if (pdata->slots[host->slot_id].wires >= 8)
+ mmc->caps |= MMC_CAP_8_BIT_DATA;
/* Only MMC1 supports 3.0V */
if (host->id == OMAP_MMC1_DEVID) {
--
1.5.6.5
On Mon, 17 Nov 2008 14:35:21 +0200
Jarkko Lavinen <[email protected]> wrote:
> Hi Pierre
>
> Here is a patch which adds 8-bit bus width suport to the mmc
> driver common part.
>
> I've tested it with a test board with 8-bit eMMC device on Omap
> 3420 HSMMC controller. It speeds up DMA transfer from host to the
> card and most of the time is spent in busy polling for the card
> to become ready.
>
Patch looks ok. I'll see if I can do some testing here. Not sure my MMC
cards are fast enough to notice any difference though...
Rgds
--
-- Pierre Ossman
WARNING: This correspondence is being monitored by the
Swedish government. Make sure your server uses encryption
for SMTP traffic and consider using PGP for end-to-end
encryption.
> I am not aware of mmc cards having 8 pins yet.
Transcend seems to have one that's reasonably available;
NewEgg has the 4GB card for $US 9.50, and Transcend sells
it direct too (at least in the US). I'm a bit curious
what read rates they achieve ... likely not 50 MB/sec!
The relevant search keyword seems to be "MMCplus".
A third use for 8-bit bus widths is the CE-ATA.org stuff
(ATA over MMC) ... I'm not sure how real that is, but the
Seagate website has two "Lyrion" products of 30MB and 60MB
using 8-bit MMC for small disks. I had thought bigger
drives had been announced (e.g. from Samsung, 200+ MB);
maybe they're visible only through OEM channels.
- Dave
David Brownell wrote:
>> I am not aware of mmc cards having 8 pins yet.
>
> Transcend seems to have one that's reasonably available;
> NewEgg has the 4GB card for $US 9.50, and Transcend sells
> it direct too (at least in the US). I'm a bit curious
> what read rates they achieve ... likely not 50 MB/sec!
>
> The relevant search keyword seems to be "MMCplus".
Right. MMCplus and MMCmobile cards are all required to have
8 bit support, and they've been around for years. The catch
is that there have been essentially no controllers out in
the wild which can take advantage of them. Even when the
controller chip supports 8 bit operation, the ODM usually
only connects 4 pins up - and when they actually do, it's
for a controller which we don't know how to control :-)
This OMAP controller is a first.
> A third use for 8-bit bus widths is the CE-ATA.org stuff
> (ATA over MMC) ... I'm not sure how real that is, but the
> Seagate website has two "Lyrion" products of 30MB and 60MB
> using 8-bit MMC for small disks. I had thought bigger
> drives had been announced (e.g. from Samsung, 200+ MB);
> maybe they're visible only through OEM channels.
True - except that CE-ATA wants to signal ATA command completion
on the CMD line which I'm fairly certain requires explicit
hardware level support. In the absence of that, you'd have to
poll.
--phil
On Friday 26 December 2008, Philip Langdale wrote:
> David Brownell wrote:
> >> I am not aware of mmc cards having 8 pins yet.
> >
> > Transcend seems to have one that's reasonably available;
> > NewEgg has the 4GB card for $US 9.50, and Transcend sells
> > it direct too (at least in the US). I'm a bit curious
> > what read rates they achieve ... likely not 50 MB/sec!
> >
> > The relevant search keyword seems to be "MMCplus".
>
> Right. MMCplus and MMCmobile cards are all required to have
> 8 bit support, and they've been around for years.
Specs have been around. Products have been harder
to find, at least at retail, in part because of the
catch you mention:
> The catch
> is that there have been essentially no controllers out in
> the wild which can take advantage of them. Even when the
> controller chip supports 8 bit operation, the ODM usually
> only connects 4 pins up
SD cards only need 4 pins, of course. And until the
8-bit MMC cards get more common, there's not much
point in using those more expensive sockets.
> - and when they actually do, it's
> for a controller which we don't know how to control :-)
>
> This OMAP controller is a first.
OMAP SOCs have a way of doing that for more than one
technology at a time, in my observation. ;)
Right now OMAP3 boards with 8-bit MMC support are widely
available via beagleboard.org ... for $US 150, you get
quite a lot. But end-user boards, vs developer ones,
still don't use those sockets a lot.
> > A third use for 8-bit bus widths is the CE-ATA.org stuff
> > (ATA over MMC) ... I'm not sure how real that is, but the
> > Seagate website has two "Lyrion" products of 30MB and 60MB
> > using 8-bit MMC for small disks. I had thought bigger
> > drives had been announced (e.g. from Samsung, 200+ MB);
> > maybe they're visible only through OEM channels.
>
> True - except that CE-ATA wants to signal ATA command completion
> on the CMD line which I'm fairly certain requires explicit
> hardware level support. In the absence of that, you'd have to
> poll.
ISTR seeing a slide showing four options for that.
Software polling is always possible ... but it's
usually easy to get an IRQ from a spare GPIO line,
the controller need not support that explicitly.
I've seen *one* Linux board with a CE-ATA connector,
and that was the 4-bit version. Presumably when
Linux grows a CE-ATA driver, this issue will get
dealt with.
- Dave
>
> --phil
>
>