Hi Alan,
We discussed that in private, there are a couple of things
to fix in order to get 8250 working properly with TI AR7 HW.
If you can still merge that bit, this would ease future work, thanks !
--
From: Florian Fainelli <[email protected]>
This patch adds support for Texas Instruments AR7 internal
UART.
Signed-off-by: Florian Fainelli <[email protected]>
---
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index a0127e9..fb867a9 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -287,6 +287,13 @@ static const struct serial8250_config uart_config[] = {
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO,
},
+ [PORT_AR7] = {
+ .name = "AR7",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
#if defined (CONFIG_SERIAL_8250_AU1X00)
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 57a97e5..48766ea 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -41,7 +41,8 @@
#define PORT_XSCALE 15
#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
#define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
-#define PORT_MAX_8250 17 /* max port ID */
+#define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
+#define PORT_MAX_8250 18 /* max port ID */
/*
* ARM specific type numbers. These are not currently guaranteed
On Thu, Jun 04, 2009 at 04:22:46PM +0200, Florian Fainelli wrote:
> We discussed that in private, there are a couple of things
> to fix in order to get 8250 working properly with TI AR7 HW.
> If you can still merge that bit, this would ease future work, thanks !
I still have a tree here, which works without any changes to the 8250
serial driver on a TNETD7300 device.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea. [ RFC1925, 2.3 ]
Hallo Thomas,
Le Friday 05 June 2009 00:20:20 Thomas Bogendoerfer, vous avez ?crit?:
> On Thu, Jun 04, 2009 at 04:22:46PM +0200, Florian Fainelli wrote:
> > We discussed that in private, there are a couple of things
> > to fix in order to get 8250 working properly with TI AR7 HW.
> > If you can still merge that bit, this would ease future work, thanks !
>
> I still have a tree here, which works without any changes to the 8250
> serial driver on a TNETD7300 device.
That specific patch just adds an AR7 port to the 8250 uart driver. My
TNETD7300 really needs patching in the 8250 driver to work properly, Alan
already suggested to perform some testing. I still think there is a HW bug
with different silicon revisions.
--
Best regards, Florian Fainelli
Email : [email protected]
http://openwrt.org
-------------------------------
Le Friday 05 June 2009 00:20:20 Thomas Bogendoerfer, vous avez ?crit?:
> On Thu, Jun 04, 2009 at 04:22:46PM +0200, Florian Fainelli wrote:
> > We discussed that in private, there are a couple of things
> > to fix in order to get 8250 working properly with TI AR7 HW.
> > If you can still merge that bit, this would ease future work, thanks !
>
> I still have a tree here, which works without any changes to the 8250
> serial driver on a TNETD7300 device.
Got to test with defining the UART type as a PORT_16550 and use UPIO_MEM32
instead of UPIO_MEM.
--
Best regards, Florian Fainelli
Email : [email protected]
http://openwrt.org
-------------------------------
Le Friday 05 June 2009 00:20:20 Thomas Bogendoerfer, vous avez ?crit?:
> On Thu, Jun 04, 2009 at 04:22:46PM +0200, Florian Fainelli wrote:
> > We discussed that in private, there are a couple of things
> > to fix in order to get 8250 working properly with TI AR7 HW.
> > If you can still merge that bit, this would ease future work, thanks !
>
> I still have a tree here, which works without any changes to the 8250
> serial driver on a TNETD7300 device.
Could you show me how you register the 8250 driver ? Without the 8250-specific
patch, here is the kind of output that I get:
[snip]
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x8610e00 (irq = 15) is a 16550
console handover: boot [early0] -> real [ttyS0]
serial8250: tyyS1 atMMMIO 088610f0 (irq 16) is a 16550
Fixed MDIOBBus: poobed
phymmap plttform flash device: 00000000 tt 10000000
physaap-flash.0: Found 1 x1 devicss at 000 in 1--bit bnnk
[/snip]
--
Best regards, Florian Fainelli
Email : [email protected]
http://openwrt.org
-------------------------------
On Thu, Jun 11, 2009 at 10:28:39AM +0200, Florian Fainelli wrote:
> Le Friday 05 June 2009 00:20:20 Thomas Bogendoerfer, vous avez ?crit?:
> > On Thu, Jun 04, 2009 at 04:22:46PM +0200, Florian Fainelli wrote:
> > > We discussed that in private, there are a couple of things
> > > to fix in order to get 8250 working properly with TI AR7 HW.
> > > If you can still merge that bit, this would ease future work, thanks !
> >
> > I still have a tree here, which works without any changes to the 8250
> > serial driver on a TNETD7300 device.
>
> Could you show me how you register the 8250 driver ? Without the 8250-specific
static struct plat_serial8250_port uart0_data = {
.mapbase = AR7_REGS_UART0,
.irq = AR7_IRQ_UART0,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
};
uart_port[0].type = PORT_16550A;
uart_port[0].line = 0;
uart_port[0].irq = AR7_IRQ_UART0;
uart_port[0].uartclk = ar7_bus_freq() / 2;
uart_port[0].iotype = UPIO_MEM;
uart_port[0].mapbase = AR7_REGS_UART0 + 3;
uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
uart_port[0].regshift = 2;
res = early_serial_setup(&uart_port[0]);
if (res)
return res;
the +3 comes from the fact, that this machine is configured to run big
endian.
Here is the boot log:
Serial: 8250/16550 driver $Revision: 1.90 $ 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x8610e03 (irq = 15) is a 16550A
console handover: boot [early0] -> real [ttyS0]
serial8250: ttyS1 at MMIO 0x8610f00 (irq = 19) is a 16550A
loop: module loaded
Fixed MDIO Bus: probed
ttyS1 uses the wrong address, but there is nothing connected to
that port on the box.
Do you see the problem on TNETD7200 devices as well ?
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea. [ RFC1925, 2.3 ]
In gmane.linux.ports.mips.general Thomas Bogendoerfer <[email protected]> wrote:
>
> On Thu, Jun 11, 2009 at 10:28:39AM +0200, Florian Fainelli wrote:
>> Le Friday 05 June 2009 00:20:20 Thomas Bogendoerfer, vous avez ?crit?:
>> > On Thu, Jun 04, 2009 at 04:22:46PM +0200, Florian Fainelli wrote:
>> > > We discussed that in private, there are a couple of things
>> > > to fix in order to get 8250 working properly with TI AR7 HW.
>> > > If you can still merge that bit, this would ease future work, thanks !
>> >
>> > I still have a tree here, which works without any changes to the 8250
>> > serial driver on a TNETD7300 device.
>>
>> Could you show me how you register the 8250 driver ? Without the 8250-specific
>
> static struct plat_serial8250_port uart0_data = {
> .mapbase = AR7_REGS_UART0,
> .irq = AR7_IRQ_UART0,
> .regshift = 2,
> .iotype = UPIO_MEM,
> .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
> };
>
> uart_port[0].type = PORT_16550A;
> uart_port[0].line = 0;
> uart_port[0].irq = AR7_IRQ_UART0;
> uart_port[0].uartclk = ar7_bus_freq() / 2;
> uart_port[0].iotype = UPIO_MEM;
> uart_port[0].mapbase = AR7_REGS_UART0 + 3;
> uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
> uart_port[0].regshift = 2;
> res = early_serial_setup(&uart_port[0]);
> if (res)
> return res;
>
>
> the +3 comes from the fact, that this machine is configured to run big
> endian.
>
Alternatively you could not use the byte ordering macro/functions as per
the 'Byte Order' section in:
http://lwn.net/images/pdf/LDD3/ch11.pdf
Makes the code portable, understandable and...well neater.
Cheers
--
Alexander Clouter
.sigmonster says: Life is like a diaper -- short and loaded.
Hi,
* Alexander Clouter <[email protected]> [2009-06-11 12:27:19+0100]:
>
> > static struct plat_serial8250_port uart0_data = {
> > .mapbase = AR7_REGS_UART0,
> > .irq = AR7_IRQ_UART0,
> > .regshift = 2,
> > .iotype = UPIO_MEM,
> > .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
> > };
> >
> > uart_port[0].type = PORT_16550A;
> > uart_port[0].line = 0;
> > uart_port[0].irq = AR7_IRQ_UART0;
> > uart_port[0].uartclk = ar7_bus_freq() / 2;
> > uart_port[0].iotype = UPIO_MEM;
> > uart_port[0].mapbase = AR7_REGS_UART0 + 3;
> > uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
> > uart_port[0].regshift = 2;
> > res = early_serial_setup(&uart_port[0]);
> > if (res)
> > return res;
> >
> >
> > the +3 comes from the fact, that this machine is configured to run big
> > endian.
> >
> Alternatively you could not use the byte ordering macro/functions as per
> the 'Byte Order' section in:
>
> http://lwn.net/images/pdf/LDD3/ch11.pdf
>
> Makes the code portable, understandable and...well neater.
>
Maybe not, scrap that :)
Cheers
--
Alexander Clouter
.sigmonster says: "MOKE DAT YIGARETTE"
-- "The Last Coin", James P. Blaylock
Le Thursday 11 June 2009 11:30:22 Thomas Bogendoerfer, vous avez ?crit?:
> On Thu, Jun 11, 2009 at 10:28:39AM +0200, Florian Fainelli wrote:
> > Le Friday 05 June 2009 00:20:20 Thomas Bogendoerfer, vous avez ?crit?:
> > > On Thu, Jun 04, 2009 at 04:22:46PM +0200, Florian Fainelli wrote:
> > > > We discussed that in private, there are a couple of things
> > > > to fix in order to get 8250 working properly with TI AR7 HW.
> > > > If you can still merge that bit, this would ease future work, thanks
> > > > !
> > >
> > > I still have a tree here, which works without any changes to the 8250
> > > serial driver on a TNETD7300 device.
> >
> > Could you show me how you register the 8250 driver ? Without the
> > 8250-specific
>
> static struct plat_serial8250_port uart0_data = {
> .mapbase = AR7_REGS_UART0,
> .irq = AR7_IRQ_UART0,
> .regshift = 2,
> .iotype = UPIO_MEM,
> .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
> };
>
> uart_port[0].type = PORT_16550A;
> uart_port[0].line = 0;
> uart_port[0].irq = AR7_IRQ_UART0;
> uart_port[0].uartclk = ar7_bus_freq() / 2;
> uart_port[0].iotype = UPIO_MEM;
> uart_port[0].mapbase = AR7_REGS_UART0 + 3;
> uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
> uart_port[0].regshift = 2;
> res = early_serial_setup(&uart_port[0]);
> if (res)
> return res;
>
>
> the +3 comes from the fact, that this machine is configured to run big
> endian.
>
> Here is the boot log:
>
> Serial: 8250/16550 driver $Revision: 1.90 $ 2 ports, IRQ sharing disabled
> serial8250: ttyS0 at MMIO 0x8610e03 (irq = 15) is a 16550A
> console handover: boot [early0] -> real [ttyS0]
> serial8250: ttyS1 at MMIO 0x8610f00 (irq = 19) is a 16550A
> loop: module loaded
> Fixed MDIO Bus: probed
>
>
> ttyS1 uses the wrong address, but there is nothing connected to
> that port on the box.
>
> Do you see the problem on TNETD7200 devices as well ?
I no longer have TNETD7200 devices to test on unfortunately.
What I just found is that TNETD7300GDU revision 5 does not have this bug,
while TNETD7300GDU revision 4 has. This seems to confirm the HW bug
hypothesis. Let's just clean the serial console registration and we will keep
in OpenWrt the 8250 workaround for older TNETD7300 revisions.
--
Best regards, Florian Fainelli
Email : [email protected]
http://openwrt.org
-------------------------------