---
Add the macro L1_CACHE_SHIFT into the arch/h8300/include/asm/cache.h
In this architecture, missing L1_CACHE_SHIFT, The iunique() optimize
performance will not work correctly .
---
Signed-off-by: Liuwenyi<[email protected]>
Cc: [email protected]
---
diff --git a/arch/h8300/include/asm/cache.h b/arch/h8300/include/asm/cache.h
index c635028..0a73cd5 100644
--- a/arch/h8300/include/asm/cache.h
+++ b/arch/h8300/include/asm/cache.h
@@ -3,6 +3,7 @@
/* bytes per L1 cache line */
#define L1_CACHE_BYTES 4
+#define L1_CACHE_SHIFT 2
/* m68k-elf-gcc 2.95.2 doesn't like these */
--------------
Best Regards,
Liuweni
2009-11-25