2009-12-17 20:27:16

by Pallipadi, Venkatesh

Subject: [PATCH] x86: Reenable TSC sync check at boot, even with NONSTOP_TSC

Commit 83ce4009 did the following change
If the TSC is constant and non-stop, also set it reliable.

But, there seems to be few systems that will end up with TSC warp across
sockets, depending on how the cpus come out of reset. Skipping TSC sync
test on such systems may result in time inconsistency later.

So, reenable TSC sync test even on constant and non-stop TSC systems.
Set, sched_clock_stable to 1 by default and reset it in
mark_tsc_unstable, if TSC sync fails.

This change still gives perf benefit mentioned in 83ce4009 for systems
where TSC is reliable.

Signed-off-by: Venkatesh Pallipadi <[email protected]>
---
arch/x86/kernel/cpu/intel.c | 1 -
arch/x86/kernel/tsc.c | 1 +
2 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 9c31e8b..879666f 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -70,7 +70,6 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
if (c->x86_power & (1 << 8)) {
set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
- set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
sched_clock_stable = 1;
}

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index cd982f4..597683a 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -763,6 +763,7 @@ void mark_tsc_unstable(char *reason)
{
if (!tsc_unstable) {
tsc_unstable = 1;
+ sched_clock_stable = 0;
printk(KERN_INFO "Marking TSC unstable due to %s\n", reason);
/* Change only the rating, when not registered */
if (clocksource_tsc.mult)
--
1.6.0.6

2009-12-17 21:01:45

by Suresh Siddha

Subject: Re: [PATCH] x86: Reenable TSC sync check at boot, even with NONSTOP_TSC

On Thu, 2009-12-17 at 13:27 -0700, Pallipadi, Venkatesh wrote:
> Commit 83ce4009 did the following change
> If the TSC is constant and non-stop, also set it reliable.
>
> But, there seems to be few systems that will end up with TSC warp across
> sockets, depending on how the cpus come out of reset. Skipping TSC sync
> test on such systems may result in time inconsistency later.
>
> So, reenable TSC sync test even on constant and non-stop TSC systems.
> Set, sched_clock_stable to 1 by default and reset it in
> mark_tsc_unstable, if TSC sync fails.
>
> This change still gives perf benefit mentioned in 83ce4009 for systems
> where TSC is reliable.
>
> Signed-off-by: Venkatesh Pallipadi <[email protected]>

Acked-by: Suresh Siddha <[email protected]>

2009-12-17 23:58:20

by Pallipadi, Venkatesh

Subject: [tip:x86/urgent] x86: Reenable TSC sync check at boot, even with NONSTOP_TSC

Commit-ID: 6c56ccecf05fafe100ab4ea94f6fccbf5ff00db7
Gitweb: http://git.kernel.org/tip/6c56ccecf05fafe100ab4ea94f6fccbf5ff00db7
Author: Pallipadi, Venkatesh <[email protected]>
AuthorDate: Thu, 17 Dec 2009 12:27:02 -0800
Committer: H. Peter Anvin <[email protected]>
CommitDate: Thu, 17 Dec 2009 14:44:35 -0800

x86: Reenable TSC sync check at boot, even with NONSTOP_TSC

Commit 83ce4009 did the following change
If the TSC is constant and non-stop, also set it reliable.

But, there seems to be few systems that will end up with TSC warp across
sockets, depending on how the cpus come out of reset. Skipping TSC sync
test on such systems may result in time inconsistency later.

So, reenable TSC sync test even on constant and non-stop TSC systems.
Set, sched_clock_stable to 1 by default and reset it in
mark_tsc_unstable, if TSC sync fails.

This change still gives perf benefit mentioned in 83ce4009 for systems
where TSC is reliable.

Signed-off-by: Venkatesh Pallipadi <[email protected]>
Acked-by: Suresh Siddha <[email protected]>
LKML-Reference: <[email protected]>
Signed-off-by: H. Peter Anvin <[email protected]>
---
arch/x86/kernel/cpu/intel.c | 1 -
arch/x86/kernel/tsc.c | 1 +
2 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 9c31e8b..879666f 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -70,7 +70,6 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
if (c->x86_power & (1 << 8)) {
set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
- set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
sched_clock_stable = 1;
}

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index cd982f4..597683a 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -763,6 +763,7 @@ void mark_tsc_unstable(char *reason)
{
if (!tsc_unstable) {
tsc_unstable = 1;
+ sched_clock_stable = 0;
printk(KERN_INFO "Marking TSC unstable due to %s\n", reason);
/* Change only the rating, when not registered */
if (clocksource_tsc.mult)