The following changes since commit
bee415ce427d1eab6cfb30221461c7d20cbf1903: Linus Torvalds (1):
Merge branch 'perf-fixes-for-linus' of
git://git.kernel.org/.../tip/linux-2.6-tip
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 linux-next
There are a few somewhat scary bits in this request:
- Bjorn's _CRS data changes
- Yinghai's resource reallocation code
- Rafael's runtime PM code
If you recall, we tried to enable _CRS last release and it caused
trouble, in particular because our existing code couldn't handle the
number of resources provided by some _CRS implementations. Bjorn's
fixed that though, and added code to use _CRS data by default on any
machine made in 2008 or later, which allows it to fix some existing
bugs on machines where pci=use_crs was previously required. Other bugs
requiring the old intel_bus.c code are also fixed by using _CRS by
default, now that the affected machines are running with production
firmware.
Yinghai's code also affects resource allocation. His patchset will
evaluate the resource tree at boot time looking for devices whose
resources couldn't be enabled because their upstream bridge window
wasn't large enough. If it find any, it'll free the associated
resources and re-try, attempting to get a large enough bridge window to
enable affected leaf devices. If that fails, it'll recurse higher into
the resource tree. With luck, it'll manage to make our resource
allocation code more effective by overriding over conservative BIOS
settings and giving Linux access to more device resources.
Finally there's Rafael's PM code. It should be in pretty good shape
now. There may be a few more ACPI changes on the way, but it's seen a
lot of testing in previous iterations, and has seen a lot of review as
well, so hopefully it won't cause any big problems.
Shortlog and diffstat below.
Thanks,
Jesse
Andrew Morton (1):
PCI hotplug: check ioremap() return value in ibmphp_ebda.c
Bjorn Helgaas (5):
PCI: split up pci_read_bridge_bases()
PCI: read bridge windows before filling in subtractive decode resources
PCI: add pci_bus_for_each_resource(), remove direct bus->resource[] refs
PCI: augment bus resource table with a list
x86/PCI: use host bridge _CRS info by default on 2008 and newer machines
Chandru (1):
PCI hotplug: ibmphp: read the length of ebda and map entire ebda region
Dominik Brodowski (2):
resource/PCI: align functions now return start of resource
resource/PCI: mark struct resource as const
Jesse Barnes (1):
PCI hotplug: remove obsolete usage of get_bus_speed from rpaphp hotplug ops
Jiri Slaby (2):
PCI hotplug: fix memory leaks
PCI: hotplug/cpcihp, fix pci device refcounting
Kenji Kaneshige (3):
PCI: mark is_pcie obsolete
PCIe PME: use pci_is_pcie()
PCIe PME: use pci_pcie_cap()
Matthew Wilcox (7):
PCI: Rewrite pci_scan_slot
PCI: Unify pcie_link_speed and pci_bus_speed
PCI: Make current and maximum bus speeds part of the PCI core
PCI: Add support for detection of PCIe and PCI-X bus speeds
PCI: Add support for AGP in cur/max bus speed
PCI: Add support for reporting PCIe 3.0 speeds
PCI: Make pci_scan_slot more robust
Rafael J. Wysocki (10):
PCI: Clean up build for CONFIG_PCI_QUIRKS unset
PCI PM: Add function for checking PME status of devices
PCI PM: PCIe PME root port service driver
PCI PM: Make it possible to force using INTx for PCIe PME signaling
ACPI: Use GPE reference counting to support shared GPEs
ACPI / PM: Add more run-time wake-up fields
ACPI / ACPICA: Multiple system notify handlers per device
PCI / ACPI / PM: Platform support for PCI PME wake-up
PCI PM: Run-time callbacks for PCI bus type
ACPI: Use GPE reference counting to support shared GPEs
Randy Dunlap (1):
PCI hotplug: fix ibmphp build error
Seth Heasley (1):
x86/PCI: irq and pci_ids patch for Intel Cougar Point DeviceIDs
Thomas Gleixner (1):
x86/PCI: Prevent mmconfig memory corruption
Tilman Schmidt (1):
PCI: push deprecated pci_find_device() function to last user
Yinghai Lu (12):
PCI: separate pci_setup_bridge to small functions
resource: add release_child_resources
PCI: don't dump resource when bus resource flags indicates unused
PCI: add pci_bridge_release_resources and pci_bus_release_bridge_resources
PCI: add failed_list to pci_bus_assign_resources
PCI: reject mmio ranges starting at 0 on pci_bridge read
PCI: don't shrink bridge resources
PCI: update bridge resources to get more big ranges in PCI assign unssigned
PCI: introduce pci_assign_unassigned_bridge_resources
PCI: pciehp: cleanup flow in pciehp_configure_device
PCI: pciehp: second try to get big range for pcie devices
PCI: set PCI_PREF_RANGE_TYPE_64 in pci_bridge_check_ranges
Documentation/kernel-parameters.txt | 16 +-
arch/alpha/kernel/pci.c | 6 +-
arch/arm/kernel/bios32.c | 8 +-
arch/cris/arch-v32/drivers/pci/bios.c | 16 +-
arch/frv/mb93090-mb00/pci-frv.c | 16 +-
arch/ia64/include/asm/acpi.h | 1 +
arch/ia64/pci/pci.c | 22 +-
arch/mips/pci/pci.c | 6 +-
arch/mips/pmc-sierra/yosemite/ht.c | 10 +-
arch/mn10300/unit-asb2305/pci-asb2305.c | 16 +-
arch/mn10300/unit-asb2305/pci.c | 6 +-
arch/parisc/kernel/pci.c | 10 +-
arch/powerpc/kernel/pci-common.c | 24 +-
arch/powerpc/platforms/fsl_uli1575.c | 12 +-
arch/sh/drivers/pci/pci.c | 6 +-
arch/sparc/kernel/pci.c | 5 +-
arch/sparc/kernel/pcic.c | 5 +-
arch/x86/include/asm/pci_x86.h | 1 +
arch/x86/pci/acpi.c | 82 +++--
arch/x86/pci/bus_numa.c | 3 +-
arch/x86/pci/bus_numa.h | 3 +-
arch/x86/pci/common.c | 3 +
arch/x86/pci/i386.c | 14 +-
arch/x86/pci/irq.c | 2 +
arch/x86/pci/mmconfig-shared.c | 17 +-
arch/xtensa/kernel/pci.c | 15 +-
drivers/acpi/acpica/acevents.h | 10 +-
drivers/acpi/acpica/aclocal.h | 2 +
drivers/acpi/acpica/acobject.h | 2 +
drivers/acpi/acpica/evgpe.c | 161 ++---------
drivers/acpi/acpica/evgpeblk.c | 87 ++----
drivers/acpi/acpica/evmisc.c | 12 +-
drivers/acpi/acpica/evxface.c | 189 +++++++++---
drivers/acpi/acpica/evxfevnt.c | 96 +++++--
drivers/acpi/button.c | 15 +-
drivers/acpi/ec.c | 28 ++-
drivers/acpi/internal.h | 2 -
drivers/acpi/pci_bind.c | 14 +-
drivers/acpi/pci_root.c | 9 +
drivers/acpi/scan.c | 38 ++-
drivers/acpi/sleep.c | 15 +-
drivers/acpi/system.c | 4 +-
drivers/acpi/wakeup.c | 84 ++----
drivers/isdn/hisax/Kconfig | 18 +-
drivers/isdn/hisax/avm_pci.c | 6 +-
drivers/isdn/hisax/bkm_a4t.c | 2 +-
drivers/isdn/hisax/bkm_a8.c | 2 +-
drivers/isdn/hisax/diva.c | 14 +-
drivers/isdn/hisax/elsa.c | 8 +-
drivers/isdn/hisax/enternow_pci.c | 2 +-
drivers/isdn/hisax/gazel.c | 8 +-
drivers/isdn/hisax/hfc_pci.c | 2 +-
drivers/isdn/hisax/hisax.h | 23 ++
drivers/isdn/hisax/niccy.c | 6 +-
drivers/isdn/hisax/nj_s.c | 2 +-
drivers/isdn/hisax/nj_u.c | 2 +-
drivers/isdn/hisax/sedlbauer.c | 6 +-
drivers/isdn/hisax/telespci.c | 2 +-
drivers/isdn/hisax/w6692.c | 2 +-
drivers/pci/Kconfig | 11 -
drivers/pci/Makefile | 5 +-
drivers/pci/bus.c | 56 ++++-
drivers/pci/hotplug/acpiphp_core.c | 2 -
drivers/pci/hotplug/cpcihp_generic.c | 1 +
drivers/pci/hotplug/cpqphp.h | 2 -
drivers/pci/hotplug/cpqphp_core.c | 57 +---
drivers/pci/hotplug/cpqphp_ctrl.c | 27 +-
drivers/pci/hotplug/ibmphp_core.c | 106 ++-----
drivers/pci/hotplug/ibmphp_ebda.c | 13 +-
drivers/pci/hotplug/ibmphp_hpc.c | 1 +
drivers/pci/hotplug/pci_hotplug_core.c | 132 --------
drivers/pci/hotplug/pciehp_core.c | 25 --
drivers/pci/hotplug/pciehp_ctrl.c | 1 +
drivers/pci/hotplug/pciehp_hpc.c | 72 +----
drivers/pci/hotplug/pciehp_pci.c | 23 +-
drivers/pci/hotplug/rpaphp_core.c | 24 +-
drivers/pci/hotplug/shpchp.h | 2 -
drivers/pci/hotplug/shpchp_core.c | 35 ---
drivers/pci/hotplug/shpchp_ctrl.c | 14 +-
drivers/pci/hotplug/shpchp_hpc.c | 149 +++++-----
drivers/pci/hotplug/shpchp_sysfs.c | 9 +-
drivers/pci/legacy.c | 34 --
drivers/pci/pci-acpi.c | 211 +++++++++++++
drivers/pci/pci-driver.c | 160 ++++++++--
drivers/pci/pci.c | 157 +++++++++-
drivers/pci/pci.h | 16 +
drivers/pci/pcie/Kconfig | 4 +
drivers/pci/pcie/Makefile | 2 +
drivers/pci/pcie/pme/Makefile | 8 +
drivers/pci/pcie/pme/pcie_pme.c | 505 ++++++++++++++++++++++++++++++
drivers/pci/pcie/pme/pcie_pme.h | 28 ++
drivers/pci/pcie/pme/pcie_pme_acpi.c | 54 ++++
drivers/pci/pcie/portdrv.h | 17 +
drivers/pci/pcie/portdrv_core.c | 12 +-
drivers/pci/pcie/portdrv_pci.c | 27 ++
drivers/pci/probe.c | 292 ++++++++++++++++--
drivers/pci/quirks.c | 14 +-
drivers/pci/setup-bus.c | 506 +++++++++++++++++++++++++++----
drivers/pci/slot.c | 55 ++++
drivers/pcmcia/rsrc_mgr.c | 13 +-
drivers/pcmcia/rsrc_nonstatic.c | 25 +-
drivers/pcmcia/yenta_socket.c | 5 +-
include/acpi/acpi_bus.h | 6 +
include/acpi/acpi_drivers.h | 1 +
include/acpi/acpixf.h | 6 +-
include/acpi/actypes.h | 28 +--
include/linux/ioport.h | 7 +-
include/linux/pci-acpi.h | 7 +
include/linux/pci.h | 109 +++++--
include/linux/pci_hotplug.h | 41 +---
include/linux/pci_ids.h | 3 +
kernel/power/Kconfig | 5 +
kernel/resource.c | 44 +++-
113 files changed, 3007 insertions(+), 1360 deletions(-)
delete mode 100644 drivers/pci/legacy.c
create mode 100644 drivers/pci/pcie/pme/Makefile
create mode 100644 drivers/pci/pcie/pme/pcie_pme.c
create mode 100644 drivers/pci/pcie/pme/pcie_pme.h
create mode 100644 drivers/pci/pcie/pme/pcie_pme_acpi.c
--
Jesse Barnes, Intel Open Source Technology Center
On Fri, 26 Feb 2010, Jesse Barnes wrote:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 linux-next
>
> There are a few somewhat scary bits in this request:
> - Bjorn's _CRS data changes
> - Yinghai's resource reallocation code
> - Rafael's runtime PM code
Yinghai's resource reallocation code is broken.
I just bisected a Nouveau boot failure to commit 977d17bb17 ("PCI: update
bridge resources to get more big ranges in PCI assign unssigned"), and I'm
going to revert that today one unless I can get a patch that fixes it for
me.
Attached is good/bad versions of
- dmesg
- /proc/iomem
- lspci -vvxxx
and note how the bad run is missing this whole thing from iomem:
-d0000000-efffffff : PCI Bus 0000:02
- d0000000-efffffff : PCI Bus 0000:03
- d0000000-dfffffff : PCI Bus 0000:05
- d0000000-dfffffff : 0000:05:00.0
- e0000000-efffffff : PCI Bus 0000:04
- e0000000-efffffff : 0000:04:00.0
which is why Nouveau no longer works.
Linus
On Sun, 28 Feb 2010, Linus Torvalds wrote:
>
> I just bisected a Nouveau boot failure to commit 977d17bb17 ("PCI: update
> bridge resources to get more big ranges in PCI assign unssigned"), and I'm
> going to revert that today one unless I can get a patch that fixes it for
> me.
Btw, it's not just bisected, I also verified that a revert on top of the
current git tree does fix it for me.
Linus
On Feb 28, 2010, at 12:46 PM, Linus Torvalds <[email protected]
> wrote:
>
>
> On Sun, 28 Feb 2010, Linus Torvalds wrote:
>>
>> I just bisected a Nouveau boot failure to commit 977d17bb17 ("PCI:
>> update
>> bridge resources to get more big ranges in PCI assign unssigned"),
>> and I'm
>> going to revert that today one unless I can get a patch that fixes
>> it for
>> me.
>
> Btw, it's not just bisected, I also verified that a revert on top of
> the
> current git tree does fix it for me.
Sorry for that
Maybe we need to put back pci=try=num back
And set pci_try_num=1 by default
Yinghai
On Sun, 28 Feb 2010, Yinghai wrote:
>
> Maybe we need to put back pci=try=num back
> And set pci_try_num=1 by default
Well, why does your patch trigger any changes at all in the first place?
The old situation was fine. All the resources were mapped.
Sure, there were ROM resources that aren't even enabled, but that is
_normal_. Iirc, several graphics chips actually alias the ROM resources
with the regular memory-mapped IO resource, ie you can't even map both of
them at the same time at some separate address, because the hardware
shares address decoding resources.
There's a reson PCI ROM resources are treated specially by the kernel.
And as far as I can see, all the other resources are already allocated
even without your patch. So there is some fundamental _bug_ there. This is
not about enabling/disabling your patch, this is about your patch
apparently simply being wrong.
But maybe I'm missing something.
Linus
On 02/28/2010 01:19 PM, Linus Torvalds wrote:
>
>
> On Sun, 28 Feb 2010, Yinghai wrote:
>>
>> Maybe we need to put back pci=try=num back
>> And set pci_try_num=1 by default
>
> Well, why does your patch trigger any changes at all in the first place?
> The old situation was fine. All the resources were mapped.
>
> Sure, there were ROM resources that aren't even enabled, but that is
> _normal_. Iirc, several graphics chips actually alias the ROM resources
> with the regular memory-mapped IO resource, ie you can't even map both of
> them at the same time at some separate address, because the hardware
> shares address decoding resources.
>
> There's a reson PCI ROM resources are treated specially by the kernel.
>
> And as far as I can see, all the other resources are already allocated
> even without your patch. So there is some fundamental _bug_ there. This is
> not about enabling/disabling your patch, this is about your patch
> apparently simply being wrong.
>
looks like
[ 0.942502] pci 0000:04:00.0: reg 10: [mem 0xc6000000-0xc6ffffff]
[ 0.942510] pci 0000:04:00.0: reg 14: [mem 0xe0000000-0xefffffff 64bit pref]
[ 0.942519] pci 0000:04:00.0: reg 1c: [mem 0xc4000000-0xc5ffffff 64bit]
[ 0.942523] pci 0000:04:00.0: reg 24: [io 0x3000-0x307f]
[ 0.942528] pci 0000:04:00.0: reg 30: [mem 0xfffe0000-0xffffffff pref]
[ 0.942558] pci 0000:03:00.0: PCI bridge to [bus 04-04]
[ 0.942613] pci 0000:03:00.0: bridge window [io 0x3000-0x3fff]
[ 0.942616] pci 0000:03:00.0: bridge window [mem 0xc4000000-0xc6ffffff]
[ 0.942619] pci 0000:03:00.0: bridge window [mem 0xe0000000-0xefffffff 64bit pref]
[ 0.942657] pci 0000:05:00.0: reg 10: [mem 0xc2000000-0xc2ffffff]
[ 0.942665] pci 0000:05:00.0: reg 14: [mem 0xd0000000-0xdfffffff 64bit pref]
[ 0.942675] pci 0000:05:00.0: reg 1c: [mem 0xc0000000-0xc1ffffff 64bit]
[ 0.942679] pci 0000:05:00.0: reg 24: [io 0x2000-0x207f]
[ 0.942684] pci 0000:05:00.0: reg 30: [mem 0xfffe0000-0xffffffff pref]
[ 0.942715] pci 0000:03:02.0: PCI bridge to [bus 05-05]
[ 0.942770] pci 0000:03:02.0: bridge window [io 0x2000-0x2fff]
[ 0.942773] pci 0000:03:02.0: bridge window [mem 0xc0000000-0xc2ffffff]
[ 0.942777] pci 0000:03:02.0: bridge window [mem 0xd0000000-0xdfffffff 64bit pref]
later
[ 0.977506] pci 0000:04:00.0: no compatible bridge window for [mem 0xfffe0000-0xffffffff pref]
[ 0.977575] pci 0000:05:00.0: no compatible bridge window for [mem 0xfffe0000-0xffffffff pref]
that trigger the reallocating...
it seems old code
1. read out from pci rom bar
2. disable it, if it is enabled, but don't registered it
3. before pci_assign_unassigned..., will check PCI_ASSIGN_ROMS, and could register it...
3. to allocate for ROM bar together with other bar, for disabled or enabled but don't have PCI_ASSIGN_ROMS
4. it will not update the BAR if old setting is not enabled by BIOS.
looks like we should not allocate for those ROM bar at first place?
YH
please check
[PATCH] pci: don't reassign to ROM res if it is not going to be enabled
Signed-off-by: Yinghai Lu <[email protected]>
---
drivers/pci/setup-bus.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -101,9 +101,17 @@ static void __assign_resources_sorted(st
for (list = head->next; list;) {
res = list->res;
idx = res - &list->dev->resource[0];
+
if (pci_assign_resource(list->dev, idx)) {
- if (fail_head && !pci_is_root_bus(list->dev->bus))
- add_to_failed_list(fail_head, list->dev, res);
+ if (fail_head && !pci_is_root_bus(list->dev->bus)) {
+ /*
+ * if the failed res is for ROM BAR, and it will
+ * be enabled later, don't add it to the list
+ */
+ if (!((idx == PCI_ROM_RESOURCE) &&
+ (!(res->flags & IORESOURCE_ROM_ENABLE))))
+ add_to_failed_list(fail_head, list->dev, res);
+ }
res->start = 0;
res->end = 0;
res->flags = 0;
please check
[PATCH] pci: disable pci trying to reallocate pci bridge by default.
it broken Linus's Nouveau
bisected:to commit 977d17bb17
| PCI: update bridge resources to get more big ranges in PCI assign unssigned
so try disable it by default.
Signed-off-by: Yinghai Lu <[email protected]>
---
Documentation/kernel-parameters.txt | 6 ++++++
drivers/pci/pci.c | 4 ++++
drivers/pci/pci.h | 2 ++
drivers/pci/setup-bus.c | 14 +++++++++-----
4 files changed, 21 insertions(+), 5 deletions(-)
Index: linux-2.6/Documentation/kernel-parameters.txt
===================================================================
--- linux-2.6.orig/Documentation/kernel-parameters.txt
+++ linux-2.6/Documentation/kernel-parameters.txt
@@ -1963,6 +1963,12 @@ and is between 256 and 4096 characters.
for broken drivers that don't call it.
skip_isa_align [X86] do not align io start addr, so can
handle more pci cards
+ try=n set the pci_try_num to reallocate the pci bridge resource
+ 1: default
+ 2: will set the num to max_depth, and try to reallocate res
+ to get big range for the bridge. assume the pci peer root
+ resource is right from _CRS or from hostbridge pci reg
+ reading out.
firmware [ARM] Do not re-enumerate the bus but instead
just use the configuration from the
bootloader. This is currently used on
Index: linux-2.6/drivers/pci/pci.c
===================================================================
--- linux-2.6.orig/drivers/pci/pci.c
+++ linux-2.6/drivers/pci/pci.c
@@ -2974,6 +2974,10 @@ static int __init pci_setup(char *str)
pci_no_aer();
} else if (!strcmp(str, "nodomains")) {
pci_no_domains();
+ } else if (!strncmp(str, "try=", 4)) {
+ int try_num = memparse(str + 4, &str);
+ if (try_num > 0)
+ pci_try_num = try_num;
} else if (!strncmp(str, "cbiosize=", 9)) {
pci_cardbus_io_size = memparse(str + 9, &str);
} else if (!strncmp(str, "cbmemsize=", 10)) {
Index: linux-2.6/drivers/pci/pci.h
===================================================================
--- linux-2.6.orig/drivers/pci/pci.h
+++ linux-2.6/drivers/pci/pci.h
@@ -212,6 +212,8 @@ static inline int pci_ari_enabled(struct
return bus->self && bus->self->ari_enabled;
}
+extern int pci_try_num;
+
#ifdef CONFIG_PCI_QUIRKS
extern int pci_is_reassigndev(struct pci_dev *dev);
resource_size_t pci_specified_resource_alignment(struct pci_dev *dev);
Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -869,6 +869,7 @@ static int __init pci_get_max_depth(void
* second and later try will clear small leaf bridge res
* will stop till to the max deepth if can not find good one
*/
+int pci_try_num = 1;
void __init
pci_assign_unassigned_resources(void)
{
@@ -879,14 +880,17 @@ pci_assign_unassigned_resources(void)
unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
IORESOURCE_PREFETCH;
unsigned long failed_type;
- int max_depth = pci_get_max_depth();
- int pci_try_num;
head.next = NULL;
- pci_try_num = max_depth + 1;
- printk(KERN_DEBUG "PCI: max bus depth: %d pci_try_num: %d\n",
- max_depth, pci_try_num);
+ if (pci_try_num > 1) {
+ int max_depth = pci_get_max_depth();
+
+ if (max_depth + 1 > pci_try_num)
+ pci_try_num = max_depth + 1;
+ printk(KERN_DEBUG "PCI: max bus depth: %d pci_try_num: %d\n",
+ max_depth, pci_try_num);
+ }
again:
/* Depth first, calculate sizes and alignments of all
On Sun, 28 Feb 2010 14:41:37 -0800
>
> that trigger the reallocating...
btw we should never ever reallocate if the original layout was anywhere
near remotely sane. Doing that will cause many issues due various
craptastic bioses assuming things are where the bios put it.....
(and other operating systems also normally don't move bars etc unless
things are really b0rked)
--
Arjan van de Ven Intel Open Source Technology Centre
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