Hi,
This patch series makes a couple of small changes to allow the dw_dmac driver
to be used on other platforms in addition to the current Atmel part. This
includes allowing controllers to be marked as private by the platform code and
to allow the source and destination AXI/AHB masters to be defined by the
platform.
Jamie Iles (4):
dmaengine/dw_dmac: don't scan descriptors if no xfers in progress
dmaengine/dw_dmac: allow src/dst masters to be configured at runtime
dmaengine/dw_dmac: provide a mechanism to indicate private devices
avr32: at32ap700x: specify DMA src and dst masters
arch/avr32/mach-at32ap/at32ap700x.c | 6 +++++
drivers/dma/dw_dmac.c | 36 +++++++++++++++++++++-------------
include/linux/dw_dmac.h | 5 ++++
3 files changed, 33 insertions(+), 14 deletions(-)
Some platforms have flexible mastering capabilities and this needs
to be selected at runtime. If the platform has specified private
data in the form of the dw_dma_slave then fetch the source and
destination masters from here. If this isn't present, default to
the previous of 0 and 1.
Cc: Haavard Skinnemoen <[email protected]>
Cc: Dan Williams <[email protected]>
Signed-off-by: Jamie Iles <[email protected]>
---
drivers/dma/dw_dmac.c | 31 +++++++++++++++++--------------
include/linux/dw_dmac.h | 2 ++
2 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index 08c51d4..64024f1 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -32,15 +32,18 @@
* which does not support descriptor writeback.
*/
-/* NOTE: DMS+SMS is system-specific. We should get this information
- * from the platform code somehow.
- */
-#define DWC_DEFAULT_CTLLO (DWC_CTLL_DST_MSIZE(0) \
- | DWC_CTLL_SRC_MSIZE(0) \
- | DWC_CTLL_DMS(0) \
- | DWC_CTLL_SMS(1) \
- | DWC_CTLL_LLP_D_EN \
- | DWC_CTLL_LLP_S_EN)
+#define DWC_DEFAULT_CTLLO(private) ({ \
+ struct dw_dma_slave *__slave = (private); \
+ int dms = __slave ? __slave->dst_master : 0; \
+ int sms = __slave ? __slave->src_master : 1; \
+ \
+ (DWC_CTLL_DST_MSIZE(0) \
+ | DWC_CTLL_SRC_MSIZE(0) \
+ | DWC_CTLL_LLP_D_EN \
+ | DWC_CTLL_LLP_S_EN \
+ | DWC_CTLL_DMS(dms) \
+ | DWC_CTLL_SMS(sms)); \
+ })
/*
* This is configuration-dependent and usually a funny size like 4095.
@@ -591,7 +594,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
else
src_width = dst_width = 0;
- ctllo = DWC_DEFAULT_CTLLO
+ ctllo = DWC_DEFAULT_CTLLO(chan->private)
| DWC_CTLL_DST_WIDTH(dst_width)
| DWC_CTLL_SRC_WIDTH(src_width)
| DWC_CTLL_DST_INC
@@ -672,7 +675,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
switch (direction) {
case DMA_TO_DEVICE:
- ctllo = (DWC_DEFAULT_CTLLO
+ ctllo = (DWC_DEFAULT_CTLLO(chan->private)
| DWC_CTLL_DST_WIDTH(reg_width)
| DWC_CTLL_DST_FIX
| DWC_CTLL_SRC_INC
@@ -717,7 +720,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
}
break;
case DMA_FROM_DEVICE:
- ctllo = (DWC_DEFAULT_CTLLO
+ ctllo = (DWC_DEFAULT_CTLLO(chan->private)
| DWC_CTLL_SRC_WIDTH(reg_width)
| DWC_CTLL_DST_INC
| DWC_CTLL_SRC_FIX
@@ -1129,7 +1132,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
case DMA_TO_DEVICE:
desc->lli.dar = dws->tx_reg;
desc->lli.sar = buf_addr + (period_len * i);
- desc->lli.ctllo = (DWC_DEFAULT_CTLLO
+ desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan->private)
| DWC_CTLL_DST_WIDTH(reg_width)
| DWC_CTLL_SRC_WIDTH(reg_width)
| DWC_CTLL_DST_FIX
@@ -1140,7 +1143,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
case DMA_FROM_DEVICE:
desc->lli.dar = buf_addr + (period_len * i);
desc->lli.sar = dws->rx_reg;
- desc->lli.ctllo = (DWC_DEFAULT_CTLLO
+ desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan->private)
| DWC_CTLL_SRC_WIDTH(reg_width)
| DWC_CTLL_DST_WIDTH(reg_width)
| DWC_CTLL_DST_INC
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h
index c8aad71..8014eb8 100644
--- a/include/linux/dw_dmac.h
+++ b/include/linux/dw_dmac.h
@@ -52,6 +52,8 @@ struct dw_dma_slave {
enum dw_dma_slave_width reg_width;
u32 cfg_hi;
u32 cfg_lo;
+ int src_master;
+ int dst_master;
};
/* Platform-configurable bits in CFG_HI */
--
1.7.2.3
Some platforms (e.g. Picochip PC3XX) have multiple DMA controllers
where some may be used for slave transfers and others for general
purpose memcpy type transfers. Add a .is_private boolean to the
platform data structure so that controllers can be marked as private
so that the DMA_PRIVATE capability will be set for that controller.
Cc: Haavard Skinnemoen <[email protected]>
Cc: Dan Williams <[email protected]>
Signed-off-by: Jamie Iles <[email protected]>
---
drivers/dma/dw_dmac.c | 2 ++
include/linux/dw_dmac.h | 3 +++
2 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index 64024f1..bea304b 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -1341,6 +1341,8 @@ static int __init dw_probe(struct platform_device *pdev)
dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
+ if (pdata->is_private)
+ dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
dw->dma.dev = &pdev->dev;
dw->dma.device_alloc_chan_resources = dwc_alloc_chan_resources;
dw->dma.device_free_chan_resources = dwc_free_chan_resources;
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h
index 8014eb8..deec66b 100644
--- a/include/linux/dw_dmac.h
+++ b/include/linux/dw_dmac.h
@@ -16,9 +16,12 @@
/**
* struct dw_dma_platform_data - Controller configuration parameters
* @nr_channels: Number of channels supported by hardware (max 8)
+ * @is_private: The device channels should be marked as private and not for
+ * by the general purpose DMA channel allocator.
*/
struct dw_dma_platform_data {
unsigned int nr_channels;
+ bool is_private;
};
/**
--
1.7.2.3
Some hardware (picoChip picoXCell in particular) sometimes has
the block transfer complete bit being set for a channel after the
whole transfer has completed. If we don't have any transfers in the
active list then don't bother to scan the descriptors. This often
happens in normal operation and doesn't require the channel to be
reset.
Cc: Haavard Skinnemoen <[email protected]>
Cc: Dan Williams <[email protected]>
Signed-off-by: Jamie Iles <[email protected]>
---
drivers/dma/dw_dmac.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index a3991ab..08c51d4 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -291,6 +291,9 @@ static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
return;
}
+ if (list_empty(&dwc->active_list))
+ return;
+
dev_vdbg(chan2dev(&dwc->chan), "scan_descriptors: llp=0x%x\n", llp);
list_for_each_entry_safe(desc, _desc, &dwc->active_list, desc_node) {
--
1.7.2.3
Now that the dw_dmac DMA driver supports configurable source and
destination masters we need to specify which ones to use. This was
previously hardcoded to 0 and 1 respectively in the driver.
Cc: Hans-Christian Egtvedt <[email protected]>
Signed-off-by: Jamie Iles <[email protected]>
---
arch/avr32/mach-at32ap/at32ap700x.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index e67c999..2747cde 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -2048,6 +2048,8 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
rx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3);
rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
+ rx_dws->src_master = 0;
+ rx_dws->dst_master = 1;
}
/* Check if DMA slave interface for playback should be configured. */
@@ -2056,6 +2058,8 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
tx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
tx_dws->cfg_hi = DWC_CFGH_DST_PER(4);
tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
+ rx_dws->src_master = 0;
+ rx_dws->dst_master = 1;
}
if (platform_device_add_data(pdev, data,
@@ -2128,6 +2132,8 @@ at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data)
dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT;
dws->cfg_hi = DWC_CFGH_DST_PER(2);
dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
+ dws->src_master = 0;
+ dws->dst_master = 1;
if (platform_device_add_data(pdev, data,
sizeof(struct atmel_abdac_pdata)))
--
1.7.2.3
[ copying Haavard's new address ]
On Tue, Nov 23, 2010 at 3:06 AM, Jamie Iles <[email protected]> wrote:
> Some hardware (picoChip picoXCell in particular) sometimes has
> the block transfer complete bit being set for a channel after the
> whole transfer has completed. If we don't have any transfers in the
> active list then don't bother to scan the descriptors. This often
> happens in normal operation and doesn't require the channel to be
> reset.
>
> Cc: Haavard Skinnemoen <[email protected]>
> Cc: Dan Williams <[email protected]>
> Signed-off-by: Jamie Iles <[email protected]>
> ---
> ?drivers/dma/dw_dmac.c | ? ?3 +++
> ?1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
> index a3991ab..08c51d4 100644
> --- a/drivers/dma/dw_dmac.c
> +++ b/drivers/dma/dw_dmac.c
> @@ -291,6 +291,9 @@ static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
> ? ? ? ? ? ? ? ?return;
> ? ? ? ?}
>
> + ? ? ? ?if (list_empty(&dwc->active_list))
> + ? ? ? ? ? ? ? ?return;
> +
> ? ? ? ?dev_vdbg(chan2dev(&dwc->chan), "scan_descriptors: llp=0x%x\n", llp);
>
> ? ? ? ?list_for_each_entry_safe(desc, _desc, &dwc->active_list, desc_node) {
> --
> 1.7.2.3
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to [email protected]
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at ?http://www.tux.org/lkml/
>
On Tue, Nov 23, 2010 at 3:06 AM, Jamie Iles <[email protected]> wrote:
> Hi,
>
> This patch series makes a couple of small changes to allow the dw_dmac driver
> to be used on other platforms in addition to the current Atmel part. This
> includes allowing controllers to be marked as private by the platform code and
> to allow the source and destination AXI/AHB masters to be defined by the
> platform.
>
> Jamie Iles (4):
> ? ? ?dmaengine/dw_dmac: don't scan descriptors if no xfers in progress
> ? ? ?dmaengine/dw_dmac: allow src/dst masters to be configured at runtime
> ? ? ?dmaengine/dw_dmac: provide a mechanism to indicate private devices
> ? ? ?avr32: at32ap700x: specify DMA src and dst masters
>
> ?arch/avr32/mach-at32ap/at32ap700x.c | ? ?6 +++++
> ?drivers/dma/dw_dmac.c ? ? ? ? ? ? ? | ? 36 +++++++++++++++++++++-------------
> ?include/linux/dw_dmac.h ? ? ? ? ? ? | ? ?5 ++++
> ?3 files changed, 33 insertions(+), 14 deletions(-)
Hi,
Looks like this whole series needs to go through the dmaengine tree
but you missed cc'ing me on patch 4/4, found it now.
I'd like an acked-by from Haavard, but otherwise looks good.
--
Dan
[ copying Haavard's new address ]
On Tue, Nov 23, 2010 at 3:06 AM, Jamie Iles <[email protected]> wrote:
> Some platforms have flexible mastering capabilities and this needs
> to be selected at runtime. If the platform has specified private
> data in the form of the dw_dma_slave then fetch the source and
> destination masters from here. If this isn't present, default to
> the previous of 0 and 1.
>
> Cc: Haavard Skinnemoen <[email protected]>
> Cc: Dan Williams <[email protected]>
> Signed-off-by: Jamie Iles <[email protected]>
> ---
> ?drivers/dma/dw_dmac.c ? | ? 31 +++++++++++++++++--------------
> ?include/linux/dw_dmac.h | ? ?2 ++
> ?2 files changed, 19 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
> index 08c51d4..64024f1 100644
> --- a/drivers/dma/dw_dmac.c
> +++ b/drivers/dma/dw_dmac.c
> @@ -32,15 +32,18 @@
> ?* which does not support descriptor writeback.
> ?*/
>
> -/* NOTE: ?DMS+SMS is system-specific. We should get this information
> - * from the platform code somehow.
> - */
> -#define DWC_DEFAULT_CTLLO ? ? ?(DWC_CTLL_DST_MSIZE(0) ? ? ? ? ?\
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | DWC_CTLL_SRC_MSIZE(0) ? ? ? ? \
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | DWC_CTLL_DMS(0) ? ? ? ? ? ? ? \
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | DWC_CTLL_SMS(1) ? ? ? ? ? ? ? \
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | DWC_CTLL_LLP_D_EN ? ? ? ? ? ? \
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | DWC_CTLL_LLP_S_EN)
> +#define DWC_DEFAULT_CTLLO(private) ({ ? ? ? ? ? ? ? ? ? ? ? ? ? \
> + ? ? ? ? ? ? ? ?struct dw_dma_slave *__slave = (private); ? ? ? \
> + ? ? ? ? ? ? ? ?int dms = __slave ? __slave->dst_master : 0; ? ?\
> + ? ? ? ? ? ? ? ?int sms = __slave ? __slave->src_master : 1; ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?\
> + ? ? ? ? ? ? ? ?(DWC_CTLL_DST_MSIZE(0) ? ? ? ? ? ? ? ? ? ? ? ? \
> + ? ? ? ? ? ? ? ? | DWC_CTLL_SRC_MSIZE(0) ? ? ? ? ? ? ? ? ? ? ? \
> + ? ? ? ? ? ? ? ? | DWC_CTLL_LLP_D_EN ? ? ? ? ? ? ? ? ? ? ? ? ? \
> + ? ? ? ? ? ? ? ? | DWC_CTLL_LLP_S_EN ? ? ? ? ? ? ? ? ? ? ? ? ? ?\
> + ? ? ? ? ? ? ? ? | DWC_CTLL_DMS(dms) ? ? ? ? ? ? ? ? ? ? ? ? ? \
> + ? ? ? ? ? ? ? ? | DWC_CTLL_SMS(sms)); ? ? ? ? ? ? ? ? ? ? ? ? \
> + ? ? ? ?})
>
> ?/*
> ?* This is configuration-dependent and usually a funny size like 4095.
> @@ -591,7 +594,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
> ? ? ? ?else
> ? ? ? ? ? ? ? ?src_width = dst_width = 0;
>
> - ? ? ? ctllo = DWC_DEFAULT_CTLLO
> + ? ? ? ctllo = DWC_DEFAULT_CTLLO(chan->private)
> ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_DST_WIDTH(dst_width)
> ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_SRC_WIDTH(src_width)
> ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_DST_INC
> @@ -672,7 +675,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
>
> ? ? ? ?switch (direction) {
> ? ? ? ?case DMA_TO_DEVICE:
> - ? ? ? ? ? ? ? ctllo = (DWC_DEFAULT_CTLLO
> + ? ? ? ? ? ? ? ctllo = (DWC_DEFAULT_CTLLO(chan->private)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_DST_WIDTH(reg_width)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_DST_FIX
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_SRC_INC
> @@ -717,7 +720,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
> ? ? ? ? ? ? ? ?}
> ? ? ? ? ? ? ? ?break;
> ? ? ? ?case DMA_FROM_DEVICE:
> - ? ? ? ? ? ? ? ctllo = (DWC_DEFAULT_CTLLO
> + ? ? ? ? ? ? ? ctllo = (DWC_DEFAULT_CTLLO(chan->private)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_SRC_WIDTH(reg_width)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_DST_INC
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_SRC_FIX
> @@ -1129,7 +1132,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
> ? ? ? ? ? ? ? ?case DMA_TO_DEVICE:
> ? ? ? ? ? ? ? ? ? ? ? ?desc->lli.dar = dws->tx_reg;
> ? ? ? ? ? ? ? ? ? ? ? ?desc->lli.sar = buf_addr + (period_len * i);
> - ? ? ? ? ? ? ? ? ? ? ? desc->lli.ctllo = (DWC_DEFAULT_CTLLO
> + ? ? ? ? ? ? ? ? ? ? ? desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan->private)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_DST_WIDTH(reg_width)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_SRC_WIDTH(reg_width)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_DST_FIX
> @@ -1140,7 +1143,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
> ? ? ? ? ? ? ? ?case DMA_FROM_DEVICE:
> ? ? ? ? ? ? ? ? ? ? ? ?desc->lli.dar = buf_addr + (period_len * i);
> ? ? ? ? ? ? ? ? ? ? ? ?desc->lli.sar = dws->rx_reg;
> - ? ? ? ? ? ? ? ? ? ? ? desc->lli.ctllo = (DWC_DEFAULT_CTLLO
> + ? ? ? ? ? ? ? ? ? ? ? desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan->private)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_SRC_WIDTH(reg_width)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_DST_WIDTH(reg_width)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| DWC_CTLL_DST_INC
> diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h
> index c8aad71..8014eb8 100644
> --- a/include/linux/dw_dmac.h
> +++ b/include/linux/dw_dmac.h
> @@ -52,6 +52,8 @@ struct dw_dma_slave {
> ? ? ? ?enum dw_dma_slave_width reg_width;
> ? ? ? ?u32 ? ? ? ? ? ? ? ? ? ? cfg_hi;
> ? ? ? ?u32 ? ? ? ? ? ? ? ? ? ? cfg_lo;
> + ? ? ? int ? ? ? ? ? ? ? ? ? ? src_master;
> + ? ? ? int ? ? ? ? ? ? ? ? ? ? dst_master;
> ?};
>
> ?/* Platform-configurable bits in CFG_HI */
> --
> 1.7.2.3
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to [email protected]
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at ?http://www.tux.org/lkml/
>
Hi Dan,
On Fri, Dec 3, 2010 at 3:34 PM, Dan Williams <[email protected]> wrote:
> Looks like this whole series needs to go through the dmaengine tree
> but you missed cc'ing me on patch 4/4, found it now.
>
> I'd like an acked-by from Haavard, but otherwise looks good.
Looks good to me, but since I'm no longer working for Atmel, I think
it's best if you ask Hans-Christian.
But since you asked:
Acked-by: Haavard Skinnemoen <[email protected]>
[ adding Hans ]
On Tue, Nov 23, 2010 at 3:06 AM, Jamie Iles <[email protected]> wrote:
> Some platforms have flexible mastering capabilities and this needs
> to be selected at runtime. If the platform has specified private
> data in the form of the dw_dma_slave then fetch the source and
> destination masters from here. If this isn't present, default to
> the previous of 0 and 1.
>
> Cc: Haavard Skinnemoen <[email protected]>
> Cc: Dan Williams <[email protected]>
> Signed-off-by: Jamie Iles <[email protected]>
> ---
Hi James,
Please integrate checkpatch into your workflow and fixup the trivial
whitespace damage (tabs-to-spaces) reports.
Also noticed this on patch 1/4 of this series.
Hans, can you provide an acked-by for this series when James reposts it?
Thanks,
Dan
On Tue, Dec 07, 2010 at 05:03:24PM -0800, Dan Williams wrote:
> [ adding Hans ]
>
> On Tue, Nov 23, 2010 at 3:06 AM, Jamie Iles <[email protected]> wrote:
> > Some platforms have flexible mastering capabilities and this needs
> > to be selected at runtime. If the platform has specified private
> > data in the form of the dw_dma_slave then fetch the source and
> > destination masters from here. If this isn't present, default to
> > the previous of 0 and 1.
> >
> > Cc: Haavard Skinnemoen <[email protected]>
> > Cc: Dan Williams <[email protected]>
> > Signed-off-by: Jamie Iles <[email protected]>
> > ---
>
> Hi James,
>
> Please integrate checkpatch into your workflow and fixup the trivial
> whitespace damage (tabs-to-spaces) reports.
Hi Dan,
Apologies, I was sure I'd ran all of these through checkpatch but it must have
been a different series. Respin of patches 1 and 2 to follow...
Jamie
On Tue, 2010-12-07 at 17:03 -0800, Dan Williams wrote:
> [ adding Hans ]
>
> On Tue, Nov 23, 2010 at 3:06 AM, Jamie Iles <[email protected]> wrote:
> > Some platforms have flexible mastering capabilities and this needs
> > to be selected at runtime. If the platform has specified private
> > data in the form of the dw_dma_slave then fetch the source and
> > destination masters from here. If this isn't present, default to
> > the previous of 0 and 1.
> >
> > Cc: Haavard Skinnemoen <[email protected]>
> > Cc: Dan Williams <[email protected]>
> > Signed-off-by: Jamie Iles <[email protected]>
> > ---
>
> Hi James,
>
> Please integrate checkpatch into your workflow and fixup the trivial
> whitespace damage (tabs-to-spaces) reports.
>
> Also noticed this on patch 1/4 of this series.
>
> Hans, can you provide an acked-by for this series when James reposts it?
The arch stuff, or the DMA stuff? I do not track DMA changes, so I don't
think my acked-by would be very valuable.
I didn't see any updated arch patches, was I supposed to see that?
--
Hans-Christian Egtvedt
On Wed, Dec 08, 2010 at 06:41:50AM +0000, Hans-Christian Egtvedt wrote:
> On Tue, 2010-12-07 at 17:03 -0800, Dan Williams wrote:
> > [ adding Hans ]
> >
> > On Tue, Nov 23, 2010 at 3:06 AM, Jamie Iles <[email protected]> wrote:
> > > Some platforms have flexible mastering capabilities and this needs
> > > to be selected at runtime. If the platform has specified private
> > > data in the form of the dw_dma_slave then fetch the source and
> > > destination masters from here. If this isn't present, default to
> > > the previous of 0 and 1.
> > >
> > > Cc: Haavard Skinnemoen <[email protected]>
> > > Cc: Dan Williams <[email protected]>
> > > Signed-off-by: Jamie Iles <[email protected]>
> > > ---
> >
> > Hi James,
> >
> > Please integrate checkpatch into your workflow and fixup the trivial
> > whitespace damage (tabs-to-spaces) reports.
> >
> > Also noticed this on patch 1/4 of this series.
> >
> > Hans, can you provide an acked-by for this series when James reposts it?
>
> The arch stuff, or the DMA stuff? I do not track DMA changes, so I don't
> think my acked-by would be very valuable.
>
> I didn't see any updated arch patches, was I supposed to see that?
No, it was just the dmaengine patches that were updated for whitespace. The
avr32 patch is untouched.
Thanks,
Jamie
On Tue, 2010-11-23 at 11:06 +0000, Jamie Iles wrote:
> Now that the dw_dmac DMA driver supports configurable source and
> destination masters we need to specify which ones to use. This was
> previously hardcoded to 0 and 1 respectively in the driver.
>
> Cc: Hans-Christian Egtvedt <[email protected]>
> Signed-off-by: Jamie Iles <[email protected]>
Acked-by: Hans-Christian Egtvedt <[email protected]>
--
Hans-Christian Egtvedt