Changes since v2:
- Rebased on 3.7-rc1
- Fixed bug in DT/pdata parsing first found by Gururaja
that turned out to be masked by some toolchains
- Dropped unused mach-omap2/devices.c hsmmc patch
- Added AM33XX crossbar DMA event mux support
- Added am335x-evm support
Changes since v1:
- Rebased on top of mainline from 12250d8
- Dropped the feature removal schedule patch
- Implemented dma_request_slave_channel_compat() and
converted the mmc and spi drivers to use it
- Dropped unneeded #address-cells and #size-cells from
EDMA DT support
- Moved private EDMA header to linux/platform_data/ and
removed some unneeded definitions
- Fixed parsing of optional properties
TODO:
- Add dmaengine support for per-channel caps so the
hack to set the maximum segments can be replaced with
a query to the dmaengine driver
This series adds DMA Engine support for AM33xx, which uses
an EDMA DMAC. The EDMA DMAC has been previously supported by only
a private API implementation (much like the situation with OMAP
DMA) found on the DaVinci family of SoCs.
The series applies on top of 3.7-rc1 and the following patches:
- GPMC fails to reserve memory fix:
http://www.spinics.net/lists/linux-omap/msg79675.html
- TPS65910 regulator fix:
https://patchwork.kernel.org/patch/1593651/
- dmaengine DT support from Vinod's dmaengine_dt branch in
git://git.infradead.org/users/vkoul/slave-dma.git since
027478851791df751176398be02a3b1c5f6aa824
The approach taken is similar to how OMAP DMA is being converted to
DMA Engine support. With the functional EDMA private API already
existing in mach-davinci/dma.c, we first move that to an ARM common
area so it can be shared. Adding DT and runtime PM support to the
private EDMA API implementation allows it to run on AM33xx. AM33xx
*only* boots using DT so we leverage Jon's generic DT DMA helpers to
register EDMA DMAC with the of_dma framework and then add support
for calling the dma_request_slave_channel() API to both the mmc
and spi drivers.
With this series both BeagleBone and the AM335x EVM have working
MMC and SPI support.
This is tested on BeagleBone with a SPI framebuffer driver and MMC
rootfs. A trivial gpio DMA event misc driver was used to test the
crossbar DMA event support. It is also tested on the AM335x EVM
with the onboard SPI flash and MMC rootfs. The branch at
https://github.com/ohporter/linux/tree/edma-dmaengine-v3 has the
complete series, dependencies, and some test drivers/defconfigs.
Regression testing was done on AM180x-EVM (which also makes use
of the EDMA dmaengine driver and the EDMA private API) using SD,
SPI flash, and the onboard audio supported by the ASoC Davinci
driver.
After this series, the plan is to convert the last in-tree user
of the private EDMA API (davinci-pcm/mcasp) and then eliminate
the private EDMA API by folding its functionality into
drivers/dma/edma.c.
Matt Porter (16):
dmaengine: edma: fix slave config dependency on direction
ARM: davinci: move private EDMA API to arm/common
ARM: edma: remove unused transfer controller handlers
ARM: edma: add DT and runtime PM support for AM33XX
ARM: edma: add AM33XX crossbar event support
dmaengine: edma: enable build for AM33XX
dmaengine: edma: Add TI EDMA device tree binding
ARM: dts: add AM33XX EDMA support
dmaengine: add dma_request_slave_channel_compat()
mmc: omap_hsmmc: convert to dma_request_slave_channel_compat()
mmc: omap_hsmmc: limit max_segs with the EDMA DMAC
mmc: omap_hsmmc: add generic DMA request support to the DT binding
ARM: dts: add AM33XX MMC support
spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
spi: omap2-mcspi: add generic DMA request support to the DT binding
ARM: dts: add AM33XX SPI support
Documentation/devicetree/bindings/dma/ti-edma.txt | 51 +
.../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 25 +-
Documentation/devicetree/bindings/spi/omap-spi.txt | 27 +-
arch/arm/Kconfig | 1 +
arch/arm/boot/dts/am335x-bone.dts | 23 +
arch/arm/boot/dts/am335x-evm.dts | 15 +
arch/arm/boot/dts/am33xx.dtsi | 101 ++
arch/arm/common/Kconfig | 3 +
arch/arm/common/Makefile | 1 +
arch/arm/common/edma.c | 1841 ++++++++++++++++++++
arch/arm/mach-davinci/Makefile | 2 +-
arch/arm/mach-davinci/board-da830-evm.c | 4 +-
arch/arm/mach-davinci/board-da850-evm.c | 8 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 4 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 8 +-
arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
arch/arm/mach-davinci/davinci.h | 2 +-
arch/arm/mach-davinci/devices-da8xx.c | 8 +-
arch/arm/mach-davinci/devices-tnetv107x.c | 6 +-
arch/arm/mach-davinci/devices.c | 7 +-
arch/arm/mach-davinci/dm355.c | 6 +-
arch/arm/mach-davinci/dm365.c | 6 +-
arch/arm/mach-davinci/dm644x.c | 6 +-
arch/arm/mach-davinci/dm646x.c | 6 +-
arch/arm/mach-davinci/dma.c | 1588 -----------------
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
arch/arm/mach-davinci/include/mach/edma.h | 267 ---
arch/arm/plat-omap/Kconfig | 1 +
drivers/dma/Kconfig | 2 +-
drivers/dma/edma.c | 57 +-
drivers/mmc/host/davinci_mmc.c | 1 +
drivers/mmc/host/omap_hsmmc.c | 20 +-
drivers/spi/spi-omap2-mcspi.c | 65 +-
include/linux/dmaengine.h | 10 +
include/linux/mfd/davinci_voicecodec.h | 3 +-
include/linux/platform_data/edma.h | 199 +++
include/linux/platform_data/spi-davinci.h | 2 +-
sound/soc/davinci/davinci-evm.c | 1 +
sound/soc/davinci/davinci-pcm.c | 1 +
sound/soc/davinci/davinci-pcm.h | 2 +-
sound/soc/davinci/davinci-sffsdr.c | 6 +-
41 files changed, 2436 insertions(+), 1954 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
create mode 100644 arch/arm/common/edma.c
delete mode 100644 arch/arm/mach-davinci/dma.c
delete mode 100644 arch/arm/mach-davinci/include/mach/edma.h
create mode 100644 include/linux/platform_data/edma.h
--
1.7.9.5
The edma_slave_config() implementation depends on the
direction field such that it will not properly configure
a slave channel when called without direction set.
This fixes the implementation so that the slave config
is copied as is and prep_slave_sg() handles the
direction dependent handling. spi-omap2-mcspi and
omap_hsmmc both expose this bug as they configure the
slave channel config from a common path with an unconfigured
direction field.
Signed-off-by: Matt Porter <[email protected]>
---
drivers/dma/edma.c | 55 ++++++++++++++++++++++++++--------------------------
1 file changed, 27 insertions(+), 28 deletions(-)
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index 05aea3c..fdcf079 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -69,9 +69,7 @@ struct edma_chan {
int ch_num;
bool alloced;
int slot[EDMA_MAX_SLOTS];
- dma_addr_t addr;
- int addr_width;
- int maxburst;
+ struct dma_slave_config cfg;
};
struct edma_cc {
@@ -178,29 +176,14 @@ static int edma_terminate_all(struct edma_chan *echan)
return 0;
}
-
static int edma_slave_config(struct edma_chan *echan,
- struct dma_slave_config *config)
+ struct dma_slave_config *cfg)
{
- if ((config->src_addr_width > DMA_SLAVE_BUSWIDTH_4_BYTES) ||
- (config->dst_addr_width > DMA_SLAVE_BUSWIDTH_4_BYTES))
+ if (cfg->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES ||
+ cfg->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES)
return -EINVAL;
- if (config->direction == DMA_MEM_TO_DEV) {
- if (config->dst_addr)
- echan->addr = config->dst_addr;
- if (config->dst_addr_width)
- echan->addr_width = config->dst_addr_width;
- if (config->dst_maxburst)
- echan->maxburst = config->dst_maxburst;
- } else if (config->direction == DMA_DEV_TO_MEM) {
- if (config->src_addr)
- echan->addr = config->src_addr;
- if (config->src_addr_width)
- echan->addr_width = config->src_addr_width;
- if (config->src_maxburst)
- echan->maxburst = config->src_maxburst;
- }
+ memcpy(&echan->cfg, cfg, sizeof(echan->cfg));
return 0;
}
@@ -235,6 +218,9 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
struct edma_chan *echan = to_edma_chan(chan);
struct device *dev = chan->device->dev;
struct edma_desc *edesc;
+ dma_addr_t dev_addr;
+ enum dma_slave_buswidth dev_width;
+ u32 burst;
struct scatterlist *sg;
int i;
int acnt, bcnt, ccnt, src, dst, cidx;
@@ -243,7 +229,20 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
if (unlikely(!echan || !sgl || !sg_len))
return NULL;
- if (echan->addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) {
+ if (direction == DMA_DEV_TO_MEM) {
+ dev_addr = echan->cfg.src_addr;
+ dev_width = echan->cfg.src_addr_width;
+ burst = echan->cfg.src_maxburst;
+ } else if (direction == DMA_MEM_TO_DEV) {
+ dev_addr = echan->cfg.dst_addr;
+ dev_width = echan->cfg.dst_addr_width;
+ burst = echan->cfg.dst_maxburst;
+ } else {
+ dev_err(dev, "%s: bad direction?\n", __func__);
+ return NULL;
+ }
+
+ if (dev_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) {
dev_err(dev, "Undefined slave buswidth\n");
return NULL;
}
@@ -275,14 +274,14 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
}
}
- acnt = echan->addr_width;
+ acnt = dev_width;
/*
* If the maxburst is equal to the fifo width, use
* A-synced transfers. This allows for large contiguous
* buffer transfers using only one PaRAM set.
*/
- if (echan->maxburst == 1) {
+ if (burst == 1) {
edesc->absync = false;
ccnt = sg_dma_len(sg) / acnt / (SZ_64K - 1);
bcnt = sg_dma_len(sg) / acnt - ccnt * (SZ_64K - 1);
@@ -302,7 +301,7 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
*/
} else {
edesc->absync = true;
- bcnt = echan->maxburst;
+ bcnt = burst;
ccnt = sg_dma_len(sg) / (acnt * bcnt);
if (ccnt > (SZ_64K - 1)) {
dev_err(dev, "Exceeded max SG segment size\n");
@@ -313,13 +312,13 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
if (direction == DMA_MEM_TO_DEV) {
src = sg_dma_address(sg);
- dst = echan->addr;
+ dst = dev_addr;
src_bidx = acnt;
src_cidx = cidx;
dst_bidx = 0;
dst_cidx = 0;
} else {
- src = echan->addr;
+ src = dev_addr;
dst = sg_dma_address(sg);
src_bidx = 0;
src_cidx = 0;
--
1.7.9.5
Move mach-davinci/dma.c to common/edma.c so it can be used
by OMAP (specifically AM33xx) as well. This just moves the
private EDMA API but does not support OMAP.
Signed-off-by: Matt Porter <[email protected]>
---
arch/arm/Kconfig | 1 +
arch/arm/common/Kconfig | 3 +
arch/arm/common/Makefile | 1 +
arch/arm/{mach-davinci/dma.c => common/edma.c} | 2 +-
arch/arm/mach-davinci/Makefile | 2 +-
arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
arch/arm/mach-davinci/davinci.h | 2 +-
arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
arch/arm/mach-davinci/devices.c | 7 +-
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
arch/arm/mach-davinci/include/mach/edma.h | 267 ------------------------
arch/arm/plat-omap/Kconfig | 1 +
drivers/dma/edma.c | 2 +-
drivers/mmc/host/davinci_mmc.c | 1 +
include/linux/mfd/davinci_voicecodec.h | 3 +-
include/linux/platform_data/edma.h | 198 ++++++++++++++++++
include/linux/platform_data/spi-davinci.h | 2 +-
sound/soc/davinci/davinci-evm.c | 1 +
sound/soc/davinci/davinci-pcm.c | 1 +
sound/soc/davinci/davinci-pcm.h | 2 +-
sound/soc/davinci/davinci-sffsdr.c | 6 +-
25 files changed, 228 insertions(+), 288 deletions(-)
rename arch/arm/{mach-davinci/dma.c => common/edma.c} (99%)
delete mode 100644 arch/arm/mach-davinci/include/mach/edma.h
create mode 100644 include/linux/platform_data/edma.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 73067ef..23c2343 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -924,6 +924,7 @@ config ARCH_DAVINCI
select GENERIC_IRQ_CHIP
select HAVE_IDE
select NEED_MACH_GPIO_H
+ select TI_PRIV_EDMA
select ZONE_DMA
help
Support for TI's DaVinci platform.
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 45ceeb0..9e32d0d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -40,3 +40,6 @@ config SHARP_PARAM
config SHARP_SCOOP
bool
+
+config TI_PRIV_EDMA
+ bool
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index e8a4e58..d09a39b 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
obj-$(CONFIG_SHARP_SCOOP) += scoop.o
obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
+obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/common/edma.c
similarity index 99%
rename from arch/arm/mach-davinci/dma.c
rename to arch/arm/common/edma.c
index a685e97..4411087 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/common/edma.c
@@ -25,7 +25,7 @@
#include <linux/io.h>
#include <linux/slab.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
/* Offsets matching "struct edmacc_param" */
#define PARM_OPT 0x00
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 2227eff..97c639e 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,7 +5,7 @@
# Common objects
obj-y := time.o clock.o serial.o psc.o \
- dma.o usb.o common.o sram.o aemif.o
+ usb.o common.o sram.o aemif.o
obj-$(CONFIG_DAVINCI_MUX) += mux.o
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index be30997..86f55ba 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -26,12 +26,12 @@
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
-#include <mach/edma.h>
#include <mach/mux.h>
#include <mach/cp_intc.h>
#include <mach/tnetv107x.h>
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 12d544b..d26a6bc 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -23,9 +23,9 @@
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/platform_data/davinci_asp.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/keyscan-davinci.h>
#include <mach/hardware.h>
-#include <mach/edma.h>
#include <media/davinci/vpfe_capture.h>
#include <media/davinci/vpif_types.h>
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
index 29b17f7..59efd7f 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
@@ -18,10 +18,10 @@
#include <linux/dma-mapping.h>
#include <linux/clk.h>
#include <linux/slab.h>
+#include <linux/platform_data/edma.h>
#include <mach/common.h>
#include <mach/irqs.h>
-#include <mach/edma.h>
#include <mach/tnetv107x.h>
#include "clock.h"
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 4c48a36..f45d591 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -19,9 +19,10 @@
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
-#include <mach/edma.h>
#include <linux/platform_data/mmc-davinci.h>
#include <mach/time.h>
+#include <linux/platform_data/edma.h>
+
#include "davinci.h"
#include "clock.h"
@@ -141,10 +142,10 @@ static struct resource mmcsd0_resources[] = {
},
/* DMA channels: RX, then TX */
{
- .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
+ .start = EDMA_CTLR_CHAN(0, 26),
.flags = IORESOURCE_DMA,
}, {
- .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
+ .start = EDMA_CTLR_CHAN(0, 27),
.flags = IORESOURCE_DMA,
},
};
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a255434..b165c27 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -19,7 +19,6 @@
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/psc.h>
#include <mach/mux.h>
#include <mach/irqs.h>
@@ -28,6 +27,7 @@
#include <mach/common.h>
#include <linux/platform_data/spi-davinci.h>
#include <mach/gpio-davinci.h>
+#include <linux/platform_data/edma.h>
#include "davinci.h"
#include "clock.h"
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index b680c83..a611716 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -18,11 +18,11 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/psc.h>
#include <mach/mux.h>
#include <mach/irqs.h>
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index cd0c8b1..90f5639 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -12,11 +12,11 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 97c0f8e..08f9dab 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -13,11 +13,11 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index aaccdc4..4380691 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -20,8 +20,8 @@
#include <linux/videodev2.h>
#include <mach/serial.h>
-#include <mach/edma.h>
#include <mach/pm.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/i2c-davinci.h>
#include <linux/platform_data/mmc-davinci.h>
#include <linux/platform_data/usb-davinci.h>
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
deleted file mode 100644
index 7e84c90..0000000
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ /dev/null
@@ -1,267 +0,0 @@
-/*
- * TI DAVINCI dma definitions
- *
- * Copyright (C) 2006-2009 Texas Instruments.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-/*
- * This EDMA3 programming framework exposes two basic kinds of resource:
- *
- * Channel Triggers transfers, usually from a hardware event but
- * also manually or by "chaining" from DMA completions.
- * Each channel is coupled to a Parameter RAM (PaRAM) slot.
- *
- * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
- * "set"), source and destination addresses, a link to a
- * next PaRAM slot (if any), options for the transfer, and
- * instructions for updating those addresses. There are
- * more than twice as many slots as event channels.
- *
- * Each PaRAM set describes a sequence of transfers, either for one large
- * buffer or for several discontiguous smaller buffers. An EDMA transfer
- * is driven only from a channel, which performs the transfers specified
- * in its PaRAM slot until there are no more transfers. When that last
- * transfer completes, the "link" field may be used to reload the channel's
- * PaRAM slot with a new transfer descriptor.
- *
- * The EDMA Channel Controller (CC) maps requests from channels into physical
- * Transfer Controller (TC) requests when the channel triggers (by hardware
- * or software events, or by chaining). The two physical DMA channels provided
- * by the TCs are thus shared by many logical channels.
- *
- * DaVinci hardware also has a "QDMA" mechanism which is not currently
- * supported through this interface. (DSP firmware uses it though.)
- */
-
-#ifndef EDMA_H_
-#define EDMA_H_
-
-/* PaRAM slots are laid out like this */
-struct edmacc_param {
- unsigned int opt;
- unsigned int src;
- unsigned int a_b_cnt;
- unsigned int dst;
- unsigned int src_dst_bidx;
- unsigned int link_bcntrld;
- unsigned int src_dst_cidx;
- unsigned int ccnt;
-};
-
-#define CCINT0_INTERRUPT 16
-#define CCERRINT_INTERRUPT 17
-#define TCERRINT0_INTERRUPT 18
-#define TCERRINT1_INTERRUPT 19
-
-/* fields in edmacc_param.opt */
-#define SAM BIT(0)
-#define DAM BIT(1)
-#define SYNCDIM BIT(2)
-#define STATIC BIT(3)
-#define EDMA_FWID (0x07 << 8)
-#define TCCMODE BIT(11)
-#define EDMA_TCC(t) ((t) << 12)
-#define TCINTEN BIT(20)
-#define ITCINTEN BIT(21)
-#define TCCHEN BIT(22)
-#define ITCCHEN BIT(23)
-
-#define TRWORD (0x7<<2)
-#define PAENTRY (0x1ff<<5)
-
-/* Drivers should avoid using these symbolic names for dm644x
- * channels, and use platform_device IORESOURCE_DMA resources
- * instead. (Other DaVinci chips have different peripherals
- * and thus have different DMA channel mappings.)
- */
-#define DAVINCI_DMA_MCBSP_TX 2
-#define DAVINCI_DMA_MCBSP_RX 3
-#define DAVINCI_DMA_VPSS_HIST 4
-#define DAVINCI_DMA_VPSS_H3A 5
-#define DAVINCI_DMA_VPSS_PRVU 6
-#define DAVINCI_DMA_VPSS_RSZ 7
-#define DAVINCI_DMA_IMCOP_IMXINT 8
-#define DAVINCI_DMA_IMCOP_VLCDINT 9
-#define DAVINCI_DMA_IMCO_PASQINT 10
-#define DAVINCI_DMA_IMCOP_DSQINT 11
-#define DAVINCI_DMA_SPI_SPIX 16
-#define DAVINCI_DMA_SPI_SPIR 17
-#define DAVINCI_DMA_UART0_URXEVT0 18
-#define DAVINCI_DMA_UART0_UTXEVT0 19
-#define DAVINCI_DMA_UART1_URXEVT1 20
-#define DAVINCI_DMA_UART1_UTXEVT1 21
-#define DAVINCI_DMA_UART2_URXEVT2 22
-#define DAVINCI_DMA_UART2_UTXEVT2 23
-#define DAVINCI_DMA_MEMSTK_MSEVT 24
-#define DAVINCI_DMA_MMCRXEVT 26
-#define DAVINCI_DMA_MMCTXEVT 27
-#define DAVINCI_DMA_I2C_ICREVT 28
-#define DAVINCI_DMA_I2C_ICXEVT 29
-#define DAVINCI_DMA_GPIO_GPINT0 32
-#define DAVINCI_DMA_GPIO_GPINT1 33
-#define DAVINCI_DMA_GPIO_GPINT2 34
-#define DAVINCI_DMA_GPIO_GPINT3 35
-#define DAVINCI_DMA_GPIO_GPINT4 36
-#define DAVINCI_DMA_GPIO_GPINT5 37
-#define DAVINCI_DMA_GPIO_GPINT6 38
-#define DAVINCI_DMA_GPIO_GPINT7 39
-#define DAVINCI_DMA_GPIO_GPBNKINT0 40
-#define DAVINCI_DMA_GPIO_GPBNKINT1 41
-#define DAVINCI_DMA_GPIO_GPBNKINT2 42
-#define DAVINCI_DMA_GPIO_GPBNKINT3 43
-#define DAVINCI_DMA_GPIO_GPBNKINT4 44
-#define DAVINCI_DMA_TIMER0_TINT0 48
-#define DAVINCI_DMA_TIMER1_TINT1 49
-#define DAVINCI_DMA_TIMER2_TINT2 50
-#define DAVINCI_DMA_TIMER3_TINT3 51
-#define DAVINCI_DMA_PWM0 52
-#define DAVINCI_DMA_PWM1 53
-#define DAVINCI_DMA_PWM2 54
-
-/* DA830 specific EDMA3 information */
-#define EDMA_DA830_NUM_DMACH 32
-#define EDMA_DA830_NUM_TCC 32
-#define EDMA_DA830_NUM_PARAMENTRY 128
-#define EDMA_DA830_NUM_EVQUE 2
-#define EDMA_DA830_NUM_TC 2
-#define EDMA_DA830_CHMAP_EXIST 0
-#define EDMA_DA830_NUM_REGIONS 4
-#define DA830_DMACH2EVENT_MAP0 0x000FC03Fu
-#define DA830_DMACH2EVENT_MAP1 0x00000000u
-#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
-
-/*ch_status paramater of callback function possible values*/
-#define DMA_COMPLETE 1
-#define DMA_CC_ERROR 2
-#define DMA_TC1_ERROR 3
-#define DMA_TC2_ERROR 4
-
-enum address_mode {
- INCR = 0,
- FIFO = 1
-};
-
-enum fifo_width {
- W8BIT = 0,
- W16BIT = 1,
- W32BIT = 2,
- W64BIT = 3,
- W128BIT = 4,
- W256BIT = 5
-};
-
-enum dma_event_q {
- EVENTQ_0 = 0,
- EVENTQ_1 = 1,
- EVENTQ_2 = 2,
- EVENTQ_3 = 3,
- EVENTQ_DEFAULT = -1
-};
-
-enum sync_dimension {
- ASYNC = 0,
- ABSYNC = 1
-};
-
-#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
-#define EDMA_CTLR(i) ((i) >> 16)
-#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
-
-#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
-#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
-#define EDMA_CONT_PARAMS_ANY 1001
-#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
-#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
-
-#define EDMA_MAX_CC 2
-
-/* alloc/free DMA channels and their dedicated parameter RAM slots */
-int edma_alloc_channel(int channel,
- void (*callback)(unsigned channel, u16 ch_status, void *data),
- void *data, enum dma_event_q);
-void edma_free_channel(unsigned channel);
-
-/* alloc/free parameter RAM slots */
-int edma_alloc_slot(unsigned ctlr, int slot);
-void edma_free_slot(unsigned slot);
-
-/* alloc/free a set of contiguous parameter RAM slots */
-int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
-int edma_free_cont_slots(unsigned slot, int count);
-
-/* calls that operate on part of a parameter RAM slot */
-void edma_set_src(unsigned slot, dma_addr_t src_port,
- enum address_mode mode, enum fifo_width);
-void edma_set_dest(unsigned slot, dma_addr_t dest_port,
- enum address_mode mode, enum fifo_width);
-void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
-void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
-void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
-void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
- u16 bcnt_rld, enum sync_dimension sync_mode);
-void edma_link(unsigned from, unsigned to);
-void edma_unlink(unsigned from);
-
-/* calls that operate on an entire parameter RAM slot */
-void edma_write_slot(unsigned slot, const struct edmacc_param *params);
-void edma_read_slot(unsigned slot, struct edmacc_param *params);
-
-/* channel control operations */
-int edma_start(unsigned channel);
-void edma_stop(unsigned channel);
-void edma_clean_channel(unsigned channel);
-void edma_clear_event(unsigned channel);
-void edma_pause(unsigned channel);
-void edma_resume(unsigned channel);
-
-struct edma_rsv_info {
-
- const s16 (*rsv_chans)[2];
- const s16 (*rsv_slots)[2];
-};
-
-/* platform_data for EDMA driver */
-struct edma_soc_info {
-
- /* how many dma resources of each type */
- unsigned n_channel;
- unsigned n_region;
- unsigned n_slot;
- unsigned n_tc;
- unsigned n_cc;
- /*
- * Default queue is expected to be a low-priority queue.
- * This way, long transfers on the default queue started
- * by the codec engine will not cause audio defects.
- */
- enum dma_event_q default_queue;
-
- /* Resource reservation for other cores */
- struct edma_rsv_info *rsv;
-
- const s8 (*queue_tc_mapping)[2];
- const s8 (*queue_priority_mapping)[2];
-};
-
-#endif
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 7cd56ed..153fab8 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -28,6 +28,7 @@ config ARCH_OMAP2PLUS
select OMAP_DM_TIMER
select PROC_DEVICETREE if PROC_FS
select SPARSE_IRQ
+ select TI_PRIV_EDMA
select USE_OF
help
"Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index fdcf079..47ba7bf 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -24,7 +24,7 @@
#include <linux/slab.h>
#include <linux/spinlock.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
#include "dmaengine.h"
#include "virt-dma.h"
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
index 2063677..f5d46ea 100644
--- a/drivers/mmc/host/davinci_mmc.c
+++ b/drivers/mmc/host/davinci_mmc.c
@@ -35,6 +35,7 @@
#include <linux/edma.h>
#include <linux/mmc/mmc.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/mmc-davinci.h>
/*
diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
index 0ab6132..7dd6524 100644
--- a/include/linux/mfd/davinci_voicecodec.h
+++ b/include/linux/mfd/davinci_voicecodec.h
@@ -26,8 +26,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/mfd/core.h>
-
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
/*
* Register values.
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
new file mode 100644
index 0000000..7396f0b3
--- /dev/null
+++ b/include/linux/platform_data/edma.h
@@ -0,0 +1,198 @@
+/*
+ * TI DAVINCI dma definitions
+ *
+ * Copyright (C) 2006-2009 Texas Instruments.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+/*
+ * This EDMA3 programming framework exposes two basic kinds of resource:
+ *
+ * Channel Triggers transfers, usually from a hardware event but
+ * also manually or by "chaining" from DMA completions.
+ * Each channel is coupled to a Parameter RAM (PaRAM) slot.
+ *
+ * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
+ * "set"), source and destination addresses, a link to a
+ * next PaRAM slot (if any), options for the transfer, and
+ * instructions for updating those addresses. There are
+ * more than twice as many slots as event channels.
+ *
+ * Each PaRAM set describes a sequence of transfers, either for one large
+ * buffer or for several discontiguous smaller buffers. An EDMA transfer
+ * is driven only from a channel, which performs the transfers specified
+ * in its PaRAM slot until there are no more transfers. When that last
+ * transfer completes, the "link" field may be used to reload the channel's
+ * PaRAM slot with a new transfer descriptor.
+ *
+ * The EDMA Channel Controller (CC) maps requests from channels into physical
+ * Transfer Controller (TC) requests when the channel triggers (by hardware
+ * or software events, or by chaining). The two physical DMA channels provided
+ * by the TCs are thus shared by many logical channels.
+ *
+ * DaVinci hardware also has a "QDMA" mechanism which is not currently
+ * supported through this interface. (DSP firmware uses it though.)
+ */
+
+#ifndef EDMA_H_
+#define EDMA_H_
+
+/* PaRAM slots are laid out like this */
+struct edmacc_param {
+ unsigned int opt;
+ unsigned int src;
+ unsigned int a_b_cnt;
+ unsigned int dst;
+ unsigned int src_dst_bidx;
+ unsigned int link_bcntrld;
+ unsigned int src_dst_cidx;
+ unsigned int ccnt;
+};
+
+/* fields in edmacc_param.opt */
+#define SAM BIT(0)
+#define DAM BIT(1)
+#define SYNCDIM BIT(2)
+#define STATIC BIT(3)
+#define EDMA_FWID (0x07 << 8)
+#define TCCMODE BIT(11)
+#define EDMA_TCC(t) ((t) << 12)
+#define TCINTEN BIT(20)
+#define ITCINTEN BIT(21)
+#define TCCHEN BIT(22)
+#define ITCCHEN BIT(23)
+
+/*ch_status paramater of callback function possible values*/
+#define DMA_COMPLETE 1
+#define DMA_CC_ERROR 2
+#define DMA_TC1_ERROR 3
+#define DMA_TC2_ERROR 4
+
+enum address_mode {
+ INCR = 0,
+ FIFO = 1
+};
+
+enum fifo_width {
+ W8BIT = 0,
+ W16BIT = 1,
+ W32BIT = 2,
+ W64BIT = 3,
+ W128BIT = 4,
+ W256BIT = 5
+};
+
+enum dma_event_q {
+ EVENTQ_0 = 0,
+ EVENTQ_1 = 1,
+ EVENTQ_2 = 2,
+ EVENTQ_3 = 3,
+ EVENTQ_DEFAULT = -1
+};
+
+enum sync_dimension {
+ ASYNC = 0,
+ ABSYNC = 1
+};
+
+#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
+#define EDMA_CTLR(i) ((i) >> 16)
+#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
+
+#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
+#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
+#define EDMA_CONT_PARAMS_ANY 1001
+#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
+#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
+
+#define EDMA_MAX_CC 2
+
+/* alloc/free DMA channels and their dedicated parameter RAM slots */
+int edma_alloc_channel(int channel,
+ void (*callback)(unsigned channel, u16 ch_status, void *data),
+ void *data, enum dma_event_q);
+void edma_free_channel(unsigned channel);
+
+/* alloc/free parameter RAM slots */
+int edma_alloc_slot(unsigned ctlr, int slot);
+void edma_free_slot(unsigned slot);
+
+/* alloc/free a set of contiguous parameter RAM slots */
+int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
+int edma_free_cont_slots(unsigned slot, int count);
+
+/* calls that operate on part of a parameter RAM slot */
+void edma_set_src(unsigned slot, dma_addr_t src_port,
+ enum address_mode mode, enum fifo_width);
+void edma_set_dest(unsigned slot, dma_addr_t dest_port,
+ enum address_mode mode, enum fifo_width);
+void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
+void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
+void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
+void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
+ u16 bcnt_rld, enum sync_dimension sync_mode);
+void edma_link(unsigned from, unsigned to);
+void edma_unlink(unsigned from);
+
+/* calls that operate on an entire parameter RAM slot */
+void edma_write_slot(unsigned slot, const struct edmacc_param *params);
+void edma_read_slot(unsigned slot, struct edmacc_param *params);
+
+/* channel control operations */
+int edma_start(unsigned channel);
+void edma_stop(unsigned channel);
+void edma_clean_channel(unsigned channel);
+void edma_clear_event(unsigned channel);
+void edma_pause(unsigned channel);
+void edma_resume(unsigned channel);
+
+struct edma_rsv_info {
+
+ const s16 (*rsv_chans)[2];
+ const s16 (*rsv_slots)[2];
+};
+
+/* platform_data for EDMA driver */
+struct edma_soc_info {
+
+ /* how many dma resources of each type */
+ unsigned n_channel;
+ unsigned n_region;
+ unsigned n_slot;
+ unsigned n_tc;
+ unsigned n_cc;
+ /*
+ * Default queue is expected to be a low-priority queue.
+ * This way, long transfers on the default queue started
+ * by the codec engine will not cause audio defects.
+ */
+ enum dma_event_q default_queue;
+
+ /* Resource reservation for other cores */
+ struct edma_rsv_info *rsv;
+
+ const s8 (*queue_tc_mapping)[2];
+ const s8 (*queue_priority_mapping)[2];
+};
+
+#endif
diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
index 7af305b..8dc2fa47 100644
--- a/include/linux/platform_data/spi-davinci.h
+++ b/include/linux/platform_data/spi-davinci.h
@@ -19,7 +19,7 @@
#ifndef __ARCH_ARM_DAVINCI_SPI_H
#define __ARCH_ARM_DAVINCI_SPI_H
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
#define SPI_INTERN_CS 0xFF
diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
index 6fac5af..44365d5 100644
--- a/sound/soc/davinci/davinci-evm.c
+++ b/sound/soc/davinci/davinci-evm.c
@@ -14,6 +14,7 @@
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/i2c.h>
#include <sound/core.h>
#include <sound/pcm.h>
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
index 93ea3bf..c9d1b7a 100644
--- a/sound/soc/davinci/davinci-pcm.c
+++ b/sound/soc/davinci/davinci-pcm.c
@@ -16,6 +16,7 @@
#include <linux/slab.h>
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
+#include <linux/platform_data/edma.h>
#include <sound/core.h>
#include <sound/pcm.h>
diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
index fc4d01c..deab6c3 100644
--- a/sound/soc/davinci/davinci-pcm.h
+++ b/sound/soc/davinci/davinci-pcm.h
@@ -13,7 +13,7 @@
#define _DAVINCI_PCM_H
#include <linux/platform_data/davinci_asp.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
struct davinci_pcm_dma_params {
int channel; /* sync dma channel ID */
diff --git a/sound/soc/davinci/davinci-sffsdr.c b/sound/soc/davinci/davinci-sffsdr.c
index 5be65aa..5345e63 100644
--- a/sound/soc/davinci/davinci-sffsdr.c
+++ b/sound/soc/davinci/davinci-sffsdr.c
@@ -17,6 +17,7 @@
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/gpio.h>
#include <sound/core.h>
#include <sound/pcm.h>
@@ -28,7 +29,6 @@
#include <asm/plat-sffsdr/sffsdr-fpga.h>
#endif
-#include <mach/edma.h>
#include "../codecs/pcm3008.h"
#include "davinci-pcm.h"
@@ -123,8 +123,8 @@ static struct resource sffsdr_snd_resources[] = {
};
static struct evm_snd_platform_data sffsdr_snd_data = {
- .tx_dma_ch = DAVINCI_DMA_MCBSP_TX,
- .rx_dma_ch = DAVINCI_DMA_MCBSP_RX,
+ .tx_dma_ch = 2,
+ .rx_dma_ch = 3,
};
static struct platform_device *sffsdr_snd_device;
--
1.7.9.5
Adds AM33XX EDMA support to the am33xx.dtsi as documented in
Documentation/devicetree/bindings/dma/ti-edma.txt
Signed-off-by: Matt Porter <[email protected]>
---
arch/arm/boot/dts/am33xx.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index bb31bff..ab9c78f 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -62,6 +62,37 @@
reg = <0x48200000 0x1000>;
};
+ edma: edma@49000000 {
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ reg = <0x49000000 0x10000>,
+ <0x44e10f90 0x10>;
+ interrupt-parent = <&intc>;
+ interrupts = <12 13 14>;
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ ti,edma-reserved-channels = <0 2
+ 14 2
+ 26 6
+ 48 4
+ 56 8>;
+ ti,edma-reserved-slots = <0 2
+ 14 2
+ 26 6
+ 48 4
+ 56 8
+ 64 127>;
+ ti,edma-queue-tc-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-queue-priority-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-default-queue = <0>;
+ };
+
gpio1: gpio@44e07000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
--
1.7.9.5
The binding definition is based on the generic DMA request binding.
Signed-off-by: Matt Porter <[email protected]>
---
.../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 25 +++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index be76a23..d1b8932 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -19,8 +19,28 @@ ti,dual-volt: boolean, supports dual voltage cards
"supply-name" examples are "vmmc", "vmmc_aux" etc
ti,non-removable: non-removable slot (like eMMC)
ti,needs-special-reset: Requires a special softreset sequence
+dmas: DMA controller phandle and DMA request value ordered pair
+One tx and one rx pair is required.
+dma-names: DMA request names. These strings correspond 1:1 with
+the ordered pairs in dmas. The RX request must be "rx" and the
+TX request must be "tx".
+
+Examples:
+
+[hwmod populated DMA resources]
+
+ mmc1: mmc@0x4809c000 {
+ compatible = "ti,omap4-hsmmc";
+ reg = <0x4809c000 0x400>;
+ ti,hwmods = "mmc1";
+ ti,dual-volt;
+ bus-width = <4>;
+ vmmc-supply = <&vmmc>; /* phandle to regulator node */
+ ti,non-removable;
+ };
+
+[generic DMA request binding]
-Example:
mmc1: mmc@0x4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
@@ -29,4 +49,7 @@ Example:
bus-width = <4>;
vmmc-supply = <&vmmc>; /* phandle to regulator node */
ti,non-removable;
+ dmas = <&edma 24
+ &edma 25>;
+ dma-names = "tx", "rx";
};
--
1.7.9.5
The binding definition is based on the generic DMA request binding.
Signed-off-by: Matt Porter <[email protected]>
---
Documentation/devicetree/bindings/spi/omap-spi.txt | 27 +++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/omap-spi.txt b/Documentation/devicetree/bindings/spi/omap-spi.txt
index 81df374..11aff04 100644
--- a/Documentation/devicetree/bindings/spi/omap-spi.txt
+++ b/Documentation/devicetree/bindings/spi/omap-spi.txt
@@ -7,8 +7,18 @@ Required properties:
- ti,spi-num-cs : Number of chipselect supported by the instance.
- ti,hwmods: Name of the hwmod associated to the McSPI
+Optional properties:
+- dmas: List of DMA controller phandle and DMA request ordered
+ pairs. One tx and one rx pair is required for each chip
+ select.
+- dma-names: List of DMA request names. These strings correspond
+ 1:1 with the ordered pairs in dmas. The string naming is
+ to be "rxN" and "txN" for RX and TX requests,
+ respectively, where N equals the chip select number.
-Example:
+Examples:
+
+[hwmod populated DMA resources]
mcspi1: mcspi@1 {
#address-cells = <1>;
@@ -18,3 +28,18 @@ mcspi1: mcspi@1 {
ti,spi-num-cs = <4>;
};
+[generic DMA request binding]
+
+mcspi1: mcspi@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "ti,omap4-mcspi";
+ ti,hwmods = "mcspi1";
+ ti,spi-num-cs = <2>;
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
+};
+
--
1.7.9.5
Adds AM33XX SPI support for am335x-bone and am335x-evm.
Signed-off-by: Matt Porter <[email protected]>
---
arch/arm/boot/dts/am335x-bone.dts | 17 +++++++++++++++
arch/arm/boot/dts/am335x-evm.dts | 9 ++++++++
arch/arm/boot/dts/am33xx.dtsi | 43 +++++++++++++++++++++++++++++++++++++
3 files changed, 69 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 5510979..23edfd8 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -18,6 +18,17 @@
reg = <0x80000000 0x10000000>; /* 256 MB */
};
+ am3358_pinmux: pinmux@44e10800 {
+ spi1_pins: pinmux_spi1_pins {
+ pinctrl-single,pins = <
+ 0x190 0x13 /* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */
+ 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
+ 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
+ 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
+ >;
+ };
+ };
+
ocp {
uart1: serial@44e09000 {
status = "okay";
@@ -84,3 +95,9 @@
&mmc1 {
vmmc-supply = <&ldo3_reg>;
};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index d63fce8..8d5f660 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -124,3 +124,12 @@
&mmc1 {
vmmc-supply = <&vmmc_reg>;
};
+
+&spi0 {
+ status = "okay";
+ spi-flash@0 {
+ compatible = "spansion,s25fl064k", "m25p80";
+ spi-max-frequency = <24000000>;
+ reg = <0>;
+ };
+};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 26a6af7..063ecea 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -40,6 +40,15 @@
};
};
+ am3358_pinmux: pinmux@44e10800 {
+ compatible = "pinctrl-single";
+ reg = <0x44e10800 0x0238>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x7f>;
+ };
+
/*
* XXX: Use a flat representation of the AM33XX interconnect.
* The real AM33XX interconnect network is quite complex.Since
@@ -261,6 +270,40 @@
status = "disabled";
};
+ spi0: spi@48030000 {
+ compatible = "ti,omap4-mcspi";
+ ti,hwmods = "spi0";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x48030000 0x400>;
+ interrupt-parent = <&intc>;
+ interrupt = <65>;
+ dmas = <&edma 16
+ &edma 17
+ &edma 18
+ &edma 19>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
+ ti,spi-num-cs = <2>;
+ status = "disabled";
+ };
+
+ spi1: spi@481a0000 {
+ compatible = "ti,omap4-mcspi";
+ ti,hwmods = "spi1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x481a0000 0x400>;
+ interrupt-parent = <&intc>;
+ interrupt = <125>;
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
+ ti,spi-num-cs = <2>;
+ status = "disabled";
+ };
+
wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
--
1.7.9.5
Convert dmaengine channel requests to use
dma_request_slave_channel_compat(). This supports the DT case of
platforms requiring channel selection from either the OMAP DMA or
the EDMA engine. AM33xx only boots from DT and is the only user
implementing EDMA so in the !DT case we can default to the OMAP DMA
filter.
Signed-off-by: Matt Porter <[email protected]>
---
drivers/spi/spi-omap2-mcspi.c | 65 ++++++++++++++++++++++++++++-------------
1 file changed, 45 insertions(+), 20 deletions(-)
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 3542fdc..793ae8c 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -103,6 +103,9 @@ struct omap2_mcspi_dma {
struct completion dma_tx_completion;
struct completion dma_rx_completion;
+
+ char dma_rx_ch_name[14];
+ char dma_tx_ch_name[14];
};
/* use PIO for small transfers, avoiding DMA setup/teardown overhead and
@@ -819,14 +822,23 @@ static int omap2_mcspi_request_dma(struct spi_device *spi)
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
sig = mcspi_dma->dma_rx_sync_dev;
- mcspi_dma->dma_rx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+
+ mcspi_dma->dma_rx =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &sig, &master->dev,
+ mcspi_dma->dma_rx_ch_name);
+
if (!mcspi_dma->dma_rx) {
dev_err(&spi->dev, "no RX DMA engine channel for McSPI\n");
return -EAGAIN;
}
sig = mcspi_dma->dma_tx_sync_dev;
- mcspi_dma->dma_tx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+ mcspi_dma->dma_tx =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &sig, &master->dev,
+ mcspi_dma->dma_tx_ch_name);
+
if (!mcspi_dma->dma_tx) {
dev_err(&spi->dev, "no TX DMA engine channel for McSPI\n");
dma_release_channel(mcspi_dma->dma_rx);
@@ -1217,29 +1229,42 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev)
goto free_master;
for (i = 0; i < master->num_chipselect; i++) {
- char dma_ch_name[14];
+ char *dma_rx_ch_name = mcspi->dma_channels[i].dma_rx_ch_name;
+ char *dma_tx_ch_name = mcspi->dma_channels[i].dma_tx_ch_name;
struct resource *dma_res;
- sprintf(dma_ch_name, "rx%d", i);
- dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- dma_ch_name);
- if (!dma_res) {
- dev_dbg(&pdev->dev, "cannot get DMA RX channel\n");
- status = -ENODEV;
- break;
- }
+ sprintf(dma_rx_ch_name, "rx%d", i);
+ if (!pdev->dev.of_node) {
+ dma_res =
+ platform_get_resource_byname(pdev,
+ IORESOURCE_DMA,
+ dma_rx_ch_name);
+ if (!dma_res) {
+ dev_dbg(&pdev->dev,
+ "cannot get DMA RX channel\n");
+ status = -ENODEV;
+ break;
+ }
- mcspi->dma_channels[i].dma_rx_sync_dev = dma_res->start;
- sprintf(dma_ch_name, "tx%d", i);
- dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- dma_ch_name);
- if (!dma_res) {
- dev_dbg(&pdev->dev, "cannot get DMA TX channel\n");
- status = -ENODEV;
- break;
+ mcspi->dma_channels[i].dma_rx_sync_dev =
+ dma_res->start;
}
+ sprintf(dma_tx_ch_name, "tx%d", i);
+ if (!pdev->dev.of_node) {
+ dma_res =
+ platform_get_resource_byname(pdev,
+ IORESOURCE_DMA,
+ dma_tx_ch_name);
+ if (!dma_res) {
+ dev_dbg(&pdev->dev,
+ "cannot get DMA TX channel\n");
+ status = -ENODEV;
+ break;
+ }
- mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start;
+ mcspi->dma_channels[i].dma_tx_sync_dev =
+ dma_res->start;
+ }
}
if (status < 0)
--
1.7.9.5
Adds AM33XX MMC support for am335x-bone and am335x-evm.
Signed-off-by: Matt Porter <[email protected]>
---
arch/arm/boot/dts/am335x-bone.dts | 6 ++++++
arch/arm/boot/dts/am335x-evm.dts | 6 ++++++
arch/arm/boot/dts/am33xx.dtsi | 27 +++++++++++++++++++++++++++
3 files changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index c634f87..5510979 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -70,6 +70,8 @@
};
ldo3_reg: regulator@5 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
regulator-always-on;
};
@@ -78,3 +80,7 @@
};
};
};
+
+&mmc1 {
+ vmmc-supply = <&ldo3_reg>;
+};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 185d632..d63fce8 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -114,7 +114,13 @@
};
vmmc_reg: regulator@12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
+
+&mmc1 {
+ vmmc-supply = <&vmmc_reg>;
+};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index ab9c78f..26a6af7 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -234,6 +234,33 @@
status = "disabled";
};
+ mmc1: mmc@48060000 {
+ compatible = "ti,omap3-hsmmc";
+ ti,hwmods = "mmc1";
+ ti,dual-volt;
+ ti,needs-special-reset;
+ dmas = <&edma 24
+ &edma 25>;
+ dma-names = "tx", "rx";
+ };
+
+ mmc2: mmc@481d8000 {
+ compatible = "ti,omap3-hsmmc";
+ ti,hwmods = "mmc2";
+ ti,needs-special-reset;
+ dmas = <&edma 2
+ &edma 3>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ mmc3: mmc@47810000 {
+ compatible = "ti,omap3-hsmmc";
+ ti,hwmods = "mmc3";
+ ti,needs-special-reset;
+ status = "disabled";
+ };
+
wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
--
1.7.9.5
The EDMA DMAC has a hardware limitation that prevents supporting
scatter gather lists with any number of segments. Since the EDMA
DMA Engine driver sets the maximum segments to 16, we do the
same.
TODO: this will be replaced once the DMA Engine API supports an
API to query the DMAC's segment size limit.
Signed-off-by: Matt Porter <[email protected]>
---
drivers/mmc/host/omap_hsmmc.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index b327cd0..52bab01 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1828,6 +1828,16 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
* as we want. */
mmc->max_segs = 1024;
+ /* Eventually we should get our max_segs limitation for EDMA by
+ * querying the dmaengine API */
+ if (pdev->dev.of_node) {
+ struct device_node *parent = pdev->dev.of_node->parent;
+ struct device_node *node;
+ node = of_find_node_by_name(parent, "edma");
+ if (node)
+ mmc->max_segs = 16;
+ }
+
mmc->max_blk_size = 512; /* Block Length at max can be 1024 */
mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */
mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
--
1.7.9.5
Enable TI EDMA option on OMAP.
Signed-off-by: Matt Porter <[email protected]>
---
drivers/dma/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 677cd6e..eaea1c2 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -210,7 +210,7 @@ config SIRF_DMA
config TI_EDMA
tristate "TI EDMA support"
- depends on ARCH_DAVINCI
+ depends on ARCH_DAVINCI || ARCH_OMAP
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
default n
--
1.7.9.5
Convert dmaengine channel requests to use
dma_request_slave_channel_compat(). This supports the DT case of
platforms requiring channel selection from either the OMAP DMA or
the EDMA engine. AM33xx only boots from DT and is the only user
implementing EDMA so in the !DT case we can default to the OMAP DMA
filter.
Signed-off-by: Matt Porter <[email protected]>
---
drivers/mmc/host/omap_hsmmc.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 54bfd0c..b327cd0 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1866,14 +1866,20 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
- host->rx_chan = dma_request_channel(mask, omap_dma_filter_fn, &rx_req);
+ host->rx_chan =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &rx_req, &pdev->dev, "rx");
+
if (!host->rx_chan) {
dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel %u\n", rx_req);
ret = -ENXIO;
goto err_irq;
}
- host->tx_chan = dma_request_channel(mask, omap_dma_filter_fn, &tx_req);
+ host->tx_chan =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &tx_req, &pdev->dev, "tx");
+
if (!host->tx_chan) {
dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel %u\n", tx_req);
ret = -ENXIO;
--
1.7.9.5
The binding definition is based on the generic DMA controller
binding.
Signed-off-by: Matt Porter <[email protected]>
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 51 +++++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
new file mode 100644
index 0000000..3344345
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
@@ -0,0 +1,51 @@
+TI EDMA
+
+Required properties:
+- compatible : "ti,edma3"
+- ti,hwmods: Name of the hwmods associated to the EDMA
+- ti,edma-regions: Number of regions
+- ti,edma-slots: Number of slots
+- ti,edma-queue-tc-map: List of transfer control to queue mappings
+- ti,edma-queue-priority-map: List of queue priority mappings
+- ti,edma-default-queue: Default queue value
+
+Optional properties:
+- ti,edma-reserved-channels: List of reserved channel regions
+- ti,edma-reserved-slots: List of reserved slot regions
+- ti,edma-xbar-event-map: Crossbar event to channel map
+
+Example:
+
+edma: edma@49000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x49000000 0x10000>;
+ interrupt-parent = <&intc>;
+ interrupts = <12 13 14>;
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ ti,edma-reserved-channels = <0 2
+ 14 2
+ 26 6
+ 48 4
+ 56 8>;
+ ti,edma-reserved-slots = <0 2
+ 14 2
+ 26 6
+ 48 4
+ 56 8
+ 64 127>;
+ ti,edma-queue-tc-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-queue-priority-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-default-queue = <0>;
+ ti,edma-xbar-event-map = <1 12
+ 2 13>;
+};
--
1.7.9.5
Adds a dma_request_slave_channel_compat() wrapper which accepts
both the arguments from dma_request_channel() and
dma_request_slave_channel(). Based on whether the driver is
instantiated via DT, the appropriate channel request call will be
made.
This allows for a much cleaner migration of drivers to the
dmaengine DT API as platforms continue to be mixed between those
that boot using DT and those that do not.
Suggested-by: Tony Lindgren <[email protected]>
Signed-off-by: Matt Porter <[email protected]>
---
include/linux/dmaengine.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index c88f302..11d9e25 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -1007,6 +1007,16 @@ void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
struct dma_chan *net_dma_find_channel(void);
#define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
+static inline struct dma_chan
+*dma_request_slave_channel_compat(dma_cap_mask_t mask, dma_filter_fn fn,
+ void *fn_param, struct device *dev,
+ char *name)
+{
+ if (dev->of_node)
+ return dma_request_slave_channel(dev, name);
+ else
+ return dma_request_channel(mask, fn, fn_param);
+}
/* --- Helper iov-locking functions --- */
--
1.7.9.5
Adds support for the per-EDMA channel event mux. This is required
for any peripherals using DMA crossbar mapped events.
Signed-off-by: Matt Porter <[email protected]>
---
arch/arm/common/edma.c | 63 +++++++++++++++++++++++++++++++++++-
include/linux/platform_data/edma.h | 1 +
2 files changed, 63 insertions(+), 1 deletion(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 6d2a590..b761b7a 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -1425,6 +1425,53 @@ static int edma_of_read_u32_to_s16_array(const struct device_node *np,
return 0;
}
+static int edma_xbar_event_map(struct device *dev,
+ struct device_node *node,
+ struct edma_soc_info *pdata, int len)
+{
+ int ret = 0;
+ int i;
+ struct resource res;
+ void *xbar;
+ s16 (*xbar_chans)[2];
+ u32 shift, offset, mux;
+
+ xbar_chans = devm_kzalloc(dev,
+ len/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!xbar_chans)
+ return -ENOMEM;
+
+ ret = of_address_to_resource(node, 1, &res);
+ if (IS_ERR_VALUE(ret))
+ return -EIO;
+
+ xbar = devm_ioremap(dev, res.start, resource_size(&res));
+ if (!xbar)
+ return -EIO;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-xbar-event-map",
+ (s16 *)xbar_chans,
+ len/sizeof(u32));
+ if (IS_ERR_VALUE(ret))
+ return -EIO;
+
+ for (i = 0; xbar_chans[i][0] != -1; i++) {
+ shift = (xbar_chans[i][1] % 4) * 8;
+ offset = xbar_chans[i][1] >> 2;
+ offset <<= 2;
+ mux = __raw_readl((void *)((u32)xbar + offset));
+ mux &= (~(0xff << shift));
+ mux |= (xbar_chans[i][0] << shift);
+ __raw_writel(mux, (void *)((u32)xbar + offset));
+ }
+
+ pdata->xbar_chans = xbar_chans;
+
+ return 0;
+}
+
static int edma_of_parse_dt(struct device *dev,
struct device_node *node,
struct edma_soc_info *pdata)
@@ -1453,7 +1500,6 @@ static int edma_of_parse_dt(struct device *dev,
pdata->n_slot = value;
pdata->n_cc = 1;
- /* This is unused */
pdata->n_tc = 3;
rsv_info =
@@ -1538,6 +1584,10 @@ static int edma_of_parse_dt(struct device *dev,
return ret;
pdata->default_queue = value;
+ prop = of_find_property(node, "ti,edma-xbar-event-map", &sz);
+ if (prop)
+ ret = edma_xbar_event_map(dev, node, pdata, sz);
+
return ret;
}
@@ -1554,6 +1604,7 @@ static int __init edma_probe(struct platform_device *pdev)
int status = -1;
s16 (*rsv_chans)[2];
s16 (*rsv_slots)[2];
+ s16 (*xbar_chans)[2];
int irq[EDMA_MAX_CC] = {0, 0};
int err_irq[EDMA_MAX_CC] = {0, 0};
struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
@@ -1678,6 +1729,16 @@ static int __init edma_probe(struct platform_device *pdev)
}
}
+ /* Clear the xbar mapped channels in unused list */
+ xbar_chans = info[j]->xbar_chans;
+ if (xbar_chans) {
+ for (i = 0; xbar_chans[i][1] != -1; i++) {
+ off = xbar_chans[i][1];
+ clear_bits(off, 1,
+ edma_cc[j]->edma_unused);
+ }
+ }
+
if (node)
irq[j] = irq_of_parse_and_map(node, 0);
else {
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index b20b586..888a3c6 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -191,6 +191,7 @@ struct edma_soc_info {
/* Resource reservation for other cores */
struct edma_rsv_info *rsv;
+ s16 (*xbar_chans)[2];
s8 (*queue_tc_mapping)[2];
s8 (*queue_priority_mapping)[2];
};
--
1.7.9.5
Fix build on OMAP, the irqs are undefined on AM33xx.
These error interrupt handlers were hardcoded as disabled
so since they are unused code, simply remove them.
Signed-off-by: Matt Porter <[email protected]>
---
arch/arm/common/edma.c | 37 -------------------------------------
1 file changed, 37 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 4411087..a3d189d 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -494,26 +494,6 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
return IRQ_HANDLED;
}
-/******************************************************************************
- *
- * Transfer controller error interrupt handlers
- *
- *****************************************************************************/
-
-#define tc_errs_handled false /* disabled as long as they're NOPs */
-
-static irqreturn_t dma_tc0err_handler(int irq, void *data)
-{
- dev_dbg(data, "dma_tc0err_handler\n");
- return IRQ_HANDLED;
-}
-
-static irqreturn_t dma_tc1err_handler(int irq, void *data)
-{
- dev_dbg(data, "dma_tc1err_handler\n");
- return IRQ_HANDLED;
-}
-
static int reserve_contiguous_slots(int ctlr, unsigned int id,
unsigned int num_slots,
unsigned int start_slot)
@@ -1538,23 +1518,6 @@ static int __init edma_probe(struct platform_device *pdev)
arch_num_cc++;
}
- if (tc_errs_handled) {
- status = request_irq(IRQ_TCERRINT0, dma_tc0err_handler, 0,
- "edma_tc0", &pdev->dev);
- if (status < 0) {
- dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n",
- IRQ_TCERRINT0, status);
- return status;
- }
- status = request_irq(IRQ_TCERRINT, dma_tc1err_handler, 0,
- "edma_tc1", &pdev->dev);
- if (status < 0) {
- dev_dbg(&pdev->dev, "request_irq %d --> %d\n",
- IRQ_TCERRINT, status);
- return status;
- }
- }
-
return 0;
fail:
--
1.7.9.5
Adds support for parsing the TI EDMA DT data into the required
EDMA private API platform data.
Calls runtime PM API only in the DT case in order to unidle the
associated hwmods on AM33XX.
Signed-off-by: Matt Porter <[email protected]>
---
arch/arm/common/edma.c | 255 +++++++++++++++++++++++++--
arch/arm/mach-davinci/board-da830-evm.c | 4 +-
arch/arm/mach-davinci/board-da850-evm.c | 8 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 4 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 8 +-
arch/arm/mach-davinci/devices-da8xx.c | 8 +-
arch/arm/mach-davinci/devices-tnetv107x.c | 4 +-
arch/arm/mach-davinci/dm355.c | 4 +-
arch/arm/mach-davinci/dm365.c | 4 +-
arch/arm/mach-davinci/dm644x.c | 4 +-
arch/arm/mach-davinci/dm646x.c | 4 +-
include/linux/platform_data/edma.h | 8 +-
12 files changed, 272 insertions(+), 43 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index a3d189d..6d2a590 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -24,6 +24,13 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/slab.h>
+#include <linux/edma.h>
+#include <linux/err.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_dma.h>
+#include <linux/of_irq.h>
+#include <linux/pm_runtime.h>
#include <linux/platform_data/edma.h>
@@ -1366,31 +1373,237 @@ void edma_clear_event(unsigned channel)
EXPORT_SYMBOL(edma_clear_event);
/*-----------------------------------------------------------------------*/
+static int edma_of_read_u32_to_s8_array(const struct device_node *np,
+ const char *propname, s8 *out_values,
+ size_t sz)
+{
+ struct property *prop = of_find_property(np, propname, NULL);
+ const __be32 *val;
+
+ if (!prop)
+ return -EINVAL;
+ if (!prop->value)
+ return -ENODATA;
+ if ((sz * sizeof(u32)) > prop->length)
+ return -EOVERFLOW;
+
+ val = prop->value;
+
+ while (sz--)
+ *out_values++ = (s8)(be32_to_cpup(val++) & 0xff);
+
+ /* Terminate it */
+ *out_values++ = -1;
+ *out_values++ = -1;
+
+ return 0;
+}
+
+static int edma_of_read_u32_to_s16_array(const struct device_node *np,
+ const char *propname, s16 *out_values,
+ size_t sz)
+{
+ struct property *prop = of_find_property(np, propname, NULL);
+ const __be32 *val;
+
+ if (!prop)
+ return -EINVAL;
+ if (!prop->value)
+ return -ENODATA;
+ if ((sz * sizeof(u32)) > prop->length)
+ return -EOVERFLOW;
+
+ val = prop->value;
+
+ while (sz--)
+ *out_values++ = (s16)(be32_to_cpup(val++) & 0xffff);
+
+ /* Terminate it */
+ *out_values++ = -1;
+ *out_values++ = -1;
+
+ return 0;
+}
+
+static int edma_of_parse_dt(struct device *dev,
+ struct device_node *node,
+ struct edma_soc_info *pdata)
+{
+ int ret = 0;
+ u32 value;
+ struct property *prop;
+ size_t sz;
+ struct edma_rsv_info *rsv_info;
+ s16 (*rsv_chans)[2], (*rsv_slots)[2];
+ s8 (*queue_tc_map)[2], (*queue_priority_map)[2];
+
+ ret = of_property_read_u32(node, "dma-channels", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_channel = value;
+
+ ret = of_property_read_u32(node, "ti,edma-regions", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_region = value;
+
+ ret = of_property_read_u32(node, "ti,edma-slots", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_slot = value;
+
+ pdata->n_cc = 1;
+ /* This is unused */
+ pdata->n_tc = 3;
+
+ rsv_info =
+ devm_kzalloc(dev, sizeof(struct edma_rsv_info), GFP_KERNEL);
+ if (!rsv_info)
+ return -ENOMEM;
+ pdata->rsv = rsv_info;
+
+ /* Build the reserved channel/slots arrays */
+ prop = of_find_property(node, "ti,edma-reserved-channels", &sz);
+ if (prop) {
+ rsv_chans = devm_kzalloc(dev,
+ sz/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!rsv_chans)
+ return -ENOMEM;
+ pdata->rsv->rsv_chans = rsv_chans;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-reserved-channels",
+ (s16 *)rsv_chans,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+ }
+
+ prop = of_find_property(node, "ti,edma-reserved-slots", &sz);
+ if (prop) {
+ rsv_slots = devm_kzalloc(dev,
+ sz/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!rsv_slots)
+ return -ENOMEM;
+ pdata->rsv->rsv_slots = rsv_slots;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-reserved-slots",
+ (s16 *)rsv_slots,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+ }
+
+ prop = of_find_property(node, "ti,edma-queue-tc-map", &sz);
+ if (!prop)
+ return -EINVAL;
+
+ queue_tc_map = devm_kzalloc(dev,
+ sz/sizeof(s8) + 2*sizeof(s8),
+ GFP_KERNEL);
+ if (!queue_tc_map)
+ return -ENOMEM;
+ pdata->queue_tc_mapping = queue_tc_map;
+
+ ret = edma_of_read_u32_to_s8_array(node,
+ "ti,edma-queue-tc-map",
+ (s8 *)queue_tc_map,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+
+ prop = of_find_property(node, "ti,edma-queue-priority-map", &sz);
+ if (!prop)
+ return -EINVAL;
+
+ queue_priority_map = devm_kzalloc(dev,
+ sz/sizeof(s8) + 2*sizeof(s8),
+ GFP_KERNEL);
+ if (!queue_priority_map)
+ return -ENOMEM;
+ pdata->queue_priority_mapping = queue_priority_map;
+
+ ret = edma_of_read_u32_to_s8_array(node,
+ "ti,edma-queue-tc-map",
+ (s8 *)queue_priority_map,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+
+ ret = of_property_read_u32(node, "ti,edma-default-queue", &value);
+ if (ret < 0)
+ return ret;
+ pdata->default_queue = value;
+
+ return ret;
+}
+
+static struct of_dma_filter_info edma_filter_info = {
+ .filter_fn = edma_filter_fn,
+};
static int __init edma_probe(struct platform_device *pdev)
{
struct edma_soc_info **info = pdev->dev.platform_data;
- const s8 (*queue_priority_mapping)[2];
- const s8 (*queue_tc_mapping)[2];
+ s8 (*queue_priority_mapping)[2];
+ s8 (*queue_tc_mapping)[2];
int i, j, off, ln, found = 0;
int status = -1;
- const s16 (*rsv_chans)[2];
- const s16 (*rsv_slots)[2];
+ s16 (*rsv_chans)[2];
+ s16 (*rsv_slots)[2];
int irq[EDMA_MAX_CC] = {0, 0};
int err_irq[EDMA_MAX_CC] = {0, 0};
- struct resource *r[EDMA_MAX_CC] = {NULL};
+ struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
+ struct resource res[EDMA_MAX_CC];
resource_size_t len[EDMA_MAX_CC];
char res_name[10];
char irq_name[10];
+ struct device_node *node = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+ struct edma_soc_info *pdata;
+ int ret;
+
+ if (node) {
+ pdata = devm_kzalloc(dev,
+ sizeof(struct edma_soc_info),
+ GFP_KERNEL);
+ edma_of_parse_dt(dev, node, pdata);
+ info = &pdata;
+ dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap);
+ of_dma_controller_register(dev->of_node,
+ of_dma_simple_xlate,
+ &edma_filter_info);
+ pm_runtime_enable(dev);
+ ret = pm_runtime_get_sync(dev);
+ if (IS_ERR_VALUE(ret)) {
+ dev_err(dev, "pm_runtime_get_sync() failed\n");
+ return ret;
+ }
+ }
if (!info)
return -ENODEV;
for (j = 0; j < EDMA_MAX_CC; j++) {
- sprintf(res_name, "edma_cc%d", j);
- r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ if (!info[j]) {
+ if (!found)
+ return -ENODEV;
+ break;
+ }
+ if (node) {
+ ret = of_address_to_resource(node, j, &res[j]);
+ if (!IS_ERR_VALUE(ret))
+ r[j] = &res[j];
+ } else {
+ sprintf(res_name, "edma_cc%d", j);
+ r[j] = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM,
res_name);
- if (!r[j] || !info[j]) {
+ }
+ if (!r[j]) {
if (found)
break;
else
@@ -1465,8 +1678,12 @@ static int __init edma_probe(struct platform_device *pdev)
}
}
- sprintf(irq_name, "edma%d", j);
- irq[j] = platform_get_irq_byname(pdev, irq_name);
+ if (node)
+ irq[j] = irq_of_parse_and_map(node, 0);
+ else {
+ sprintf(irq_name, "edma%d", j);
+ irq[j] = platform_get_irq_byname(pdev, irq_name);
+ }
edma_cc[j]->irq_res_start = irq[j];
status = request_irq(irq[j], dma_irq_handler, 0, "edma",
&pdev->dev);
@@ -1476,8 +1693,12 @@ static int __init edma_probe(struct platform_device *pdev)
goto fail;
}
- sprintf(irq_name, "edma%d_err", j);
- err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+ if (node)
+ err_irq[j] = irq_of_parse_and_map(node, 2);
+ else {
+ sprintf(irq_name, "edma%d_err", j);
+ err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+ }
edma_cc[j]->irq_res_end = err_irq[j];
status = request_irq(err_irq[j], dma_ccerr_handler, 0,
"edma_error", &pdev->dev);
@@ -1538,9 +1759,17 @@ fail1:
return status;
}
+static const struct of_device_id edma_of_ids[] = {
+ { .compatible = "ti,edma3", },
+ {}
+};
static struct platform_driver edma_driver = {
- .driver.name = "edma",
+ .driver = {
+ .name = "edma",
+ .of_match_table = edma_of_ids,
+ },
+ .probe = edma_probe,
};
static int __init edma_init(void)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 95b5e10..ffcbec1 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -512,7 +512,7 @@ static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
* example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
* they are being reserved for codecs on the DSP side.
*/
-static const s16 da830_dma_rsv_chans[][2] = {
+static s16 da830_dma_rsv_chans[][2] = {
/* (offset, number) */
{ 8, 2},
{12, 2},
@@ -521,7 +521,7 @@ static const s16 da830_dma_rsv_chans[][2] = {
{-1, -1}
};
-static const s16 da830_dma_rsv_slots[][2] = {
+static s16 da830_dma_rsv_slots[][2] = {
/* (offset, number) */
{ 8, 2},
{12, 2},
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 32ee3f8..f207965 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1097,7 +1097,7 @@ device_initcall(da850_evm_config_emac);
* example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
* they are being reserved for codecs on the DSP side.
*/
-static const s16 da850_dma0_rsv_chans[][2] = {
+static s16 da850_dma0_rsv_chans[][2] = {
/* (offset, number) */
{ 8, 6},
{24, 4},
@@ -1105,7 +1105,7 @@ static const s16 da850_dma0_rsv_chans[][2] = {
{-1, -1}
};
-static const s16 da850_dma0_rsv_slots[][2] = {
+static s16 da850_dma0_rsv_slots[][2] = {
/* (offset, number) */
{ 8, 6},
{24, 4},
@@ -1113,14 +1113,14 @@ static const s16 da850_dma0_rsv_slots[][2] = {
{-1, -1}
};
-static const s16 da850_dma1_rsv_chans[][2] = {
+static s16 da850_dma1_rsv_chans[][2] = {
/* (offset, number) */
{ 0, 28},
{30, 2},
{-1, -1}
};
-static const s16 da850_dma1_rsv_slots[][2] = {
+static s16 da850_dma1_rsv_slots[][2] = {
/* (offset, number) */
{ 0, 28},
{30, 90},
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 1dbf85b..6c5b814 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -764,7 +764,7 @@ static struct davinci_uart_config uart_config __initdata = {
* example: Timer, GPIO, UART events etc) on dm646x, hence they are being
* reserved for codecs on the DSP side.
*/
-static const s16 dm646x_dma_rsv_chans[][2] = {
+static s16 dm646x_dma_rsv_chans[][2] = {
/* (offset, number) */
{ 0, 4},
{13, 3},
@@ -774,7 +774,7 @@ static const s16 dm646x_dma_rsv_chans[][2] = {
{-1, -1}
};
-static const s16 dm646x_dma_rsv_slots[][2] = {
+static s16 dm646x_dma_rsv_slots[][2] = {
/* (offset, number) */
{ 0, 4},
{13, 3},
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index dc1208e..09c34f8 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -70,7 +70,7 @@ static __init void omapl138_hawk_config_emac(void)
* example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard,
* hence they are being reserved for codecs on the DSP side.
*/
-static const s16 da850_dma0_rsv_chans[][2] = {
+static s16 da850_dma0_rsv_chans[][2] = {
/* (offset, number) */
{ 8, 6},
{24, 4},
@@ -78,7 +78,7 @@ static const s16 da850_dma0_rsv_chans[][2] = {
{-1, -1}
};
-static const s16 da850_dma0_rsv_slots[][2] = {
+static s16 da850_dma0_rsv_slots[][2] = {
/* (offset, number) */
{ 8, 6},
{24, 4},
@@ -86,14 +86,14 @@ static const s16 da850_dma0_rsv_slots[][2] = {
{-1, -1}
};
-static const s16 da850_dma1_rsv_chans[][2] = {
+static s16 da850_dma1_rsv_chans[][2] = {
/* (offset, number) */
{ 0, 28},
{30, 2},
{-1, -1}
};
-static const s16 da850_dma1_rsv_slots[][2] = {
+static s16 da850_dma1_rsv_slots[][2] = {
/* (offset, number) */
{ 0, 28},
{30, 90},
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index bd2f72b..1f9c6ff 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -103,27 +103,27 @@ struct platform_device da8xx_serial_device = {
},
};
-static const s8 da8xx_queue_tc_mapping[][2] = {
+static s8 da8xx_queue_tc_mapping[][2] = {
/* {event queue no, TC no} */
{0, 0},
{1, 1},
{-1, -1}
};
-static const s8 da8xx_queue_priority_mapping[][2] = {
+static s8 da8xx_queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 3},
{1, 7},
{-1, -1}
};
-static const s8 da850_queue_tc_mapping[][2] = {
+static s8 da850_queue_tc_mapping[][2] = {
/* {event queue no, TC no} */
{0, 0},
{-1, -1}
};
-static const s8 da850_queue_priority_mapping[][2] = {
+static s8 da850_queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 3},
{-1, -1}
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
index 59efd7f..d2453c9 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
@@ -58,14 +58,14 @@
#define TNETV107X_DMACH_SDIO1_RX 28
#define TNETV107X_DMACH_SDIO1_TX 29
-static const s8 edma_tc_mapping[][2] = {
+static s8 edma_tc_mapping[][2] = {
/* event queue no TC no */
{ 0, 0 },
{ 1, 1 },
{ -1, -1 }
};
-static const s8 edma_priority_mapping[][2] = {
+static s8 edma_priority_mapping[][2] = {
/* event queue no Prio */
{ 0, 3 },
{ 1, 7 },
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index b165c27..cdefef3 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -567,7 +567,7 @@ static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
/*----------------------------------------------------------------------*/
-static const s8
+static s8
queue_tc_mapping[][2] = {
/* {event queue no, TC no} */
{0, 0},
@@ -575,7 +575,7 @@ queue_tc_mapping[][2] = {
{-1, -1},
};
-static const s8
+static s8
queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 3},
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index a611716..801e162 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -822,7 +822,7 @@ static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
};
/* Four Transfer Controllers on DM365 */
-static const s8
+static s8
dm365_queue_tc_mapping[][2] = {
/* {event queue no, TC no} */
{0, 0},
@@ -832,7 +832,7 @@ dm365_queue_tc_mapping[][2] = {
{-1, -1},
};
-static const s8
+static s8
dm365_queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 7},
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 90f5639..4799fd9 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -497,7 +497,7 @@ static u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
/*----------------------------------------------------------------------*/
-static const s8
+static s8
queue_tc_mapping[][2] = {
/* {event queue no, TC no} */
{0, 0},
@@ -505,7 +505,7 @@ queue_tc_mapping[][2] = {
{-1, -1},
};
-static const s8
+static s8
queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 3},
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 08f9dab..b4a4da6 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -531,7 +531,7 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
/*----------------------------------------------------------------------*/
/* Four Transfer Controllers on DM646x */
-static const s8
+static s8
dm646x_queue_tc_mapping[][2] = {
/* {event queue no, TC no} */
{0, 0},
@@ -541,7 +541,7 @@ dm646x_queue_tc_mapping[][2] = {
{-1, -1},
};
-static const s8
+static s8
dm646x_queue_priority_mapping[][2] = {
/* {event queue no, Priority} */
{0, 4},
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index 7396f0b3..b20b586 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -168,8 +168,8 @@ void edma_resume(unsigned channel);
struct edma_rsv_info {
- const s16 (*rsv_chans)[2];
- const s16 (*rsv_slots)[2];
+ s16 (*rsv_chans)[2];
+ s16 (*rsv_slots)[2];
};
/* platform_data for EDMA driver */
@@ -191,8 +191,8 @@ struct edma_soc_info {
/* Resource reservation for other cores */
struct edma_rsv_info *rsv;
- const s8 (*queue_tc_mapping)[2];
- const s8 (*queue_priority_mapping)[2];
+ s8 (*queue_tc_mapping)[2];
+ s8 (*queue_priority_mapping)[2];
};
#endif
--
1.7.9.5
Hi Matt,
On Thu, Oct 18, 2012 at 18:56:39, Porter, Matt wrote:
> Changes since v2:
> - Rebased on 3.7-rc1
> - Fixed bug in DT/pdata parsing first found by Gururaja
> that turned out to be masked by some toolchains
> - Dropped unused mach-omap2/devices.c hsmmc patch
> - Added AM33XX crossbar DMA event mux support
> - Added am335x-evm support
>
> Changes since v1:
> - Rebased on top of mainline from 12250d8
> - Dropped the feature removal schedule patch
> - Implemented dma_request_slave_channel_compat() and
> converted the mmc and spi drivers to use it
> - Dropped unneeded #address-cells and #size-cells from
> EDMA DT support
> - Moved private EDMA header to linux/platform_data/ and
> removed some unneeded definitions
> - Fixed parsing of optional properties
>
> TODO:
> - Add dmaengine support for per-channel caps so the
> hack to set the maximum segments can be replaced with
> a query to the dmaengine driver
>
> This series adds DMA Engine support for AM33xx, which uses
> an EDMA DMAC. The EDMA DMAC has been previously supported by only
> a private API implementation (much like the situation with OMAP
> DMA) found on the DaVinci family of SoCs.
>
> The series applies on top of 3.7-rc1 and the following patches:
>
> - GPMC fails to reserve memory fix:
> http://www.spinics.net/lists/linux-omap/msg79675.html
> - TPS65910 regulator fix:
> https://patchwork.kernel.org/patch/1593651/
> - dmaengine DT support from Vinod's dmaengine_dt branch in
> git://git.infradead.org/users/vkoul/slave-dma.git since
> 027478851791df751176398be02a3b1c5f6aa824
>
> The approach taken is similar to how OMAP DMA is being converted to
> DMA Engine support. With the functional EDMA private API already
> existing in mach-davinci/dma.c, we first move that to an ARM common
> area so it can be shared. Adding DT and runtime PM support to the
> private EDMA API implementation allows it to run on AM33xx. AM33xx
> *only* boots using DT so we leverage Jon's generic DT DMA helpers to
> register EDMA DMAC with the of_dma framework and then add support
> for calling the dma_request_slave_channel() API to both the mmc
> and spi drivers.
>
> With this series both BeagleBone and the AM335x EVM have working
> MMC and SPI support.
>
> This is tested on BeagleBone with a SPI framebuffer driver and MMC
> rootfs. A trivial gpio DMA event misc driver was used to test the
> crossbar DMA event support. It is also tested on the AM335x EVM
> with the onboard SPI flash and MMC rootfs. The branch at
> https://github.com/ohporter/linux/tree/edma-dmaengine-v3 has the
> complete series, dependencies, and some test drivers/defconfigs.
>
I didn't see all the patches that you posted on edma-dmaengine-v3
but I do seem them on edma-dmaengine-am33xx-v3 branch.
I added a couple of patches to enable earlyprintk and build the DTB
appended kernel image uImage-dtb.am335x-evm
Here's what i see
[...]
[ 0.128831] regulator-dummy: no parameters
[ 0.130793] NET: Registered protocol family 16
[ 0.131694] DMA: preallocated 256 KiB pool for atomic coherent allocations
[ 0.133030] omap-gpmc omap-gpmc: GPMC revision 6.0
[ 0.153136] platform 49000000.edma: alias fck already exists
[ 0.153176] platform 49000000.edma: alias fck already exists
[ 0.153199] platform 49000000.edma: alias fck already exists
[ 0.158184] OMAP GPIO hardware version 0.1
[ 0.172844] No ATAGs?
[ 0.172868] hw-breakpoint: debug architecture 0x4 unsupported.
[ 0.174282] genirq: Flags mismatch irq 28. 00000000 (edma) vs. 00000000 (edma)
[ 0.174536] ------------[ cut here ]------------
[ 0.174576] WARNING: at kernel/irq/manage.c:1211 __free_irq+0x9c/0x1c0()
[ 0.174586] Trying to free already-free IRQ 28
[ 0.174596] Modules linked in:
[ 0.174645] [<c001b0e0>] (unwind_backtrace+0x0/0xf0) from [<c0042900>] (warn_slowpath_common+0x4c/0x64)
[ 0.174668] [<c0042900>] (warn_slowpath_common+0x4c/0x64) from [<c00429ac>] (warn_slowpath_fmt+0x30/0x40)
[ 0.174688] [<c00429ac>] (warn_slowpath_fmt+0x30/0x40) from [<c00a8298>] (__free_irq+0x9c/0x1c0)
[ 0.174708] [<c00a8298>] (__free_irq+0x9c/0x1c0) from [<c00a8408>] (free_irq+0x4c/0xa8)
[ 0.174739] [<c00a8408>] (free_irq+0x4c/0xa8) from [<c07976ec>] (edma_probe+0x93c/0xa24)
[ 0.174770] [<c07976ec>] (edma_probe+0x93c/0xa24) from [<c03226d4>] (platform_drv_probe+0x18/0x1c)
[ 0.174793] [<c03226d4>] (platform_drv_probe+0x18/0x1c) from [<c0321494>] (driver_probe_device+0x84/0x224)
[ 0.174814] [<c0321494>] (driver_probe_device+0x84/0x224) from [<c03216c8>] (__driver_attach+0x94/0x98)
[ 0.174834] [<c03216c8>] (__driver_attach+0x94/0x98) from [<c031fd60>] (bus_for_each_dev+0x50/0x7c)
[ 0.174854] [<c031fd60>] (bus_for_each_dev+0x50/0x7c) from [<c0320bc4>] (bus_add_driver+0xa0/0x240)
[ 0.174874] [<c0320bc4>] (bus_add_driver+0xa0/0x240) from [<c0321bfc>] (driver_register+0x78/0x144)
[ 0.174896] [<c0321bfc>] (driver_register+0x78/0x144) from [<c03229a4>] (platform_driver_probe+0x18/0x9c)
[ 0.174918] [<c03229a4>] (platform_driver_probe+0x18/0x9c) from [<c0008874>] (do_one_initcall+0x34/0x180)
[ 0.174947] [<c0008874>] (do_one_initcall+0x34/0x180) from [<c055ad14>] (kernel_init+0x104/0x2b0)
[ 0.174978] [<c055ad14>] (kernel_init+0x104/0x2b0) from [<c0013590>] (ret_from_fork+0x14/0x24)
[ 0.175249] ---[ end trace 1b75b31a2719ed1c ]---
[ 0.175354] edma: probe of 49000000.edma failed with error -16
[ 0.253165] bio: create slab <bio-0> at 0
[ 0.257894] edma-dma-engine edma-dma-engine.0: Can't allocate PaRAM dummy slot
[ 0.257954] edma-dma-engine: probe of edma-dma-engine.0 failed with error -5
[ 0.341189] omap-dma-engine omap-dma-engine: OMAP DMA engine driver
[ 0.343155] vbat: 5000 mV
[ 0.352193] SCSI subsystem initialized
[ 0.354571] usbcore: registered new interface driver usbfs
[ 0.355085] usbcore: registered new interface driver hub
[ 0.355944] usbcore: registered new device driver usb
[ 0.376170] omap_i2c 44e0b000.i2c: bus 0 rev2.4.0 at 400 kHz
[ 0.384465] vrtc: 1800 mV
[ 0.384897] vrtc: supplied by vbat
[ 0.388130] vio: at 1800 mV
[ 0.388284] vio: supplied by vbat
[ 0.391570] vdd_mpu: 912 <--> 1312 mV at 1262 mV
[ 0.391727] vdd_mpu: supplied by vbat
[ 0.394747] vdd_core: 912 <--> 1150 mV at 1137 mV
[ 0.394898] vdd_core: supplied by vbat
[ 0.398155] vdd3: 5000 mV
[ 0.400791] vdig1: at 1800 mV
[ 0.400943] vdig1: supplied by vbat
[ 0.403675] vdig2: at 1800 mV
[ 0.403817] vdig2: supplied by vbat
[ 0.407001] vpll: at 1800 mV
[ 0.407151] vpll: supplied by vbat
[ 0.410187] vdac: at 1800 mV
[ 0.410352] vdac: supplied by vbat
[ 0.413275] vaux1: at 1800 mV
[ 0.413414] vaux1: supplied by vbat
[ 0.416325] vaux2: at 3300 mV
[ 0.416467] vaux2: supplied by vbat
[ 0.419280] vaux33: at 3300 mV
[ 0.419419] vaux33: supplied by vbat
[ 0.422440] vmmc: 1800 <--> 3300 mV at 3300 mV
[ 0.422583] vmmc: supplied by vbat
[ 0.424630] tps65910 0-002d: No interrupt support, no core IRQ
[ 0.432157] Bluetooth: Core ver 2.16
[ 0.432767] NET: Registered protocol family 31
[ 0.432785] Bluetooth: HCI device and connection manager initialized
[ 0.432928] Bluetooth: HCI socket layer initialized
[ 0.432965] Bluetooth: L2CAP socket layer initialized
[ 0.433071] Bluetooth: SCO socket layer initialized
[ 0.435116] cfg80211: Calling CRDA to update world regulatory domain
[ 0.437286] Switching to clocksource gp_timer
[ 0.585766] NET: Registered protocol family 2
[ 0.587934] TCP established hash table entries: 8192 (order: 4, 65536 bytes)
[ 0.588322] TCP bind hash table entries: 8192 (order: 6, 294912 bytes)
[ 0.592077] TCP: Hash tables configured (established 8192 bind 8192)
[ 0.592331] TCP: reno registered
[ 0.592369] UDP hash table entries: 256 (order: 2, 20480 bytes)
[ 0.592634] UDP-Lite hash table entries: 256 (order: 2, 20480 bytes)
[ 0.593454] NET: Registered protocol family 1
[ 0.595290] RPC: Registered named UNIX socket transport module.
[ 0.595315] RPC: Registered udp transport module.
[ 0.595328] RPC: Registered tcp transport module.
[ 0.595340] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.596399] NetWinder Floating Point Emulator V0.97 (double precision)
[ 0.596917] CPU PMU: probing PMU on CPU 0
[ 0.597083] hw perfevents: enabled with ARMv7 Cortex-A8 PMU driver, 5 counters available
[ 0.770294] VFS: Disk quotas dquot_6.5.2
[ 0.770539] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[ 0.773244] NFS: Registering the id_resolver key type
[ 0.773873] Key type id_resolver registered
[ 0.773897] Key type id_legacy registered
[ 0.774046] jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
[ 0.776552] msgmni has been set to 477
[ 0.780591] io scheduler noop registered
[ 0.780618] io scheduler deadline registered
[ 0.780721] io scheduler cfq registered (default)
[ 0.783750] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568
[ 0.788066] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 0.795200] omap_uart 44e09000.serial: did not get pins for uart0 error: -19
[ 0.795696] 44e09000.serial: ttyO0 at MMIO 0x44e09000 (irq = 88) is a OMAP UART0
[ 1.728556] console [ttyO0] enabled
[ 1.769162] brd: module loaded
[ 1.793083] loop: module loaded
[ 1.802779] mtdoops: mtd device (mtddev=name/number) must be supplied
[ 1.811045] OneNAND driver initializing
[ 1.816279] omap2_mcspi 48030000.spi: pins are not configured from the driver
[ 61.836153] INFO: rcu_sched detected stalls on CPUs/tasks: {} (detected by 0, t=7682 jiffies)
[ 61.845144] INFO: Stall ended before state dump start
[ 241.875170] INFO: rcu_sched detected stalls on CPUs/tasks: {} (detected by 0, t=30727 jiffies)
[ 241.884226] INFO: Stall ended before state dump start
[ 421.914230] INFO: rcu_sched detected stalls on CPUs/tasks: {} (detected by 0, t=53772 jiffies)
[...]
Let me know if I missed something.
Regards,
Vaibhav
On Fri, Oct 19, 2012 at 10:26:20AM +0000, Bedia, Vaibhav wrote:
> Hi Matt,
>
> On Thu, Oct 18, 2012 at 18:56:39, Porter, Matt wrote:
> > Changes since v2:
> > - Rebased on 3.7-rc1
> > - Fixed bug in DT/pdata parsing first found by Gururaja
> > that turned out to be masked by some toolchains
> > - Dropped unused mach-omap2/devices.c hsmmc patch
> > - Added AM33XX crossbar DMA event mux support
> > - Added am335x-evm support
> >
> > Changes since v1:
> > - Rebased on top of mainline from 12250d8
> > - Dropped the feature removal schedule patch
> > - Implemented dma_request_slave_channel_compat() and
> > converted the mmc and spi drivers to use it
> > - Dropped unneeded #address-cells and #size-cells from
> > EDMA DT support
> > - Moved private EDMA header to linux/platform_data/ and
> > removed some unneeded definitions
> > - Fixed parsing of optional properties
> >
> > TODO:
> > - Add dmaengine support for per-channel caps so the
> > hack to set the maximum segments can be replaced with
> > a query to the dmaengine driver
> >
> > This series adds DMA Engine support for AM33xx, which uses
> > an EDMA DMAC. The EDMA DMAC has been previously supported by only
> > a private API implementation (much like the situation with OMAP
> > DMA) found on the DaVinci family of SoCs.
> >
> > The series applies on top of 3.7-rc1 and the following patches:
> >
> > - GPMC fails to reserve memory fix:
> > http://www.spinics.net/lists/linux-omap/msg79675.html
> > - TPS65910 regulator fix:
> > https://patchwork.kernel.org/patch/1593651/
> > - dmaengine DT support from Vinod's dmaengine_dt branch in
> > git://git.infradead.org/users/vkoul/slave-dma.git since
> > 027478851791df751176398be02a3b1c5f6aa824
> >
> > The approach taken is similar to how OMAP DMA is being converted to
> > DMA Engine support. With the functional EDMA private API already
> > existing in mach-davinci/dma.c, we first move that to an ARM common
> > area so it can be shared. Adding DT and runtime PM support to the
> > private EDMA API implementation allows it to run on AM33xx. AM33xx
> > *only* boots using DT so we leverage Jon's generic DT DMA helpers to
> > register EDMA DMAC with the of_dma framework and then add support
> > for calling the dma_request_slave_channel() API to both the mmc
> > and spi drivers.
> >
> > With this series both BeagleBone and the AM335x EVM have working
> > MMC and SPI support.
> >
> > This is tested on BeagleBone with a SPI framebuffer driver and MMC
> > rootfs. A trivial gpio DMA event misc driver was used to test the
> > crossbar DMA event support. It is also tested on the AM335x EVM
> > with the onboard SPI flash and MMC rootfs. The branch at
> > https://github.com/ohporter/linux/tree/edma-dmaengine-v3 has the
> > complete series, dependencies, and some test drivers/defconfigs.
> >
>
> I didn't see all the patches that you posted on edma-dmaengine-v3
> but I do seem them on edma-dmaengine-am33xx-v3 branch.
I see I referenced the wrong branch in the cover letter. Thanks for
testing and noticing this. Sorry to make you hunt for the correct
branch in that repo. ;)
https://github.com/ohporter/linux/tree/edma-dmaengine-am33xx-v3
is indeed the correct branch for those wanting to pull this in or
grab some of the not-to-be-merged drivers I used for testing.
> I added a couple of patches to enable earlyprintk and build the DTB
> appended kernel image uImage-dtb.am335x-evm
>
> Here's what i see
>
> [...]
<snip>
> [ 0.175354] edma: probe of 49000000.edma failed with error -16
I missed an uninitialized pdata case in the bug fixes mentioned in
the changelog and the folks previously failing the same way didn't
hit the case I suspect you are hitting. Can you try this and let me
know how it works?
Thanks,
Matt
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index b761b7a..b43b327 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -1619,7 +1619,7 @@ static int __init edma_probe(struct platform_device *pdev)
if (node) {
pdata = devm_kzalloc(dev,
- sizeof(struct edma_soc_info),
+ EDMA_MAX_CC*sizeof(struct edma_soc_info),
GFP_KERNEL);
edma_of_parse_dt(dev, node, pdata);
info = &pdata;
On Fri, Oct 19, 2012 at 16:45:58, Porter, Matt wrote:
> On Fri, Oct 19, 2012 at 10:26:20AM +0000, Bedia, Vaibhav wrote:
[...]
> >
> > I didn't see all the patches that you posted on edma-dmaengine-v3
> > but I do seem them on edma-dmaengine-am33xx-v3 branch.
>
> I see I referenced the wrong branch in the cover letter. Thanks for
> testing and noticing this. Sorry to make you hunt for the correct
> branch in that repo. ;)
>
No problem.
> https://github.com/ohporter/linux/tree/edma-dmaengine-am33xx-v3
> is indeed the correct branch for those wanting to pull this in or
> grab some of the not-to-be-merged drivers I used for testing.
>
> > I added a couple of patches to enable earlyprintk and build the DTB
> > appended kernel image uImage-dtb.am335x-evm
> >
> > Here's what i see
> >
> > [...]
>
> <snip>
>
> > [ 0.175354] edma: probe of 49000000.edma failed with error -16
>
> I missed an uninitialized pdata case in the bug fixes mentioned in
> the changelog and the folks previously failing the same way didn't
> hit the case I suspect you are hitting. Can you try this and let me
> know how it works?
>
That doesn't help :(
Looking at the original crash log, I suspect something is not correct
with the irq portion, probably in the DT or the driver.
"genirq: Flags mismatch irq 28. 00000000 (edma) vs. 00000000 (edma)"
The warning below that is coming due to fail case in edma_probe not tracking
the request_irq status properly and but IMO that's a separate issue.
BTW, I am trying this on the EVM.
Regards,
Vaibhav
On Fri, Oct 19, 2012 at 12:02:42PM +0000, Bedia, Vaibhav wrote:
> On Fri, Oct 19, 2012 at 16:45:58, Porter, Matt wrote:
> > On Fri, Oct 19, 2012 at 10:26:20AM +0000, Bedia, Vaibhav wrote:
> [...]
> > >
> > > I didn't see all the patches that you posted on edma-dmaengine-v3
> > > but I do seem them on edma-dmaengine-am33xx-v3 branch.
> >
> > I see I referenced the wrong branch in the cover letter. Thanks for
> > testing and noticing this. Sorry to make you hunt for the correct
> > branch in that repo. ;)
> >
>
> No problem.
>
> > https://github.com/ohporter/linux/tree/edma-dmaengine-am33xx-v3
> > is indeed the correct branch for those wanting to pull this in or
> > grab some of the not-to-be-merged drivers I used for testing.
> >
> > > I added a couple of patches to enable earlyprintk and build the DTB
> > > appended kernel image uImage-dtb.am335x-evm
> > >
> > > Here's what i see
> > >
> > > [...]
> >
> > <snip>
> >
> > > [ 0.175354] edma: probe of 49000000.edma failed with error -16
> >
> > I missed an uninitialized pdata case in the bug fixes mentioned in
> > the changelog and the folks previously failing the same way didn't
> > hit the case I suspect you are hitting. Can you try this and let me
> > know how it works?
> >
>
> That doesn't help :(
Ok, so I dumped my Linaro toolchain which was masking this issue that
you got unlucky with on EVM, whereas I was lucky. Switching toolchains I
was able to reproduce the problem. Pantelis Antoniou suggested some
changes and the following fixes this issue for me...verified on both
BeagleBone and EVM. Let me know if that works on your end and I'll
incorporate some version of it in the next update.
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index b761b7a..6ed394f 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -1598,6 +1598,8 @@ static struct of_dma_filter_info edma_filter_info = {
static int __init edma_probe(struct platform_device *pdev)
{
struct edma_soc_info **info = pdev->dev.platform_data;
+ struct edma_soc_info *ninfo[EDMA_MAX_CC] = {NULL, NULL};
+ struct edma_soc_info tmpinfo;
s8 (*queue_priority_mapping)[2];
s8 (*queue_tc_mapping)[2];
int i, j, off, ln, found = 0;
@@ -1614,15 +1616,13 @@ static int __init edma_probe(struct platform_device *pdev)
char irq_name[10];
struct device_node *node = pdev->dev.of_node;
struct device *dev = &pdev->dev;
- struct edma_soc_info *pdata;
int ret;
if (node) {
- pdata = devm_kzalloc(dev,
- sizeof(struct edma_soc_info),
- GFP_KERNEL);
- edma_of_parse_dt(dev, node, pdata);
- info = &pdata;
+ info = ninfo;
+ edma_of_parse_dt(dev, node, &tmpinfo);
+ info[0] = &tmpinfo;
+
dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap);
of_dma_controller_register(dev->of_node,
of_dma_simple_xlate,
> Looking at the original crash log, I suspect something is not correct
> with the irq portion, probably in the DT or the driver.
>
> "genirq: Flags mismatch irq 28. 00000000 (edma) vs. 00000000 (edma)"
>
> The warning below that is coming due to fail case in edma_probe not tracking
> the request_irq status properly and but IMO that's a separate issue.
It is a separate issue, indeed. My ideal goal was to avoid changing
anything in this existing davinci dma implementation, that's why the
error paths were unmodified. Since I'm having to rework a few more things
I'll look at those and generate an improved version.
Russ Dill also made some good simplification/cleanup suggestions for the
of parsing on irc which I'll incorporate in the next version.
-Matt
On Fri, Oct 19, 2012 at 22:16:15, Porter, Matt wrote:
> On Fri, Oct 19, 2012 at 12:02:42PM +0000, Bedia, Vaibhav wrote:
> > On Fri, Oct 19, 2012 at 16:45:58, Porter, Matt wrote:
> > > On Fri, Oct 19, 2012 at 10:26:20AM +0000, Bedia, Vaibhav wrote:
> > [...]
> > > >
> > > > I didn't see all the patches that you posted on edma-dmaengine-v3
> > > > but I do seem them on edma-dmaengine-am33xx-v3 branch.
> > >
> > > I see I referenced the wrong branch in the cover letter. Thanks for
> > > testing and noticing this. Sorry to make you hunt for the correct
> > > branch in that repo. ;)
> > >
> >
> > No problem.
> >
> > > https://github.com/ohporter/linux/tree/edma-dmaengine-am33xx-v3
> > > is indeed the correct branch for those wanting to pull this in or
> > > grab some of the not-to-be-merged drivers I used for testing.
> > >
> > > > I added a couple of patches to enable earlyprintk and build the DTB
> > > > appended kernel image uImage-dtb.am335x-evm
> > > >
> > > > Here's what i see
> > > >
> > > > [...]
> > >
> > > <snip>
> > >
> > > > [ 0.175354] edma: probe of 49000000.edma failed with error -16
> > >
> > > I missed an uninitialized pdata case in the bug fixes mentioned in
> > > the changelog and the folks previously failing the same way didn't
> > > hit the case I suspect you are hitting. Can you try this and let me
> > > know how it works?
> > >
> >
> > That doesn't help :(
>
> Ok, so I dumped my Linaro toolchain which was masking this issue that
> you got unlucky with on EVM, whereas I was lucky. Switching toolchains I
> was able to reproduce the problem. Pantelis Antoniou suggested some
> changes and the following fixes this issue for me...verified on both
> BeagleBone and EVM. Let me know if that works on your end and I'll
> incorporate some version of it in the next update.
Heh I would not have suspected the toolchain so early ;)
>
> diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> index b761b7a..6ed394f 100644
> --- a/arch/arm/common/edma.c
> +++ b/arch/arm/common/edma.c
> @@ -1598,6 +1598,8 @@ static struct of_dma_filter_info edma_filter_info = {
> static int __init edma_probe(struct platform_device *pdev)
> {
> struct edma_soc_info **info = pdev->dev.platform_data;
> + struct edma_soc_info *ninfo[EDMA_MAX_CC] = {NULL, NULL};
> + struct edma_soc_info tmpinfo;
> s8 (*queue_priority_mapping)[2];
> s8 (*queue_tc_mapping)[2];
> int i, j, off, ln, found = 0;
> @@ -1614,15 +1616,13 @@ static int __init edma_probe(struct platform_device *pdev)
> char irq_name[10];
> struct device_node *node = pdev->dev.of_node;
> struct device *dev = &pdev->dev;
> - struct edma_soc_info *pdata;
> int ret;
>
> if (node) {
> - pdata = devm_kzalloc(dev,
> - sizeof(struct edma_soc_info),
> - GFP_KERNEL);
> - edma_of_parse_dt(dev, node, pdata);
> - info = &pdata;
> + info = ninfo;
> + edma_of_parse_dt(dev, node, &tmpinfo);
> + info[0] = &tmpinfo;
> +
> dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap);
> of_dma_controller_register(dev->of_node,
> of_dma_simple_xlate,
>
With the above diff, the kernel boots fine on the EVM.
> > Looking at the original crash log, I suspect something is not correct
> > with the irq portion, probably in the DT or the driver.
> >
> > "genirq: Flags mismatch irq 28. 00000000 (edma) vs. 00000000 (edma)"
> >
> > The warning below that is coming due to fail case in edma_probe not tracking
> > the request_irq status properly and but IMO that's a separate issue.
>
> It is a separate issue, indeed. My ideal goal was to avoid changing
> anything in this existing davinci dma implementation, that's why the
> error paths were unmodified. Since I'm having to rework a few more things
> I'll look at those and generate an improved version.
>
> Russ Dill also made some good simplification/cleanup suggestions for the
> of parsing on irc which I'll incorporate in the next version.
Ok, sounds good.
Regards,
Vaibhav
On Thu, Oct 18, 2012 at 6:26 AM, Matt Porter <[email protected]> wrote:
> Changes since v2:
> - Rebased on 3.7-rc1
> - Fixed bug in DT/pdata parsing first found by Gururaja
> that turned out to be masked by some toolchains
> - Dropped unused mach-omap2/devices.c hsmmc patch
> - Added AM33XX crossbar DMA event mux support
> - Added am335x-evm support
>
> Changes since v1:
> - Rebased on top of mainline from 12250d8
> - Dropped the feature removal schedule patch
> - Implemented dma_request_slave_channel_compat() and
> converted the mmc and spi drivers to use it
> - Dropped unneeded #address-cells and #size-cells from
> EDMA DT support
> - Moved private EDMA header to linux/platform_data/ and
> removed some unneeded definitions
> - Fixed parsing of optional properties
>
> TODO:
> - Add dmaengine support for per-channel caps so the
> hack to set the maximum segments can be replaced with
> a query to the dmaengine driver
>
> This series adds DMA Engine support for AM33xx, which uses
> an EDMA DMAC. The EDMA DMAC has been previously supported by only
> a private API implementation (much like the situation with OMAP
> DMA) found on the DaVinci family of SoCs.
This pretty far along and looks great.
Reviewed-by: [email protected]
> The series applies on top of 3.7-rc1 and the following patches:
>
> - GPMC fails to reserve memory fix:
> http://www.spinics.net/lists/linux-omap/msg79675.html
> - TPS65910 regulator fix:
> https://patchwork.kernel.org/patch/1593651/
> - dmaengine DT support from Vinod's dmaengine_dt branch in
> git://git.infradead.org/users/vkoul/slave-dma.git since
> 027478851791df751176398be02a3b1c5f6aa824
>
> The approach taken is similar to how OMAP DMA is being converted to
> DMA Engine support. With the functional EDMA private API already
> existing in mach-davinci/dma.c, we first move that to an ARM common
> area so it can be shared. Adding DT and runtime PM support to the
> private EDMA API implementation allows it to run on AM33xx. AM33xx
> *only* boots using DT so we leverage Jon's generic DT DMA helpers to
> register EDMA DMAC with the of_dma framework and then add support
> for calling the dma_request_slave_channel() API to both the mmc
> and spi drivers.
>
> With this series both BeagleBone and the AM335x EVM have working
> MMC and SPI support.
>
> This is tested on BeagleBone with a SPI framebuffer driver and MMC
> rootfs. A trivial gpio DMA event misc driver was used to test the
> crossbar DMA event support. It is also tested on the AM335x EVM
> with the onboard SPI flash and MMC rootfs. The branch at
> https://github.com/ohporter/linux/tree/edma-dmaengine-v3 has the
> complete series, dependencies, and some test drivers/defconfigs.
>
> Regression testing was done on AM180x-EVM (which also makes use
> of the EDMA dmaengine driver and the EDMA private API) using SD,
> SPI flash, and the onboard audio supported by the ASoC Davinci
> driver.
>
> After this series, the plan is to convert the last in-tree user
> of the private EDMA API (davinci-pcm/mcasp) and then eliminate
> the private EDMA API by folding its functionality into
> drivers/dma/edma.c.
>
> Matt Porter (16):
> dmaengine: edma: fix slave config dependency on direction
> ARM: davinci: move private EDMA API to arm/common
> ARM: edma: remove unused transfer controller handlers
> ARM: edma: add DT and runtime PM support for AM33XX
> ARM: edma: add AM33XX crossbar event support
> dmaengine: edma: enable build for AM33XX
> dmaengine: edma: Add TI EDMA device tree binding
> ARM: dts: add AM33XX EDMA support
> dmaengine: add dma_request_slave_channel_compat()
> mmc: omap_hsmmc: convert to dma_request_slave_channel_compat()
> mmc: omap_hsmmc: limit max_segs with the EDMA DMAC
> mmc: omap_hsmmc: add generic DMA request support to the DT binding
> ARM: dts: add AM33XX MMC support
> spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
> spi: omap2-mcspi: add generic DMA request support to the DT binding
> ARM: dts: add AM33XX SPI support
>
> Documentation/devicetree/bindings/dma/ti-edma.txt | 51 +
> .../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 25 +-
> Documentation/devicetree/bindings/spi/omap-spi.txt | 27 +-
> arch/arm/Kconfig | 1 +
> arch/arm/boot/dts/am335x-bone.dts | 23 +
> arch/arm/boot/dts/am335x-evm.dts | 15 +
> arch/arm/boot/dts/am33xx.dtsi | 101 ++
> arch/arm/common/Kconfig | 3 +
> arch/arm/common/Makefile | 1 +
> arch/arm/common/edma.c | 1841 ++++++++++++++++++++
> arch/arm/mach-davinci/Makefile | 2 +-
> arch/arm/mach-davinci/board-da830-evm.c | 4 +-
> arch/arm/mach-davinci/board-da850-evm.c | 8 +-
> arch/arm/mach-davinci/board-dm646x-evm.c | 4 +-
> arch/arm/mach-davinci/board-omapl138-hawk.c | 8 +-
> arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
> arch/arm/mach-davinci/davinci.h | 2 +-
> arch/arm/mach-davinci/devices-da8xx.c | 8 +-
> arch/arm/mach-davinci/devices-tnetv107x.c | 6 +-
> arch/arm/mach-davinci/devices.c | 7 +-
> arch/arm/mach-davinci/dm355.c | 6 +-
> arch/arm/mach-davinci/dm365.c | 6 +-
> arch/arm/mach-davinci/dm644x.c | 6 +-
> arch/arm/mach-davinci/dm646x.c | 6 +-
> arch/arm/mach-davinci/dma.c | 1588 -----------------
> arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
> arch/arm/mach-davinci/include/mach/edma.h | 267 ---
> arch/arm/plat-omap/Kconfig | 1 +
> drivers/dma/Kconfig | 2 +-
> drivers/dma/edma.c | 57 +-
> drivers/mmc/host/davinci_mmc.c | 1 +
> drivers/mmc/host/omap_hsmmc.c | 20 +-
> drivers/spi/spi-omap2-mcspi.c | 65 +-
> include/linux/dmaengine.h | 10 +
> include/linux/mfd/davinci_voicecodec.h | 3 +-
> include/linux/platform_data/edma.h | 199 +++
> include/linux/platform_data/spi-davinci.h | 2 +-
> sound/soc/davinci/davinci-evm.c | 1 +
> sound/soc/davinci/davinci-pcm.c | 1 +
> sound/soc/davinci/davinci-pcm.h | 2 +-
> sound/soc/davinci/davinci-sffsdr.c | 6 +-
> 41 files changed, 2436 insertions(+), 1954 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
> create mode 100644 arch/arm/common/edma.c
> delete mode 100644 arch/arm/mach-davinci/dma.c
> delete mode 100644 arch/arm/mach-davinci/include/mach/edma.h
> create mode 100644 include/linux/platform_data/edma.h
>
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, Oct 18, 2012 at 18:56:44, Porter, Matt wrote:
> Adds support for the per-EDMA channel event mux. This is required
> for any peripherals using DMA crossbar mapped events.
>
> Signed-off-by: Matt Porter <[email protected]>
> ---
> arch/arm/common/edma.c | 63 +++++++++++++++++++++++++++++++++++-
> include/linux/platform_data/edma.h | 1 +
> 2 files changed, 63 insertions(+), 1 deletion(-)
>
..snip..
..snip..
> +
> + for (i = 0; xbar_chans[i][0] != -1; i++) {
> + shift = (xbar_chans[i][1] % 4) * 8;
> + offset = xbar_chans[i][1] >> 2;
> + offset <<= 2;
> + mux = __raw_readl((void *)((u32)xbar + offset));
> + mux &= (~(0xff << shift));
> + mux |= (xbar_chans[i][0] << shift);
> + __raw_writel(mux, (void *)((u32)xbar + offset));
This method of calculating Xbar Channel offset has a bug that
the code breaks with unaligned access trap error when requested
channel to be mapped is odd.
This was fixed in Arago tree [1]. Kindly verify
> + }
> +
> + pdata->xbar_chans = xbar_chans;
> +
> + return 0;
> +}
> +
..snip..
..snip..
[1]
http://arago-project.org/git/projects/?p=linux-am33x.git;a=commitdiff;
h=c08d3cb557adf71c79aeefb38888395455824e83
Regards,
Gururaja
On 10/18/2012 6:56 PM, Matt Porter wrote:
> Move mach-davinci/dma.c to common/edma.c so it can be used
> by OMAP (specifically AM33xx) as well. This just moves the
> private EDMA API but does not support OMAP.
>
> Signed-off-by: Matt Porter <[email protected]>
> ---
> diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
> index 4c48a36..f45d591 100644
> --- a/arch/arm/mach-davinci/devices.c
> +++ b/arch/arm/mach-davinci/devices.c
> @@ -19,9 +19,10 @@
> #include <mach/irqs.h>
> #include <mach/cputype.h>
> #include <mach/mux.h>
> -#include <mach/edma.h>
> #include <linux/platform_data/mmc-davinci.h>
> #include <mach/time.h>
> +#include <linux/platform_data/edma.h>
Can you please introduce a patch to clean this mixture of linux/ and
mach/ includes?
> +
>
> #include "davinci.h"
> #include "clock.h"
> @@ -141,10 +142,10 @@ static struct resource mmcsd0_resources[] = {
> },
> /* DMA channels: RX, then TX */
> {
> - .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
> + .start = EDMA_CTLR_CHAN(0, 26),
Instead of just replacing the event #defines with plain numbers, can you
introduce a mach-davinci local edma.h which can then be included in the
davinci platform files which refer to edma channel numbers?
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index 7cd56ed..153fab8 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -28,6 +28,7 @@ config ARCH_OMAP2PLUS
> select OMAP_DM_TIMER
> select PROC_DEVICETREE if PROC_FS
> select SPARSE_IRQ
> + select TI_PRIV_EDMA
This hunk does not seem to belong to subject of this patch.
> select USE_OF
> help
> "Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
> diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
> new file mode 100644
> index 0000000..7396f0b3
> --- /dev/null
> +++ b/include/linux/platform_data/edma.h
> @@ -0,0 +1,198 @@
> +/*
> + * TI DAVINCI dma definitions
> + *
> + * Copyright (C) 2006-2009 Texas Instruments.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + *
> + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
> + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
> + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
> + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
> + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
> + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
> + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + * You should have received a copy of the GNU General Public License along
> + * with this program; if not, write to the Free Software Foundation, Inc.,
> + * 675 Mass Ave, Cambridge, MA 02139, USA.
This part can be dropped, I suppose ;-)
Thanks,
Sekhar
On 10/18/2012 6:56 PM, Matt Porter wrote:
> Adds support for parsing the TI EDMA DT data into the required
> EDMA private API platform data.
>
> Calls runtime PM API only in the DT case in order to unidle the
> associated hwmods on AM33XX.
Runtime PM is supported on DaVinci now, so if that was the reason for
this choice, then it doesn't need to be that way.
>
> Signed-off-by: Matt Porter <[email protected]>
> ---
> arch/arm/common/edma.c | 255 +++++++++++++++++++++++++--
> arch/arm/mach-davinci/board-da830-evm.c | 4 +-
> arch/arm/mach-davinci/board-da850-evm.c | 8 +-
> arch/arm/mach-davinci/board-dm646x-evm.c | 4 +-
> arch/arm/mach-davinci/board-omapl138-hawk.c | 8 +-
> arch/arm/mach-davinci/devices-da8xx.c | 8 +-
> arch/arm/mach-davinci/devices-tnetv107x.c | 4 +-
> arch/arm/mach-davinci/dm355.c | 4 +-
> arch/arm/mach-davinci/dm365.c | 4 +-
> arch/arm/mach-davinci/dm644x.c | 4 +-
> arch/arm/mach-davinci/dm646x.c | 4 +-
> include/linux/platform_data/edma.h | 8 +-
> 12 files changed, 272 insertions(+), 43 deletions(-)
>
> diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> index a3d189d..6d2a590 100644
> --- a/arch/arm/common/edma.c
> +++ b/arch/arm/common/edma.c
> @@ -24,6 +24,13 @@
> #include <linux/platform_device.h>
> #include <linux/io.h>
> #include <linux/slab.h>
> +#include <linux/edma.h>
> +#include <linux/err.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/of_dma.h>
> +#include <linux/of_irq.h>
> +#include <linux/pm_runtime.h>
>
> #include <linux/platform_data/edma.h>
>
> @@ -1366,31 +1373,237 @@ void edma_clear_event(unsigned channel)
> EXPORT_SYMBOL(edma_clear_event);
>
> /*-----------------------------------------------------------------------*/
> +static int edma_of_read_u32_to_s8_array(const struct device_node *np,
> + const char *propname, s8 *out_values,
> + size_t sz)
> +{
> + struct property *prop = of_find_property(np, propname, NULL);
> + const __be32 *val;
> +
> + if (!prop)
> + return -EINVAL;
> + if (!prop->value)
> + return -ENODATA;
> + if ((sz * sizeof(u32)) > prop->length)
> + return -EOVERFLOW;
> +
> + val = prop->value;
> +
> + while (sz--)
> + *out_values++ = (s8)(be32_to_cpup(val++) & 0xff);
> +
> + /* Terminate it */
> + *out_values++ = -1;
> + *out_values++ = -1;
> +
> + return 0;
> +}
> +
> +static int edma_of_read_u32_to_s16_array(const struct device_node *np,
> + const char *propname, s16 *out_values,
> + size_t sz)
> +{
> + struct property *prop = of_find_property(np, propname, NULL);
> + const __be32 *val;
> +
> + if (!prop)
> + return -EINVAL;
> + if (!prop->value)
> + return -ENODATA;
> + if ((sz * sizeof(u32)) > prop->length)
> + return -EOVERFLOW;
> +
> + val = prop->value;
> +
> + while (sz--)
> + *out_values++ = (s16)(be32_to_cpup(val++) & 0xffff);
> +
> + /* Terminate it */
> + *out_values++ = -1;
> + *out_values++ = -1;
> +
> + return 0;
> +}
I think these helper functions will have some general use beyond EDMA
and can be kept in drivers/of/base.c. Grant/Rob need to agree though.
> diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
> index 95b5e10..ffcbec1 100644
> --- a/arch/arm/mach-davinci/board-da830-evm.c
> +++ b/arch/arm/mach-davinci/board-da830-evm.c
> @@ -512,7 +512,7 @@ static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
> * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
> * they are being reserved for codecs on the DSP side.
> */
> -static const s16 da830_dma_rsv_chans[][2] = {
> +static s16 da830_dma_rsv_chans[][2] = {
I wonder why you had to remove const here and in other places. You seem
to be allocating new memory for DT case anyway. Its also not a good idea
to modify the passed platform data.
Thanks,
Sekhar
On 10/18/2012 6:56 PM, Matt Porter wrote:
> Adds support for the per-EDMA channel event mux. This is required
> for any peripherals using DMA crossbar mapped events.
>
> Signed-off-by: Matt Porter <[email protected]>
> ---
> arch/arm/common/edma.c | 63 +++++++++++++++++++++++++++++++++++-
> include/linux/platform_data/edma.h | 1 +
> 2 files changed, 63 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> index 6d2a590..b761b7a 100644
> --- a/arch/arm/common/edma.c
> +++ b/arch/arm/common/edma.c
> @@ -1425,6 +1425,53 @@ static int edma_of_read_u32_to_s16_array(const struct device_node *np,
> return 0;
> }
>
> +static int edma_xbar_event_map(struct device *dev,
> + struct device_node *node,
> + struct edma_soc_info *pdata, int len)
> +{
> + int ret = 0;
> + int i;
> + struct resource res;
> + void *xbar;
> + s16 (*xbar_chans)[2];
> + u32 shift, offset, mux;
> +
> + xbar_chans = devm_kzalloc(dev,
> + len/sizeof(s16) + 2*sizeof(s16),
> + GFP_KERNEL);
> + if (!xbar_chans)
> + return -ENOMEM;
> +
> + ret = of_address_to_resource(node, 1, &res);
> + if (IS_ERR_VALUE(ret))
> + return -EIO;
> +
> + xbar = devm_ioremap(dev, res.start, resource_size(&res));
> + if (!xbar)
> + return -EIO;
-ENOMEM is more appropiate for ioremap failures.
> +
> + ret = edma_of_read_u32_to_s16_array(node,
> + "ti,edma-xbar-event-map",
> + (s16 *)xbar_chans,
> + len/sizeof(u32));
> + if (IS_ERR_VALUE(ret))
> + return -EIO;
> +
> + for (i = 0; xbar_chans[i][0] != -1; i++) {
> + shift = (xbar_chans[i][1] % 4) * 8;
> + offset = xbar_chans[i][1] >> 2;
> + offset <<= 2;
> + mux = __raw_readl((void *)((u32)xbar + offset));
Dont use __raw* variants of io accessors. There will be ordering issues
on ARMv7.
> + mux &= (~(0xff << shift));
> + mux |= (xbar_chans[i][0] << shift);
Unnecessary parens above.
> + __raw_writel(mux, (void *)((u32)xbar + offset));
> + }
> +
> + pdata->xbar_chans = xbar_chans;
> +
> + return 0;
> +}
> +
> static int edma_of_parse_dt(struct device *dev,
> struct device_node *node,
> struct edma_soc_info *pdata)
> @@ -1453,7 +1500,6 @@ static int edma_of_parse_dt(struct device *dev,
> pdata->n_slot = value;
>
> pdata->n_cc = 1;
> - /* This is unused */
The comment should have not been part of 4/16?
Thanks,
Sekhar
On 10/18/2012 6:56 PM, Matt Porter wrote:
> Adds AM33XX EDMA support to the am33xx.dtsi as documented in
> Documentation/devicetree/bindings/dma/ti-edma.txt
>
> Signed-off-by: Matt Porter <[email protected]>
> ---
> arch/arm/boot/dts/am33xx.dtsi | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
> index bb31bff..ab9c78f 100644
> --- a/arch/arm/boot/dts/am33xx.dtsi
> +++ b/arch/arm/boot/dts/am33xx.dtsi
> @@ -62,6 +62,37 @@
> reg = <0x48200000 0x1000>;
> };
>
> + edma: edma@49000000 {
> + compatible = "ti,edma3";
> + ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
> + reg = <0x49000000 0x10000>,
> + <0x44e10f90 0x10>;
> + interrupt-parent = <&intc>;
> + interrupts = <12 13 14>;
> + #dma-cells = <1>;
> + dma-channels = <64>;
> + ti,edma-regions = <4>;
> + ti,edma-slots = <256>;
> + ti,edma-reserved-channels = <0 2
> + 14 2
> + 26 6
> + 48 4
> + 56 8>;
> + ti,edma-reserved-slots = <0 2
> + 14 2
> + 26 6
> + 48 4
> + 56 8
> + 64 127>;
No need to reserve any channels or slots on AM335x, I think. This is
used on DaVinci devices to share channels with DSP. I am not sure the
cortex-M3 or PRU on the AM335x need to (or even can) have EDMA access.
Thanks,
Sekhar
On 10/18/2012 6:56 PM, Matt Porter wrote:
> Adds AM33XX SPI support for am335x-bone and am335x-evm.
>
> Signed-off-by: Matt Porter <[email protected]>
> ---
> arch/arm/boot/dts/am335x-bone.dts | 17 +++++++++++++++
> arch/arm/boot/dts/am335x-evm.dts | 9 ++++++++
> arch/arm/boot/dts/am33xx.dtsi | 43 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 69 insertions(+)
>
> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> index 5510979..23edfd8 100644
> --- a/arch/arm/boot/dts/am335x-bone.dts
> +++ b/arch/arm/boot/dts/am335x-bone.dts
> @@ -18,6 +18,17 @@
> reg = <0x80000000 0x10000000>; /* 256 MB */
> };
>
> + am3358_pinmux: pinmux@44e10800 {
> + spi1_pins: pinmux_spi1_pins {
> + pinctrl-single,pins = <
> + 0x190 0x13 /* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */
> + 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
> + 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
> + 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
> + >;
Is there a single pinmux setting that provides SPI functionality on the
bone headers? Or this is specific to a cape you tested with?
Thanks,
Sekhar
On 10/18/2012 6:56 PM, Matt Porter wrote:
> The EDMA DMAC has a hardware limitation that prevents supporting
> scatter gather lists with any number of segments. Since the EDMA
> DMA Engine driver sets the maximum segments to 16, we do the
> same.
>
> TODO: this will be replaced once the DMA Engine API supports an
> API to query the DMAC's segment size limit.
>
> Signed-off-by: Matt Porter <[email protected]>
> ---
> drivers/mmc/host/omap_hsmmc.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> index b327cd0..52bab01 100644
> --- a/drivers/mmc/host/omap_hsmmc.c
> +++ b/drivers/mmc/host/omap_hsmmc.c
> @@ -1828,6 +1828,16 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)
> * as we want. */
> mmc->max_segs = 1024;
>
> + /* Eventually we should get our max_segs limitation for EDMA by
> + * querying the dmaengine API */
Nit picking: This is not as per multi-line comment style in
Documentation/CodingStyle.
Thanks,
Sekhar
On Thu, Oct 18, 2012 at 18:56:55, Porter, Matt wrote:
> Adds AM33XX SPI support for am335x-bone and am335x-evm.
>
> Signed-off-by: Matt Porter <[email protected]>
> ---
> arch/arm/boot/dts/am335x-bone.dts | 17 +++++++++++++++
> arch/arm/boot/dts/am335x-evm.dts | 9 ++++++++
> arch/arm/boot/dts/am33xx.dtsi | 43 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 69 insertions(+)
>
> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> index 5510979..23edfd8 100644
> --- a/arch/arm/boot/dts/am335x-bone.dts
> +++ b/arch/arm/boot/dts/am335x-bone.dts
> @@ -18,6 +18,17 @@
> reg = <0x80000000 0x10000000>; /* 256 MB */
> };
>
> + am3358_pinmux: pinmux@44e10800 {
> + spi1_pins: pinmux_spi1_pins {
> + pinctrl-single,pins = <
> + 0x190 0x13 /* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */
> + 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
> + 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
> + 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
> + >;
> + };
> + };
> +
Change to am33xx_pinmux.
> ocp {
> uart1: serial@44e09000 {
> status = "okay";
> @@ -84,3 +95,9 @@
> &mmc1 {
> vmmc-supply = <&ldo3_reg>;
> };
> +
> +&spi1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi1_pins>;
> +};
> diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
> index d63fce8..8d5f660 100644
> --- a/arch/arm/boot/dts/am335x-evm.dts
> +++ b/arch/arm/boot/dts/am335x-evm.dts
> @@ -124,3 +124,12 @@
> &mmc1 {
> vmmc-supply = <&vmmc_reg>;
> };
> +
> +&spi0 {
> + status = "okay";
> + spi-flash@0 {
> + compatible = "spansion,s25fl064k", "m25p80";
> + spi-max-frequency = <24000000>;
> + reg = <0>;
> + };
> +};
In AM335x-evm, SPI flash available in profile #2 (am335x evm specific profiles).
So can you drop this changes as if I understood correctly, am335x-evm.dts will be
populated for devices present only on profile #0.
> diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
> index 26a6af7..063ecea 100644
> --- a/arch/arm/boot/dts/am33xx.dtsi
> +++ b/arch/arm/boot/dts/am33xx.dtsi
> @@ -40,6 +40,15 @@
> };
> };
>
> + am3358_pinmux: pinmux@44e10800 {
> + compatible = "pinctrl-single";
> + reg = <0x44e10800 0x0238>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <0x7f>;
> + };
> +
Pin ctrl support already submitted
http://git.kernel.org/?p=linux/kernel/git/bcousson/linux-omap-dt.git;a=commitdiff;h=3e0603e905d9ba662e8c1885ecb1d28bc454e448
Thanks
Avinash
> /*
> * XXX: Use a flat representation of the AM33XX interconnect.
> * The real AM33XX interconnect network is quite complex.Since
> @@ -261,6 +270,40 @@
> status = "disabled";
> };
>
> + spi0: spi@48030000 {
> + compatible = "ti,omap4-mcspi";
> + ti,hwmods = "spi0";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x48030000 0x400>;
> + interrupt-parent = <&intc>;
> + interrupt = <65>;
> + dmas = <&edma 16
> + &edma 17
> + &edma 18
> + &edma 19>;
> + dma-names = "tx0", "rx0", "tx1", "rx1";
> + ti,spi-num-cs = <2>;
> + status = "disabled";
> + };
> +
> + spi1: spi@481a0000 {
> + compatible = "ti,omap4-mcspi";
> + ti,hwmods = "spi1";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x481a0000 0x400>;
> + interrupt-parent = <&intc>;
> + interrupt = <125>;
> + dmas = <&edma 42
> + &edma 43
> + &edma 44
> + &edma 45>;
> + dma-names = "tx0", "rx0", "tx1", "rx1";
> + ti,spi-num-cs = <2>;
> + status = "disabled";
> + };
> +
> wdt2: wdt@44e35000 {
> compatible = "ti,omap3-wdt";
> ti,hwmods = "wd_timer2";
> --
> 1.7.9.5
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
On Thu, Oct 18, 2012 at 18:56:52, Porter, Matt wrote:
> Adds AM33XX MMC support for am335x-bone and am335x-evm.
>
> Signed-off-by: Matt Porter <[email protected]>
> ---
> arch/arm/boot/dts/am335x-bone.dts | 6 ++++++
> arch/arm/boot/dts/am335x-evm.dts | 6 ++++++
> arch/arm/boot/dts/am33xx.dtsi | 27 +++++++++++++++++++++++++++
> 3 files changed, 39 insertions(+)
>
> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> index c634f87..5510979 100644
> --- a/arch/arm/boot/dts/am335x-bone.dts
> +++ b/arch/arm/boot/dts/am335x-bone.dts
> @@ -70,6 +70,8 @@
> };
>
> ldo3_reg: regulator@5 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
I think these min & max limits are regulator limits. Are these fields
required? Add details of these additions. AFAIK fine-tuned (board
specific) min/max limits should be add here(like mpu and core
regulator nodes)
> regulator-always-on;
> };
>
> @@ -78,3 +80,7 @@
> };
> };
> };
> +
> +&mmc1 {
> + vmmc-supply = <&ldo3_reg>;
> +};
> diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
> index 185d632..d63fce8 100644
> --- a/arch/arm/boot/dts/am335x-evm.dts
> +++ b/arch/arm/boot/dts/am335x-evm.dts
> @@ -114,7 +114,13 @@
> };
>
> vmmc_reg: regulator@12 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
=same=
> regulator-always-on;
> };
> };
> };
> +
> +&mmc1 {
> + vmmc-supply = <&vmmc_reg>;
> +};
> diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
> index ab9c78f..26a6af7 100644
> --- a/arch/arm/boot/dts/am33xx.dtsi
> +++ b/arch/arm/boot/dts/am33xx.dtsi
> @@ -234,6 +234,33 @@
> status = "disabled";
> };
>
> + mmc1: mmc@48060000 {
> + compatible = "ti,omap3-hsmmc";
> + ti,hwmods = "mmc1";
> + ti,dual-volt;
> + ti,needs-special-reset;
> + dmas = <&edma 24
> + &edma 25>;
> + dma-names = "tx", "rx";
Add status = "disabled" here and "okay" in corresponding
.dts file
> + };
> +
> + mmc2: mmc@481d8000 {
> + compatible = "ti,omap3-hsmmc";
> + ti,hwmods = "mmc2";
> + ti,needs-special-reset;
> + dmas = <&edma 2
> + &edma 3>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> +
> + mmc3: mmc@47810000 {
> + compatible = "ti,omap3-hsmmc";
> + ti,hwmods = "mmc3";
> + ti,needs-special-reset;
What about DMA resources for mmc3?
AnilKumar
> + status = "disabled";
> + };
> +
> wdt2: wdt@44e35000 {
> compatible = "ti,omap3-wdt";
> ti,hwmods = "wd_timer2";
> --
> 1.7.9.5
>
> _______________________________________________
> devicetree-discuss mailing list
> [email protected]
> https://lists.ozlabs.org/listinfo/devicetree-discuss
>
On Mon, Oct 29, 2012 at 14:40:02, Philip, Avinash wrote:
> On Thu, Oct 18, 2012 at 18:56:55, Porter, Matt wrote:
> > Adds AM33XX SPI support for am335x-bone and am335x-evm.
Matt,
Can you build SPI DT patch with DMA support on top of SPI DT patch
I submitted [1]. With the patch [1] SPI can work on PIO mode.
So we can have basic SPI support available in 3.8.
Benoit,
Can you accept the SPI DT patch [1]
In case if you want I will resubmit a patch with subject line modified.
Current subject line
arm/dts: AM33XX: Add SPI device tree data
1. https://patchwork.kernel.org/patch/1470661/
Thanks
Avinash
> >
> > Signed-off-by: Matt Porter <[email protected]>
> > ---
> > arch/arm/boot/dts/am335x-bone.dts | 17 +++++++++++++++
> > arch/arm/boot/dts/am335x-evm.dts | 9 ++++++++
> > arch/arm/boot/dts/am33xx.dtsi | 43 +++++++++++++++++++++++++++++++++++++
> > 3 files changed, 69 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> > index 5510979..23edfd8 100644
> > --- a/arch/arm/boot/dts/am335x-bone.dts
> > +++ b/arch/arm/boot/dts/am335x-bone.dts
> > @@ -18,6 +18,17 @@
> > reg = <0x80000000 0x10000000>; /* 256 MB */
> > };
> >
> > + am3358_pinmux: pinmux@44e10800 {
> > + spi1_pins: pinmux_spi1_pins {
> > + pinctrl-single,pins = <
> > + 0x190 0x13 /* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */
> > + 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
> > + 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
> > + 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
> > + >;
> > + };
> > + };
> > +
>
> Change to am33xx_pinmux.
>
> > ocp {
> > uart1: serial@44e09000 {
> > status = "okay";
> > @@ -84,3 +95,9 @@
> > &mmc1 {
> > vmmc-supply = <&ldo3_reg>;
> > };
> > +
> > +&spi1 {
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spi1_pins>;
> > +};
> > diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
> > index d63fce8..8d5f660 100644
> > --- a/arch/arm/boot/dts/am335x-evm.dts
> > +++ b/arch/arm/boot/dts/am335x-evm.dts
> > @@ -124,3 +124,12 @@
> > &mmc1 {
> > vmmc-supply = <&vmmc_reg>;
> > };
> > +
> > +&spi0 {
> > + status = "okay";
> > + spi-flash@0 {
> > + compatible = "spansion,s25fl064k", "m25p80";
> > + spi-max-frequency = <24000000>;
> > + reg = <0>;
> > + };
> > +};
>
> In AM335x-evm, SPI flash available in profile #2 (am335x evm specific profiles).
> So can you drop this changes as if I understood correctly, am335x-evm.dts will be
> populated for devices present only on profile #0.
>
> > diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
> > index 26a6af7..063ecea 100644
> > --- a/arch/arm/boot/dts/am33xx.dtsi
> > +++ b/arch/arm/boot/dts/am33xx.dtsi
> > @@ -40,6 +40,15 @@
> > };
> > };
> >
> > + am3358_pinmux: pinmux@44e10800 {
> > + compatible = "pinctrl-single";
> > + reg = <0x44e10800 0x0238>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + pinctrl-single,register-width = <32>;
> > + pinctrl-single,function-mask = <0x7f>;
> > + };
> > +
>
> Pin ctrl support already submitted
> http://git.kernel.org/?p=linux/kernel/git/bcousson/linux-omap-dt.git;a=commitdiff;h=3e0603e905d9ba662e8c1885ecb1d28bc454e448
>
> Thanks
> Avinash
>
> > /*
> > * XXX: Use a flat representation of the AM33XX interconnect.
> > * The real AM33XX interconnect network is quite complex.Since
> > @@ -261,6 +270,40 @@
> > status = "disabled";
> > };
> >
> > + spi0: spi@48030000 {
> > + compatible = "ti,omap4-mcspi";
> > + ti,hwmods = "spi0";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x48030000 0x400>;
> > + interrupt-parent = <&intc>;
> > + interrupt = <65>;
> > + dmas = <&edma 16
> > + &edma 17
> > + &edma 18
> > + &edma 19>;
> > + dma-names = "tx0", "rx0", "tx1", "rx1";
> > + ti,spi-num-cs = <2>;
> > + status = "disabled";
> > + };
> > +
> > + spi1: spi@481a0000 {
> > + compatible = "ti,omap4-mcspi";
> > + ti,hwmods = "spi1";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x481a0000 0x400>;
> > + interrupt-parent = <&intc>;
> > + interrupt = <125>;
> > + dmas = <&edma 42
> > + &edma 43
> > + &edma 44
> > + &edma 45>;
> > + dma-names = "tx0", "rx0", "tx1", "rx1";
> > + ti,spi-num-cs = <2>;
> > + status = "disabled";
> > + };
> > +
> > wdt2: wdt@44e35000 {
> > compatible = "ti,omap3-wdt";
> > ti,hwmods = "wd_timer2";
> > --
> > 1.7.9.5
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > [email protected]
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >
>
>
Hi Avinash,
On 10/30/2012 10:41 AM, Philip, Avinash wrote:
> On Mon, Oct 29, 2012 at 14:40:02, Philip, Avinash wrote:
>> On Thu, Oct 18, 2012 at 18:56:55, Porter, Matt wrote:
>>> Adds AM33XX SPI support for am335x-bone and am335x-evm.
>
> Matt,
>
> Can you build SPI DT patch with DMA support on top of SPI DT patch
> I submitted [1]. With the patch [1] SPI can work on PIO mode.
> So we can have basic SPI support available in 3.8.
>
> Benoit,
> Can you accept the SPI DT patch [1]
Yes, I've just applied it in for_3.8/dts branch
> In case if you want I will resubmit a patch with subject line modified.
No, that's fine.
Thanks,
Benoit
>
> Current subject line
> arm/dts: AM33XX: Add SPI device tree data
>
> 1. https://patchwork.kernel.org/patch/1470661/
>
> Thanks
> Avinash
>
>>>
>>> Signed-off-by: Matt Porter <[email protected]>
>>> ---
>>> arch/arm/boot/dts/am335x-bone.dts | 17 +++++++++++++++
>>> arch/arm/boot/dts/am335x-evm.dts | 9 ++++++++
>>> arch/arm/boot/dts/am33xx.dtsi | 43 +++++++++++++++++++++++++++++++++++++
>>> 3 files changed, 69 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
>>> index 5510979..23edfd8 100644
>>> --- a/arch/arm/boot/dts/am335x-bone.dts
>>> +++ b/arch/arm/boot/dts/am335x-bone.dts
>>> @@ -18,6 +18,17 @@
>>> reg = <0x80000000 0x10000000>; /* 256 MB */
>>> };
>>>
>>> + am3358_pinmux: pinmux@44e10800 {
>>> + spi1_pins: pinmux_spi1_pins {
>>> + pinctrl-single,pins = <
>>> + 0x190 0x13 /* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */
>>> + 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
>>> + 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
>>> + 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
>>> + >;
>>> + };
>>> + };
>>> +
>>
>> Change to am33xx_pinmux.
>>
>>> ocp {
>>> uart1: serial@44e09000 {
>>> status = "okay";
>>> @@ -84,3 +95,9 @@
>>> &mmc1 {
>>> vmmc-supply = <&ldo3_reg>;
>>> };
>>> +
>>> +&spi1 {
>>> + status = "okay";
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&spi1_pins>;
>>> +};
>>> diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
>>> index d63fce8..8d5f660 100644
>>> --- a/arch/arm/boot/dts/am335x-evm.dts
>>> +++ b/arch/arm/boot/dts/am335x-evm.dts
>>> @@ -124,3 +124,12 @@
>>> &mmc1 {
>>> vmmc-supply = <&vmmc_reg>;
>>> };
>>> +
>>> +&spi0 {
>>> + status = "okay";
>>> + spi-flash@0 {
>>> + compatible = "spansion,s25fl064k", "m25p80";
>>> + spi-max-frequency = <24000000>;
>>> + reg = <0>;
>>> + };
>>> +};
>>
>> In AM335x-evm, SPI flash available in profile #2 (am335x evm specific profiles).
>> So can you drop this changes as if I understood correctly, am335x-evm.dts will be
>> populated for devices present only on profile #0.
>>
>>> diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
>>> index 26a6af7..063ecea 100644
>>> --- a/arch/arm/boot/dts/am33xx.dtsi
>>> +++ b/arch/arm/boot/dts/am33xx.dtsi
>>> @@ -40,6 +40,15 @@
>>> };
>>> };
>>>
>>> + am3358_pinmux: pinmux@44e10800 {
>>> + compatible = "pinctrl-single";
>>> + reg = <0x44e10800 0x0238>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + pinctrl-single,register-width = <32>;
>>> + pinctrl-single,function-mask = <0x7f>;
>>> + };
>>> +
>>
>> Pin ctrl support already submitted
>> http://git.kernel.org/?p=linux/kernel/git/bcousson/linux-omap-dt.git;a=commitdiff;h=3e0603e905d9ba662e8c1885ecb1d28bc454e448
>>
>> Thanks
>> Avinash
>>
>>> /*
>>> * XXX: Use a flat representation of the AM33XX interconnect.
>>> * The real AM33XX interconnect network is quite complex.Since
>>> @@ -261,6 +270,40 @@
>>> status = "disabled";
>>> };
>>>
>>> + spi0: spi@48030000 {
>>> + compatible = "ti,omap4-mcspi";
>>> + ti,hwmods = "spi0";
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + reg = <0x48030000 0x400>;
>>> + interrupt-parent = <&intc>;
>>> + interrupt = <65>;
>>> + dmas = <&edma 16
>>> + &edma 17
>>> + &edma 18
>>> + &edma 19>;
>>> + dma-names = "tx0", "rx0", "tx1", "rx1";
>>> + ti,spi-num-cs = <2>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi1: spi@481a0000 {
>>> + compatible = "ti,omap4-mcspi";
>>> + ti,hwmods = "spi1";
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + reg = <0x481a0000 0x400>;
>>> + interrupt-parent = <&intc>;
>>> + interrupt = <125>;
>>> + dmas = <&edma 42
>>> + &edma 43
>>> + &edma 44
>>> + &edma 45>;
>>> + dma-names = "tx0", "rx0", "tx1", "rx1";
>>> + ti,spi-num-cs = <2>;
>>> + status = "disabled";
>>> + };
>>> +
>>> wdt2: wdt@44e35000 {
>>> compatible = "ti,omap3-wdt";
>>> ti,hwmods = "wd_timer2";
>>> --
>>> 1.7.9.5
>>>
>>>
>>> _______________________________________________
>>> linux-arm-kernel mailing list
>>> [email protected]
>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>>
>>
>>
>
On 10/31/2012 11:16 AM, Benoit Cousson wrote:
> Hi Avinash,
>
> On 10/30/2012 10:41 AM, Philip, Avinash wrote:
>> On Mon, Oct 29, 2012 at 14:40:02, Philip, Avinash wrote:
>>> On Thu, Oct 18, 2012 at 18:56:55, Porter, Matt wrote:
>>>> Adds AM33XX SPI support for am335x-bone and am335x-evm.
>>
>> Matt,
>>
>> Can you build SPI DT patch with DMA support on top of SPI DT patch
>> I submitted [1]. With the patch [1] SPI can work on PIO mode.
>> So we can have basic SPI support available in 3.8.
>>
>> Benoit,
>> Can you accept the SPI DT patch [1]
>
> Yes, I've just applied it in for_3.8/dts branch
Well, in fact I did not, it does not apply :-(
Can you rebase on top of the for_3.8/dts branch? I've just applied the
RTC patch on top that was OK.
Thanks,
Benoit
>
>> In case if you want I will resubmit a patch with subject line modified.
>
> No, that's fine.
>
> Thanks,
> Benoit
>
>>
>> Current subject line
>> arm/dts: AM33XX: Add SPI device tree data
>>
>> 1. https://patchwork.kernel.org/patch/1470661/
>>
>> Thanks
>> Avinash
>>
>>>>
>>>> Signed-off-by: Matt Porter <[email protected]>
>>>> ---
>>>> arch/arm/boot/dts/am335x-bone.dts | 17 +++++++++++++++
>>>> arch/arm/boot/dts/am335x-evm.dts | 9 ++++++++
>>>> arch/arm/boot/dts/am33xx.dtsi | 43 +++++++++++++++++++++++++++++++++++++
>>>> 3 files changed, 69 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
>>>> index 5510979..23edfd8 100644
>>>> --- a/arch/arm/boot/dts/am335x-bone.dts
>>>> +++ b/arch/arm/boot/dts/am335x-bone.dts
>>>> @@ -18,6 +18,17 @@
>>>> reg = <0x80000000 0x10000000>; /* 256 MB */
>>>> };
>>>>
>>>> + am3358_pinmux: pinmux@44e10800 {
>>>> + spi1_pins: pinmux_spi1_pins {
>>>> + pinctrl-single,pins = <
>>>> + 0x190 0x13 /* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */
>>>> + 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
>>>> + 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
>>>> + 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
>>>> + >;
>>>> + };
>>>> + };
>>>> +
>>>
>>> Change to am33xx_pinmux.
>>>
>>>> ocp {
>>>> uart1: serial@44e09000 {
>>>> status = "okay";
>>>> @@ -84,3 +95,9 @@
>>>> &mmc1 {
>>>> vmmc-supply = <&ldo3_reg>;
>>>> };
>>>> +
>>>> +&spi1 {
>>>> + status = "okay";
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&spi1_pins>;
>>>> +};
>>>> diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
>>>> index d63fce8..8d5f660 100644
>>>> --- a/arch/arm/boot/dts/am335x-evm.dts
>>>> +++ b/arch/arm/boot/dts/am335x-evm.dts
>>>> @@ -124,3 +124,12 @@
>>>> &mmc1 {
>>>> vmmc-supply = <&vmmc_reg>;
>>>> };
>>>> +
>>>> +&spi0 {
>>>> + status = "okay";
>>>> + spi-flash@0 {
>>>> + compatible = "spansion,s25fl064k", "m25p80";
>>>> + spi-max-frequency = <24000000>;
>>>> + reg = <0>;
>>>> + };
>>>> +};
>>>
>>> In AM335x-evm, SPI flash available in profile #2 (am335x evm specific profiles).
>>> So can you drop this changes as if I understood correctly, am335x-evm.dts will be
>>> populated for devices present only on profile #0.
>>>
>>>> diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
>>>> index 26a6af7..063ecea 100644
>>>> --- a/arch/arm/boot/dts/am33xx.dtsi
>>>> +++ b/arch/arm/boot/dts/am33xx.dtsi
>>>> @@ -40,6 +40,15 @@
>>>> };
>>>> };
>>>>
>>>> + am3358_pinmux: pinmux@44e10800 {
>>>> + compatible = "pinctrl-single";
>>>> + reg = <0x44e10800 0x0238>;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + pinctrl-single,register-width = <32>;
>>>> + pinctrl-single,function-mask = <0x7f>;
>>>> + };
>>>> +
>>>
>>> Pin ctrl support already submitted
>>> http://git.kernel.org/?p=linux/kernel/git/bcousson/linux-omap-dt.git;a=commitdiff;h=3e0603e905d9ba662e8c1885ecb1d28bc454e448
>>>
>>> Thanks
>>> Avinash
>>>
>>>> /*
>>>> * XXX: Use a flat representation of the AM33XX interconnect.
>>>> * The real AM33XX interconnect network is quite complex.Since
>>>> @@ -261,6 +270,40 @@
>>>> status = "disabled";
>>>> };
>>>>
>>>> + spi0: spi@48030000 {
>>>> + compatible = "ti,omap4-mcspi";
>>>> + ti,hwmods = "spi0";
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + reg = <0x48030000 0x400>;
>>>> + interrupt-parent = <&intc>;
>>>> + interrupt = <65>;
>>>> + dmas = <&edma 16
>>>> + &edma 17
>>>> + &edma 18
>>>> + &edma 19>;
>>>> + dma-names = "tx0", "rx0", "tx1", "rx1";
>>>> + ti,spi-num-cs = <2>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + spi1: spi@481a0000 {
>>>> + compatible = "ti,omap4-mcspi";
>>>> + ti,hwmods = "spi1";
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + reg = <0x481a0000 0x400>;
>>>> + interrupt-parent = <&intc>;
>>>> + interrupt = <125>;
>>>> + dmas = <&edma 42
>>>> + &edma 43
>>>> + &edma 44
>>>> + &edma 45>;
>>>> + dma-names = "tx0", "rx0", "tx1", "rx1";
>>>> + ti,spi-num-cs = <2>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> wdt2: wdt@44e35000 {
>>>> compatible = "ti,omap3-wdt";
>>>> ti,hwmods = "wd_timer2";
>>>> --
>>>> 1.7.9.5
>>>>
>>>>
>>>> _______________________________________________
>>>> linux-arm-kernel mailing list
>>>> [email protected]
>>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>>>
>>>
>>>
>>
>
On Wed, Oct 31, 2012 at 16:05:13, Cousson, Benoit wrote:
>
> On 10/31/2012 11:16 AM, Benoit Cousson wrote:
> > Hi Avinash,
> >
> > On 10/30/2012 10:41 AM, Philip, Avinash wrote:
> >> On Mon, Oct 29, 2012 at 14:40:02, Philip, Avinash wrote:
> >>> On Thu, Oct 18, 2012 at 18:56:55, Porter, Matt wrote:
> >>>> Adds AM33XX SPI support for am335x-bone and am335x-evm.
> >>
> >> Matt,
> >>
> >> Can you build SPI DT patch with DMA support on top of SPI DT patch
> >> I submitted [1]. With the patch [1] SPI can work on PIO mode.
> >> So we can have basic SPI support available in 3.8.
> >>
> >> Benoit,
> >> Can you accept the SPI DT patch [1]
> >
> > Yes, I've just applied it in for_3.8/dts branch
>
> Well, in fact I did not, it does not apply :-(
>
> Can you rebase on top of the for_3.8/dts branch? I've just applied the
> RTC patch on top that was OK.
Ok.
Thanks
Avinash
>
> Thanks,
> Benoit
>
> >
> >> In case if you want I will resubmit a patch with subject line modified.
> >
> > No, that's fine.
> >
> > Thanks,
> > Benoit
> >
> >>
> >> Current subject line
> >> arm/dts: AM33XX: Add SPI device tree data
> >>
> >> 1. https://patchwork.kernel.org/patch/1470661/
> >>
> >> Thanks
> >> Avinash
> >>
> >>>>
> >>>> Signed-off-by: Matt Porter <[email protected]>
> >>>> ---
> >>>> arch/arm/boot/dts/am335x-bone.dts | 17 +++++++++++++++
> >>>> arch/arm/boot/dts/am335x-evm.dts | 9 ++++++++
> >>>> arch/arm/boot/dts/am33xx.dtsi | 43 +++++++++++++++++++++++++++++++++++++
> >>>> 3 files changed, 69 insertions(+)
> >>>>
> >>>> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> >>>> index 5510979..23edfd8 100644
> >>>> --- a/arch/arm/boot/dts/am335x-bone.dts
> >>>> +++ b/arch/arm/boot/dts/am335x-bone.dts
> >>>> @@ -18,6 +18,17 @@
> >>>> reg = <0x80000000 0x10000000>; /* 256 MB */
> >>>> };
> >>>>
> >>>> + am3358_pinmux: pinmux@44e10800 {
> >>>> + spi1_pins: pinmux_spi1_pins {
> >>>> + pinctrl-single,pins = <
> >>>> + 0x190 0x13 /* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */
> >>>> + 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
> >>>> + 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
> >>>> + 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
> >>>> + >;
> >>>> + };
> >>>> + };
> >>>> +
> >>>
> >>> Change to am33xx_pinmux.
> >>>
> >>>> ocp {
> >>>> uart1: serial@44e09000 {
> >>>> status = "okay";
> >>>> @@ -84,3 +95,9 @@
> >>>> &mmc1 {
> >>>> vmmc-supply = <&ldo3_reg>;
> >>>> };
> >>>> +
> >>>> +&spi1 {
> >>>> + status = "okay";
> >>>> + pinctrl-names = "default";
> >>>> + pinctrl-0 = <&spi1_pins>;
> >>>> +};
> >>>> diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
> >>>> index d63fce8..8d5f660 100644
> >>>> --- a/arch/arm/boot/dts/am335x-evm.dts
> >>>> +++ b/arch/arm/boot/dts/am335x-evm.dts
> >>>> @@ -124,3 +124,12 @@
> >>>> &mmc1 {
> >>>> vmmc-supply = <&vmmc_reg>;
> >>>> };
> >>>> +
> >>>> +&spi0 {
> >>>> + status = "okay";
> >>>> + spi-flash@0 {
> >>>> + compatible = "spansion,s25fl064k", "m25p80";
> >>>> + spi-max-frequency = <24000000>;
> >>>> + reg = <0>;
> >>>> + };
> >>>> +};
> >>>
> >>> In AM335x-evm, SPI flash available in profile #2 (am335x evm specific profiles).
> >>> So can you drop this changes as if I understood correctly, am335x-evm.dts will be
> >>> populated for devices present only on profile #0.
> >>>
> >>>> diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
> >>>> index 26a6af7..063ecea 100644
> >>>> --- a/arch/arm/boot/dts/am33xx.dtsi
> >>>> +++ b/arch/arm/boot/dts/am33xx.dtsi
> >>>> @@ -40,6 +40,15 @@
> >>>> };
> >>>> };
> >>>>
> >>>> + am3358_pinmux: pinmux@44e10800 {
> >>>> + compatible = "pinctrl-single";
> >>>> + reg = <0x44e10800 0x0238>;
> >>>> + #address-cells = <1>;
> >>>> + #size-cells = <0>;
> >>>> + pinctrl-single,register-width = <32>;
> >>>> + pinctrl-single,function-mask = <0x7f>;
> >>>> + };
> >>>> +
> >>>
> >>> Pin ctrl support already submitted
> >>> http://git.kernel.org/?p=linux/kernel/git/bcousson/linux-omap-dt.git;a=commitdiff;h=3e0603e905d9ba662e8c1885ecb1d28bc454e448
> >>>
> >>> Thanks
> >>> Avinash
> >>>
> >>>> /*
> >>>> * XXX: Use a flat representation of the AM33XX interconnect.
> >>>> * The real AM33XX interconnect network is quite complex.Since
> >>>> @@ -261,6 +270,40 @@
> >>>> status = "disabled";
> >>>> };
> >>>>
> >>>> + spi0: spi@48030000 {
> >>>> + compatible = "ti,omap4-mcspi";
> >>>> + ti,hwmods = "spi0";
> >>>> + #address-cells = <1>;
> >>>> + #size-cells = <0>;
> >>>> + reg = <0x48030000 0x400>;
> >>>> + interrupt-parent = <&intc>;
> >>>> + interrupt = <65>;
> >>>> + dmas = <&edma 16
> >>>> + &edma 17
> >>>> + &edma 18
> >>>> + &edma 19>;
> >>>> + dma-names = "tx0", "rx0", "tx1", "rx1";
> >>>> + ti,spi-num-cs = <2>;
> >>>> + status = "disabled";
> >>>> + };
> >>>> +
> >>>> + spi1: spi@481a0000 {
> >>>> + compatible = "ti,omap4-mcspi";
> >>>> + ti,hwmods = "spi1";
> >>>> + #address-cells = <1>;
> >>>> + #size-cells = <0>;
> >>>> + reg = <0x481a0000 0x400>;
> >>>> + interrupt-parent = <&intc>;
> >>>> + interrupt = <125>;
> >>>> + dmas = <&edma 42
> >>>> + &edma 43
> >>>> + &edma 44
> >>>> + &edma 45>;
> >>>> + dma-names = "tx0", "rx0", "tx1", "rx1";
> >>>> + ti,spi-num-cs = <2>;
> >>>> + status = "disabled";
> >>>> + };
> >>>> +
> >>>> wdt2: wdt@44e35000 {
> >>>> compatible = "ti,omap3-wdt";
> >>>> ti,hwmods = "wd_timer2";
> >>>> --
> >>>> 1.7.9.5
> >>>>
> >>>>
> >>>> _______________________________________________
> >>>> linux-arm-kernel mailing list
> >>>> [email protected]
> >>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >>>>
> >>>
> >>>
> >>
> >
>
>
On Thu, Oct 18, 2012 at 18:56:39, Porter, Matt wrote:
...snip...
...snip...
...snip...
>
> This series adds DMA Engine support for AM33xx, which uses
> an EDMA DMAC. The EDMA DMAC has been previously supported by only
> a private API implementation (much like the situation with OMAP
> DMA) found on the DaVinci family of SoCs.
>
> The series applies on top of 3.7-rc1 and the following patches:
>
> - GPMC fails to reserve memory fix:
> http://www.spinics.net/lists/linux-omap/msg79675.html
> - TPS65910 regulator fix:
> https://patchwork.kernel.org/patch/1593651/
> - dmaengine DT support from Vinod's dmaengine_dt branch in
> git://git.infradead.org/users/vkoul/slave-dma.git since
> 027478851791df751176398be02a3b1c5f6aa824
>
> The approach taken is similar to how OMAP DMA is being converted to
> DMA Engine support. With the functional EDMA private API already
> existing in mach-davinci/dma.c, we first move that to an ARM common
> area so it can be shared. Adding DT and runtime PM support to the
> private EDMA API implementation allows it to run on AM33xx. AM33xx
> *only* boots using DT so we leverage Jon's generic DT DMA helpers to
> register EDMA DMAC with the of_dma framework and then add support
> for calling the dma_request_slave_channel() API to both the mmc
> and spi drivers.
>
> With this series both BeagleBone and the AM335x EVM have working
> MMC and SPI support.
>
> This is tested on BeagleBone with a SPI framebuffer driver and MMC
> rootfs. A trivial gpio DMA event misc driver was used to test the
> crossbar DMA event support. It is also tested on the AM335x EVM
> with the onboard SPI flash and MMC rootfs. The branch at
> https://github.com/ohporter/linux/tree/edma-dmaengine-v3 has the
> complete series, dependencies, and some test drivers/defconfigs.
>
> Regression testing was done on AM180x-EVM (which also makes use
> of the EDMA dmaengine driver and the EDMA private API) using SD,
> SPI flash, and the onboard audio supported by the ASoC Davinci
> driver.
Since you have tested MMC, and probably will be adding Audio support
for AM335x as well, I believe you will also be adding Pin-mux support
for both the modules.
Can you share your plan to release the next version?
I have few patches pending for AM335x Audio (DT related).
Thanks in advance
Regards
Gururaja
>
> After this series, the plan is to convert the last in-tree user
> of the private EDMA API (davinci-pcm/mcasp) and then eliminate
> the private EDMA API by folding its functionality into
> drivers/dma/edma.c.
>
> Matt Porter (16):
> dmaengine: edma: fix slave config dependency on direction
> ARM: davinci: move private EDMA API to arm/common
> ARM: edma: remove unused transfer controller handlers
> ARM: edma: add DT and runtime PM support for AM33XX
> ARM: edma: add AM33XX crossbar event support
> dmaengine: edma: enable build for AM33XX
> dmaengine: edma: Add TI EDMA device tree binding
> ARM: dts: add AM33XX EDMA support
> dmaengine: add dma_request_slave_channel_compat()
> mmc: omap_hsmmc: convert to dma_request_slave_channel_compat()
> mmc: omap_hsmmc: limit max_segs with the EDMA DMAC
> mmc: omap_hsmmc: add generic DMA request support to the DT binding
> ARM: dts: add AM33XX MMC support
> spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
> spi: omap2-mcspi: add generic DMA request support to the DT binding
> ARM: dts: add AM33XX SPI support
>
On Sun, Oct 28, 2012 at 01:47:09PM +0530, Sekhar Nori wrote:
> On 10/18/2012 6:56 PM, Matt Porter wrote:
> > Move mach-davinci/dma.c to common/edma.c so it can be used
> > by OMAP (specifically AM33xx) as well. This just moves the
> > private EDMA API but does not support OMAP.
> >
> > Signed-off-by: Matt Porter <[email protected]>
> > ---
>
> > diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
> > index 4c48a36..f45d591 100644
> > --- a/arch/arm/mach-davinci/devices.c
> > +++ b/arch/arm/mach-davinci/devices.c
> > @@ -19,9 +19,10 @@
> > #include <mach/irqs.h>
> > #include <mach/cputype.h>
> > #include <mach/mux.h>
> > -#include <mach/edma.h>
> > #include <linux/platform_data/mmc-davinci.h>
> > #include <mach/time.h>
> > +#include <linux/platform_data/edma.h>
>
> Can you please introduce a patch to clean this mixture of linux/ and
> mach/ includes?
Sure.
>
> > +
> >
> > #include "davinci.h"
> > #include "clock.h"
> > @@ -141,10 +142,10 @@ static struct resource mmcsd0_resources[] = {
> > },
> > /* DMA channels: RX, then TX */
> > {
> > - .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
> > + .start = EDMA_CTLR_CHAN(0, 26),
>
> Instead of just replacing the event #defines with plain numbers, can you
> introduce a mach-davinci local edma.h which can then be included in the
> davinci platform files which refer to edma channel numbers?
Yes.
> > diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> > index 7cd56ed..153fab8 100644
> > --- a/arch/arm/plat-omap/Kconfig
> > +++ b/arch/arm/plat-omap/Kconfig
> > @@ -28,6 +28,7 @@ config ARCH_OMAP2PLUS
> > select OMAP_DM_TIMER
> > select PROC_DEVICETREE if PROC_FS
> > select SPARSE_IRQ
> > + select TI_PRIV_EDMA
>
> This hunk does not seem to belong to subject of this patch.
Yep, stray hunk..will move to the am335x enablement.
> > select USE_OF
> > help
> > "Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
>
> > diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
> > new file mode 100644
> > index 0000000..7396f0b3
> > --- /dev/null
> > +++ b/include/linux/platform_data/edma.h
> > @@ -0,0 +1,198 @@
> > +/*
> > + * TI DAVINCI dma definitions
> > + *
> > + * Copyright (C) 2006-2009 Texas Instruments.
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms of the GNU General Public License as published by the
> > + * Free Software Foundation; either version 2 of the License, or (at your
> > + * option) any later version.
> > + *
> > + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
> > + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
> > + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
> > + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
> > + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
> > + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
> > + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> > + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
> > + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>
> > + * You should have received a copy of the GNU General Public License along
> > + * with this program; if not, write to the Free Software Foundation, Inc.,
> > + * 675 Mass Ave, Cambridge, MA 02139, USA.
>
> This part can be dropped, I suppose ;-)
Ok :)
-Matt