Hello,
This patch adds pinctrl configs for at91 Timer Conter blocks.
These pin configs will be referenced by "atmel,tcb-pwm" devices to
setup pins as PWM output.
Best Regards,
Boris
Signed-off-by: Boris BREZILLON <[email protected]>
---
arch/arm/boot/dts/at91rm9200.dtsi | 76 ++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9260.dtsi | 76 ++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9263.dtsi | 38 ++++++++++++++++++
arch/arm/boot/dts/at91sam9g45.dtsi | 76 ++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9n12.dtsi | 76 ++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9x5.dtsi | 76 ++++++++++++++++++++++++++++++++++++
6 files changed, 418 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 5d3ed5a..a90ec44 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -391,6 +391,82 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <0 13 0x2 0x0>; /* PA13 periph B */
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <0 14 0x2 0x0>; /* PA14 periph B */
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <0 15 0x2 0x0>; /* PA15 periph B */
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <0 17 0x2 0x0>; /* PA17 periph B */
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <0 19 0x2 0x0>; /* PA19 periph B */
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <0 21 0x2 0x0>; /* PA21 periph B */
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <0 18 0x2 0x0>; /* PA18 periph B */
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <0 20 0x2 0x0>; /* PA20 periph B */
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <0 22 0x2 0x0>; /* PA22 periph B */
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <0 27 0x2 0x0>; /* PA27 periph B */
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <0 28 0x2 0x0>; /* PA28 periph B */
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <0 29 0x2 0x0>; /* PA29 periph B */
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <1 6 0x2 0x0>; /* PB6 periph B */
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <1 8 0x2 0x0>; /* PB8 periph B */
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <1 10 0x2 0x0>; /* PB10 periph B */
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <1 7 0x2 0x0>; /* PB7 periph B */
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <1 9 0x2 0x0>; /* PB9 periph B */
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <1 11 0x2 0x0>; /* PB11 periph B */
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 70b5ccb..b2665b1 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -340,6 +340,82 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <0 25 0x1 0x0>; /* PA25 periph A */
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <1 6 0x2 0x0>; /* PB6 periph B */
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <1 7 0x2 0x0>; /* PB7 periph B */
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <0 26 0x1 0x0>; /* PA26 periph A */
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <0 27 0x1 0x0>; /* PA27 periph A */
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <0 28 0x1 0x0>; /* PA28 periph A */
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <2 9 0x2 0x0>; /* PC9 periph B */
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <2 7 0x1 0x0>; /* PC7 periph A */
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <2 6 0x1 0x0>; /* PC6 periph A */
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <1 16 0x2 0x0>; /* PB16 periph B */
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <1 17 0x2 0x0>; /* PB17 periph B */
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <2 22 0x2 0x0>; /* PC22 periph B */
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <1 0 0x2 0x0>; /* PB0 periph B */
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <1 2 0x2 0x0>; /* PB2 periph B */
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <1 3 0x2 0x0>; /* PB3 periph B */
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <1 1 0x2 0x0>; /* PB1 periph B */
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <1 18 0x2 0x0>; /* PB18 periph B */
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <1 19 0x2 0x0>; /* PB19 periph B */
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 94b58ab..82d2609 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -321,6 +321,44 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <1 28 0x2 0x0>; /* PB28 periph B */
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <2 28 0x2 0x0>; /* PC28 periph B */
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <0 15 0x1 0x0>; /* PA15 periph A */
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <4 18 0x2 0x0>; /* PE18 periph B */
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <4 8 0x2 0x0>; /* PE8 periph B */
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <1 17 0x2 0x0>; /* PB17 periph B */
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <4 19 0x2 0x0>; /* PE19 periph B */
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <4 9 0x2 0x0>; /* PE9 periph B */
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <1 18 0x2 0x0>; /* PB18 periph B */
+ };
+ };
+
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index bf18a73..6ae0089 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -341,6 +341,82 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <3 23 0x1 0x0>; /* PD23 periph A */
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <3 29 0x1 0x0>; /* PD29 periph A */
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <2 10 0x2 0x0>; /* PC10 periph B */
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <3 20 0x1 0x0>; /* PD20 periph A */
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <3 21 0x1 0x0>; /* PD21 periph A */
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <3 22 0x1 0x0>; /* PD22 periph A */
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <3 30 0x1 0x0>; /* PD30 periph A */
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <3 31 0x1 0x0>; /* PD31 periph A */
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <0 26 0x2 0x0>; /* PA26 periph B */
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <0 0 0x2 0x0>; /* PA0 periph B */
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <0 3 0x2 0x0>; /* PA3 periph B */
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <3 9 0x2 0x0>; /* PD9 periph B */
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <0 1 0x2 0x0>; /* PA1 periph B */
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <0 4 0x2 0x0>; /* PA4 periph B */
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <3 7 0x2 0x0>; /* PD7 periph B */
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <0 2 0x2 0x0>; /* PA2 periph B */
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <0 5 0x2 0x0>; /* PA5 periph B */
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <3 8 0x2 0x0>; /* PD8 periph B */
+ };
+ };
+
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 3de8e6d..c3ba293 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -282,6 +282,82 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <0 24 0x1 0x0>; /* PA24 periph A */
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <0 25 0x1 0x0>; /* PA25 periph A */
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <0 26 0x1 0x0>; /* PA26 periph A */
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <0 21 0x1 0x0>; /* PA21 periph A */
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <0 22 0x1 0x0>; /* PA22 periph A */
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <0 23 0x1 0x0>; /* PA23 periph A */
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <0 27 0x1 0x0>; /* PA27 periph A */
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <0 28 0x1 0x0>; /* PA28 periph A */
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <0 29 0x1 0x0>; /* PA29 periph A */
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <2 4 0x3 0x0>; /* PC4 periph C */
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <2 7 0x3 0x0>; /* PC7 periph C */
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <2 14 0x3 0x0>; /* PC14 periph C */
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <2 2 0x3 0x0>; /* PC2 periph C */
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <2 5 0x3 0x0>; /* PC5 periph C */
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <2 12 0x3 0x0>; /* PC12 periph C */
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <2 3 0x3 0x0>; /* PC3 periph C */
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <2 6 0x3 0x0>; /* PC6 periph C */
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <2 13 0x3 0x0>; /* PC13 periph C */
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 1145ac3..bee58c6 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -411,6 +411,82 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <0 24 0x1 0x0>; /* PA24 periph A */
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <0 25 0x1 0x0>; /* PA25 periph A */
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <0 26 0x1 0x0>; /* PA26 periph A */
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <0 21 0x1 0x0>; /* PA21 periph A */
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <0 22 0x1 0x0>; /* PA22 periph A */
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <0 23 0x1 0x0>; /* PA23 periph A */
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <0 27 0x1 0x0>; /* PA27 periph A */
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <0 28 0x1 0x0>; /* PA28 periph A */
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <0 29 0x1 0x0>; /* PA29 periph A */
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <2 4 0x3 0x0>; /* PC4 periph C */
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <2 7 0x3 0x0>; /* PC7 periph C */
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <2 14 0x3 0x0>; /* PC14 periph C */
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <2 2 0x3 0x0>; /* PC2 periph C */
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <2 5 0x3 0x0>; /* PC5 periph C */
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <2 12 0x3 0x0>; /* PC12 periph C */
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <2 3 0x3 0x0>; /* PC3 periph C */
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <2 6 0x3 0x0>; /* PC6 periph C */
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <2 13 0x3 0x0>; /* PC13 periph C */
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
--
1.7.9.5
On 12:05 Fri 24 May , Boris BREZILLON wrote:
> Hello,
>
> This patch adds pinctrl configs for at91 Timer Conter blocks.
> These pin configs will be referenced by "atmel,tcb-pwm" devices to
> setup pins as PWM output.
you need to rebase on
a cleanup I did preset on our git tag at91-3.11-cleanup
As we announce Mandaotory for 3.11
as I introduce Macro fro DT
Best Regards,
J.
On 24/05/2013 16:05, Jean-Christophe PLAGNIOL-VILLARD :
> On 12:05 Fri 24 May , Boris BREZILLON wrote:
>> Hello,
>>
>> This patch adds pinctrl configs for at91 Timer Conter blocks.
>> These pin configs will be referenced by "atmel,tcb-pwm" devices to
>> setup pins as PWM output.
>
> you need to rebase on
>
> a cleanup I did preset on our git tag at91-3.11-cleanup
>
> As we announce Mandaotory for 3.11
>
> as I introduce Macro fro DT
Boris, Hold on.
I may have the solution for you. Give me some time and we may have the
automatic generation for updating your patch.
Bye,
--
Nicolas Ferre
On 24/05/2013 16:12, Nicolas Ferre wrote:
> On 24/05/2013 16:05, Jean-Christophe PLAGNIOL-VILLARD :
>> On 12:05 Fri 24 May , Boris BREZILLON wrote:
>>> Hello,
>>>
>>> This patch adds pinctrl configs for at91 Timer Conter blocks.
>>> These pin configs will be referenced by "atmel,tcb-pwm" devices to
>>> setup pins as PWM output.
>>
>> you need to rebase on
>>
>> a cleanup I did preset on our git tag at91-3.11-cleanup
>>
>> As we announce Mandaotory for 3.11
>>
>> as I introduce Macro fro DT
Ok, I'll base my future dt patches (kizbox.dts) on this tag.
>
> Boris, Hold on.
>
> I may have the solution for you. Give me some time and we may have the
> automatic generation for updating your patch.
Ok, thanks.
>
> Bye,
From: Boris BREZILLON <[email protected]>
This patch adds pinctrl configurations for at91 Timer Counter blocks.
These pin definitions can be referenced by "atmel,tcb-pwm" devices to
setup pins as PWM output for instance.
Signed-off-by: Boris BREZILLON <[email protected]>
[[email protected]: switch to pinctrl pre-processor macros]
Signed-off-by: Nicolas Ferre <[email protected]>
---
Hi Boris,
Here is your patch modified with pinctrl macros used.
I plan to stack it on top of our at91-3.11-dt branch now.
Thanks and best regards,
Nicolas Ferre
arch/arm/boot/dts/at91rm9200.dtsi | 76 ++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9260.dtsi | 76 ++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9263.dtsi | 38 +++++++++++++++++++
arch/arm/boot/dts/at91sam9g45.dtsi | 76 ++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9n12.dtsi | 76 ++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9x5.dtsi | 76 ++++++++++++++++++++++++++++++++++++++
6 files changed, 418 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 4aad0d9..b91cf78 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -398,6 +398,82 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index de571d9..899a7cf 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -355,6 +355,82 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index d9cf51a..ff63811 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -324,6 +324,44 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index f0091af..faec17d 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -344,6 +344,82 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index d12da33..3166e1d 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -285,6 +285,82 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 5635064..e77106e 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -414,6 +414,82 @@
};
};
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
--
1.8.0