The old timeout value was based on the assumption that the minimum values are
used for the open and sample delay and no averaging is done. In fact the ADC
and touchscreen driver both use an open delay of 152 cycles and averaging over
16 samples. This patch adjusts the timeout value accordingly
Signed-off-by: Matthias Kaehlcke <[email protected]>
---
include/linux/mfd/ti_am335x_tscadc.h | 19 ++++++++++++-------
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h
index db1791b..9e6a775 100644
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -126,13 +126,18 @@
#define TOTAL_CHANNELS 8
/*
-* ADC runs at 3MHz, and it takes
-* 15 cycles to latch one data output.
-* Hence the idle time for ADC to
-* process one sample data would be
-* around 5 micro seconds.
-*/
-#define IDLE_TIMEOUT 5 /* microsec */
+ * time in us for processing a single channel, calculated as follows:
+ *
+ * num cycles = open delay + (sample delay + conv time) * averaging
+ *
+ * num cycles: 152 + (1 + 13) * 16 = 376
+ *
+ * clock frequency: 26MHz / 8 = 3.25MHz
+ * clock period: 1 / 3.25MHz = 308ns
+ *
+ * processing time: 376 * 308ns = 116us
+ */
+#define IDLE_TIMEOUT 116 /* microsec */
#define TSCADC_CELLS 2
--
1.8.4.rc3
On Tue, 10 Sep 2013, Matthias Kaehlcke wrote:
> The old timeout value was based on the assumption that the minimum values are
> used for the open and sample delay and no averaging is done. In fact the ADC
> and touchscreen driver both use an open delay of 152 cycles and averaging over
> 16 samples. This patch adjusts the timeout value accordingly
>
> Signed-off-by: Matthias Kaehlcke <[email protected]>
> ---
> include/linux/mfd/ti_am335x_tscadc.h | 19 ++++++++++++-------
> 1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h
> index db1791b..9e6a775 100644
> --- a/include/linux/mfd/ti_am335x_tscadc.h
> +++ b/include/linux/mfd/ti_am335x_tscadc.h
> @@ -126,13 +126,18 @@
> #define TOTAL_CHANNELS 8
>
> /*
> -* ADC runs at 3MHz, and it takes
> -* 15 cycles to latch one data output.
> -* Hence the idle time for ADC to
> -* process one sample data would be
> -* around 5 micro seconds.
> -*/
> -#define IDLE_TIMEOUT 5 /* microsec */
> + * time in us for processing a single channel, calculated as follows:
> + *
> + * num cycles = open delay + (sample delay + conv time) * averaging
> + *
> + * num cycles: 152 + (1 + 13) * 16 = 376
> + *
> + * clock frequency: 26MHz / 8 = 3.25MHz
> + * clock period: 1 / 3.25MHz = 308ns
> + *
> + * processing time: 376 * 308ns = 116us
> + */
> +#define IDLE_TIMEOUT 116 /* microsec */
Nice, clear explanation. I like it.
Patch applied, thanks.
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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