From: Tirumalesh Chalamarla <[email protected]>
The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.
Signed-off-by: Tirumalesh Chalamarla <[email protected]>
Acked-by: Marc Zyngier <[email protected]>
---
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index d8c0bdc..9cb7cf9 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -376,10 +376,19 @@
gic0: interrupt-controller@8010,00000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
interrupt-controller;
reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
<0x8010 0x80000000 0x0 0x600000>; /* GICR */
interrupts = <1 9 0xf04>;
+
+ its: gic-its@8010,00020000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = <0x8010 0x20000 0x0 0x200000>;
+ };
};
uaa0: serial@87e0,24000000 {
--
2.1.0
Hi Catalin,
is it possible to pull this for 4.2?
Thanks,
Tirumalesh.
> On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <[email protected]> wrote:
>
> From: Tirumalesh Chalamarla <[email protected]>
>
> The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> Thunder SoCs by adding an entry to DT.
>
> Signed-off-by: Tirumalesh Chalamarla <[email protected]>
> Acked-by: Marc Zyngier <[email protected]>
> ---
> arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> index d8c0bdc..9cb7cf9 100644
> --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> @@ -376,10 +376,19 @@
> gic0: interrupt-controller@8010,00000000 {
> compatible = "arm,gic-v3";
> #interrupt-cells = <3>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> interrupt-controller;
> reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
> <0x8010 0x80000000 0x0 0x600000>; /* GICR */
> interrupts = <1 9 0xf04>;
> +
> + its: gic-its@8010,00020000 {
> + compatible = "arm,gic-v3-its";
> + msi-controller;
> + reg = <0x8010 0x20000 0x0 0x200000>;
> + };
> };
>
> uaa0: serial@87e0,24000000 {
> --
> 2.1.0
>
On Thu, Jul 02, 2015 at 08:26:02PM +0000, Chalamarla, Tirumalesh wrote:
> > On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <[email protected]> wrote:
> >
> > From: Tirumalesh Chalamarla <[email protected]>
> >
> > The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> > Thunder SoCs by adding an entry to DT.
> >
> > Signed-off-by: Tirumalesh Chalamarla <[email protected]>
> > Acked-by: Marc Zyngier <[email protected]>
> > ---
> > arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > index d8c0bdc..9cb7cf9 100644
> > --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > @@ -376,10 +376,19 @@
> > gic0: interrupt-controller@8010,00000000 {
> > compatible = "arm,gic-v3";
> > #interrupt-cells = <3>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > interrupt-controller;
> > reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
> > <0x8010 0x80000000 0x0 0x600000>; /* GICR */
> > interrupts = <1 9 0xf04>;
> > +
> > + its: gic-its@8010,00020000 {
> > + compatible = "arm,gic-v3-its";
> > + msi-controller;
> > + reg = <0x8010 0x20000 0x0 0x200000>;
> > + };
> > };
> >
> > uaa0: serial@87e0,24000000 {
>
> is it possible to pull this for 4.2?
The dts files go in via the arm-soc tree (cc'ing [email protected]).
--
Catalin
Catalin Marinas <[email protected]> writes:
> On Thu, Jul 02, 2015 at 08:26:02PM +0000, Chalamarla, Tirumalesh wrote:
>> > On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <[email protected]> wrote:
>> >
>> > From: Tirumalesh Chalamarla <[email protected]>
>> >
>> > The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
>> > Thunder SoCs by adding an entry to DT.
>> >
>> > Signed-off-by: Tirumalesh Chalamarla <[email protected]>
>> > Acked-by: Marc Zyngier <[email protected]>
>> > ---
>> > arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
>> > 1 file changed, 9 insertions(+)
>> >
>> > diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > index d8c0bdc..9cb7cf9 100644
>> > --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > @@ -376,10 +376,19 @@
>> > gic0: interrupt-controller@8010,00000000 {
>> > compatible = "arm,gic-v3";
>> > #interrupt-cells = <3>;
>> > + #address-cells = <2>;
>> > + #size-cells = <2>;
>> > + ranges;
>> > interrupt-controller;
>> > reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
>> > <0x8010 0x80000000 0x0 0x600000>; /* GICR */
>> > interrupts = <1 9 0xf04>;
>> > +
>> > + its: gic-its@8010,00020000 {
>> > + compatible = "arm,gic-v3-its";
>> > + msi-controller;
>> > + reg = <0x8010 0x20000 0x0 0x200000>;
>> > + };
>> > };
>> >
>> > uaa0: serial@87e0,24000000 {
>>
>> is it possible to pull this for 4.2?
>
> The dts files go in via the arm-soc tree (cc'ing [email protected]).
Picked this up for v4.2-rc,
Kevin