Hi all,
This patch set adds a new property "spi-word-wait-ns" to the spi-bus
binding that allows SPI slave devices to set a wait time between the
transmission of words. Modifies the spi_device struct and slave device
probing to read and store the new property.
Also modifies the sun4i SPI master driver to make use of the new property.
This specific SPI controller needs 3 clock cycles to set up the delay,
which makes the minimum non-zero wait time on this hardware 4 clock cycles.
Changes from v1:
* renamed the property for more clarity
* wait time is set in nanoseconds instead of number of clock cycles
* transparently handle the 3 setup clock cycles
Changes from v2:
* fixed typo in comment
* moved parameter to spi-bus binding, dropping the vendor prefix
* changed commit summary and description to reflect the changes
Changes from v3:
* remove reference to "hardware" in comments and description, as the wait
time could also be implemented in software
* read and set property value in spi core
Changes from v4:
* log with dev_dbg instead of dev_info
* split patch into two separate ones for SPI-core and sun4i parts
Marcus Weseloh (2):
spi: dts: Add new device property to specifcy a wait time between word
transmissions
spi: sun4i: Add support for wait time between word transmissions
Documentation/devicetree/bindings/spi/spi-bus.txt | 2 ++
drivers/spi/spi-sun4i.c | 22 ++++++++++++++++++++++
drivers/spi/spi.c | 2 ++
include/linux/spi/spi.h | 2 ++
4 files changed, 28 insertions(+)
--
1.9.1
Adds a new property "spi-word-wait-ns" to the spi-bus binding that allows
SPI slave devices to set a wait time between the transmission of words.
Signed-off-by: Marcus Weseloh <[email protected]>
---
Documentation/devicetree/bindings/spi/spi-bus.txt | 2 ++
drivers/spi/spi.c | 2 ++
include/linux/spi/spi.h | 2 ++
3 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt
index bbaa857..434d321 100644
--- a/Documentation/devicetree/bindings/spi/spi-bus.txt
+++ b/Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -61,6 +61,8 @@ contain the following properties.
used for MOSI. Defaults to 1 if not present.
- spi-rx-bus-width - (optional) The bus width(number of data wires) that
used for MISO. Defaults to 1 if not present.
+- spi-word-wait-ns - (optional) Delay between transmission of words
+ in nanoseconds
Some SPI controllers and devices support Dual and Quad SPI transfer mode.
It allows data in the SPI system to be transferred in 2 wires(DUAL) or 4 wires(QUAD).
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 2b0a8ec..186373b 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1467,6 +1467,8 @@ of_register_spi_device(struct spi_master *master, struct device_node *nc)
if (of_find_property(nc, "spi-lsb-first", NULL))
spi->mode |= SPI_LSB_FIRST;
+ of_property_read_u32(nc, "spi-word-wait-ns", &spi->word_wait_ns);
+
/* Device DUAL/QUAD mode */
if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
switch (value) {
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index cce80e6..ea3037f 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -118,6 +118,7 @@ void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
* for driver coldplugging, and in uevents used for hotplugging
* @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when
* when not using a GPIO line)
+ * @word_wait_ns: A wait time between word transfers in nanoseconds
*
* @statistics: statistics for the spi_device
*
@@ -158,6 +159,7 @@ struct spi_device {
void *controller_data;
char modalias[SPI_NAME_SIZE];
int cs_gpio; /* chip select gpio */
+ u32 word_wait_ns; /* wait time between words */
/* the statistics */
struct spi_statistics statistics;
--
1.9.1
Modifies the sun4i SPI master driver to make use of the
"spi-word-wait-ns" property. This specific SPI controller needs 3 clock
cycles to set up the delay, which makes the minimum non-zero wait time
on this hardware 4 clock cycles.
Signed-off-by: Marcus Weseloh <[email protected]>
---
drivers/spi/spi-sun4i.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c
index f60a6d6..3b4f5f4 100644
--- a/drivers/spi/spi-sun4i.c
+++ b/drivers/spi/spi-sun4i.c
@@ -19,6 +19,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
+#include <linux/of.h>
#include <linux/spi/spi.h>
@@ -173,6 +174,8 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
unsigned int tx_len = 0;
int ret = 0;
u32 reg;
+ int wait_clk = 0;
+ int clk_ns = 0;
/* We don't support transfer larger than the FIFO */
if (tfr->len > SUN4I_FIFO_DEPTH)
@@ -261,6 +264,25 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
sun4i_spi_write(sspi, SUN4I_CLK_CTL_REG, reg);
+ /*
+ * Setup wait time between words.
+ *
+ * Wait time is set in SPI_CLK cycles. The SPI hardware needs 3
+ * additional cycles to setup the wait counter, so the minimum delay
+ * time is 4 cycles.
+ */
+ if (spi->word_wait_ns) {
+ clk_ns = DIV_ROUND_UP(1000000000, tfr->speed_hz);
+ wait_clk = DIV_ROUND_UP(spi->word_wait_ns, clk_ns) - 3;
+ if (wait_clk < 1) {
+ wait_clk = 1;
+ dev_dbg(&spi->dev,
+ "using minimum of 4 word wait cycles (%uns)",
+ 4 * clk_ns);
+ }
+ }
+ sun4i_spi_write(sspi, SUN4I_WAIT_REG, (u16)wait_clk);
+
/* Setup the transfer now... */
if (sspi->tx_buf)
tx_len = tfr->len;
--
1.9.1
On Thu, Dec 17, 2015 at 12:40:26PM +0100, Marcus Weseloh wrote:
> Adds a new property "spi-word-wait-ns" to the spi-bus binding that allows
> SPI slave devices to set a wait time between the transmission of words.
>
> Signed-off-by: Marcus Weseloh <[email protected]>
Reviewed-by: Maxime Ripard <[email protected]>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
Hi,
On Thu, Dec 17, 2015 at 12:40:27PM +0100, Marcus Weseloh wrote:
> Modifies the sun4i SPI master driver to make use of the
> "spi-word-wait-ns" property. This specific SPI controller needs 3 clock
> cycles to set up the delay, which makes the minimum non-zero wait time
> on this hardware 4 clock cycles.
>
> Signed-off-by: Marcus Weseloh <[email protected]>
> ---
> drivers/spi/spi-sun4i.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c
> index f60a6d6..3b4f5f4 100644
> --- a/drivers/spi/spi-sun4i.c
> +++ b/drivers/spi/spi-sun4i.c
> @@ -19,6 +19,7 @@
> #include <linux/module.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> +#include <linux/of.h>
>
> #include <linux/spi/spi.h>
>
> @@ -173,6 +174,8 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
> unsigned int tx_len = 0;
> int ret = 0;
> u32 reg;
> + int wait_clk = 0;
> + int clk_ns = 0;
>
> /* We don't support transfer larger than the FIFO */
> if (tfr->len > SUN4I_FIFO_DEPTH)
> @@ -261,6 +264,25 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
>
> sun4i_spi_write(sspi, SUN4I_CLK_CTL_REG, reg);
>
> + /*
> + * Setup wait time between words.
> + *
> + * Wait time is set in SPI_CLK cycles. The SPI hardware needs 3
> + * additional cycles to setup the wait counter, so the minimum delay
> + * time is 4 cycles.
> + */
> + if (spi->word_wait_ns) {
> + clk_ns = DIV_ROUND_UP(1000000000, tfr->speed_hz);
You should use the actual rate of the clock returned by clk_get_rate
(or probably just use mclk_rate).
The clock driver might round the frequency to something else than what
was set in clk_set_rate, which would make your calculation here a bit
off.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
On Thu, Dec 17, 2015 at 12:40:26PM +0100, Marcus Weseloh wrote:
> Adds a new property "spi-word-wait-ns" to the spi-bus binding that allows
> SPI slave devices to set a wait time between the transmission of words.
>
> Signed-off-by: Marcus Weseloh <[email protected]>
> ---
> Documentation/devicetree/bindings/spi/spi-bus.txt | 2 ++
> drivers/spi/spi.c | 2 ++
> include/linux/spi/spi.h | 2 ++
> 3 files changed, 6 insertions(+)
Acked-by: Rob Herring <[email protected]>
Hi,
2015-12-18 12:16 GMT+01:00 Maxime Ripard <[email protected]>:
>> sun4i_spi_write(sspi, SUN4I_CLK_CTL_REG, reg);
>>
>> + /*
>> + * Setup wait time between words.
>> + *
>> + * Wait time is set in SPI_CLK cycles. The SPI hardware needs 3
>> + * additional cycles to setup the wait counter, so the minimum delay
>> + * time is 4 cycles.
>> + */
>> + if (spi->word_wait_ns) {
>> + clk_ns = DIV_ROUND_UP(1000000000, tfr->speed_hz);
>
> You should use the actual rate of the clock returned by clk_get_rate
> (or probably just use mclk_rate).
>
> The clock driver might round the frequency to something else than what
> was set in clk_set_rate, which would make your calculation here a bit
> off.
Yes, good point! And as the wait clock counter is based on the actual
SPI_CLK and not the mod clock, I need to calculate the exact clock
myself before handling the wait clock setting. Will amend the patch
and send a new version.
While looking into this, I also noticed a problem with a previous
patch of mine, which changed the spi-sun[46]i to use
transfer->speed_hz instead of the spi->max_speed_hz: I also changed
the mclk_rate calculation to be based on tfr->speed_hz, which should
have stayed with spi->max_speed_hz. In the current state, the clock
calculations only ever increase mclk_rate, wich leads to very
different clocks being set depending on which clock was used on the
previous transfer. Will send a fix for that as well in a separate
patch.
Cheers,
Marcus