For 32bit systems whose bootloader doesn't set the extended 36-bit
addressing register for flash devices above the 4GB boundary
we can set up in the driver.
This patch checks the number of address-cells in the dts file
for the fsl-ifc flash controller. If #address-cells is 2 then
it's a 36-bit address mapping, so set the extended address register
in the ccsr for the upper 0xf address, as specified in the dts file.
The code only sets the extended addressing register if the
dts defines 36-bit addressing for the flash devices AND
the register was not set by the boot loader.
If the bootloader has set the extended addressing register
the code does not update the register.
Cc: [email protected]
Signed-off-by: David Singleton <[email protected]>
---
drivers/memory/fsl_ifc.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c
index 1b182b1..a73b050 100644
--- a/drivers/memory/fsl_ifc.c
+++ b/drivers/memory/fsl_ifc.c
@@ -78,6 +78,31 @@ EXPORT_SYMBOL(fsl_ifc_find);
static int fsl_ifc_ctrl_init(struct fsl_ifc_ctrl *ctrl)
{
struct fsl_ifc_global __iomem *ifc = ctrl->gregs;
+ np = of_find_compatible_node(NULL, NULL, "fsl,ifc");
+ if (np) {
+ const u32 *prop;
+
+ prop = of_get_property(np, "#address-cells", NULL);
+ if (prop) {
+ u32 cells;
+ /*
+ * #address-cells 2 means 36-bit addresses are used
+ * and the if cspr_ext register is zero, the
+ * bootloader didn't set it, we'll set it manually
+ */
+ cells = of_n_addr_cells(np);
+ if ((cells == 2) && !(ifc_in32(&ifc->cspr_cs[0].cspr_ext))) {
+ prop = of_get_property(np, "reg", NULL);
+ if (prop) {
+ u32 extaddr;
+
+ extaddr = *prop; /* get the top nibble for 36-bit */
+ pr_info("fsl-ifc extended 36-bit addressing\n");
+ ifc_out32(extaddr, &ifc->cspr_cs[0].cspr_ext);
+ }
+ }
+ }
+ }
/*
* Clear all the common status and event registers
--
2.9.3