2016-10-13 08:41:02

by Imre Palik

Subject: [RFC PATCH] perf: honouring the cpuid for number of fixed counters in hypervisors

From: Imre Palik <[email protected]>

perf doesn't seem to honour the number of fixed counters specified by cpuid
leaf 0xa. It always assume that Intel CPUs have at least 3 fixed counters.

So if some of the fixed counters are masked out by the hypervisor, it still
tries to check/set them.

This patch makes perf behave nicer when the kernel is running under a
hypervisor that doesn't expose all the counters.

This patch contains some ideas from Matt Wilson.

Signed-off-by: Imre Palik <[email protected]>
Cc: Matt Wilson <[email protected]>
---
arch/x86/events/intel/core.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index a3a9eb8..12ca3f9 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3607,10 +3607,18 @@ __init int intel_pmu_init(void)

/*
* Quirk: v2 perfmon does not report fixed-purpose events, so
- * assume at least 3 events:
+ * assume at least 3 events, when not running in a hypervisor:
*/
- if (version > 1)
- x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3);
+ if (version > 1) {
+ unsigned int ecx = cpuid_ecx(1);
+
+ if (ecx >> 31)
+ x86_pmu.num_counters_fixed =
+ edx.split.num_counters_fixed;
+ else
+ x86_pmu.num_counters_fixed =
+ max((int)edx.split.num_counters_fixed, 3);
+ }

if (boot_cpu_has(X86_FEATURE_PDCM)) {
u64 capabilities;
--
2.10.1

2016-10-16 13:51:48

by Peter Zijlstra

Subject: Re: [RFC PATCH] perf: honouring the cpuid for number of fixed counters in hypervisors

On Thu, Oct 13, 2016 at 01:28:09AM -0700, Imre Palik wrote:
> + if (version > 1) {
> + unsigned int ecx = cpuid_ecx(1);
> +
> + if (ecx >> 31)

What is this magic, undocumented gunk doing? Is that supposed to be
static_cpu_has(X86_FEATURE_HYPERVISOR) ?