The mpic is either the main interrupt controller or sits behind a GIC. But
there is no way that both variants are available on the same system.
Share the cpu hotplug state.
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: Thomas Petazzoni <[email protected]>
Cc: Marc Zyngier <[email protected]>
---
drivers/irqchip/irq-armada-370-xp.c | 2 +-
include/linux/cpuhotplug.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -583,7 +583,7 @@ static int __init armada_370_xp_mpic_of_
#endif
} else {
#ifdef CONFIG_SMP
- cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_CASC_STARTING,
+ cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_XP_STARTING,
"irqchip/armada/cascade:starting",
mpic_cascaded_starting_cpu, NULL);
#endif
--- a/include/linux/cpuhotplug.h
+++ b/include/linux/cpuhotplug.h
@@ -82,7 +82,6 @@ enum cpuhp_state {
CPUHP_AP_IRQ_GIC_STARTING,
CPUHP_AP_IRQ_HIP04_STARTING,
CPUHP_AP_IRQ_ARMADA_XP_STARTING,
- CPUHP_AP_IRQ_ARMADA_CASC_STARTING,
CPUHP_AP_IRQ_BCM2836_STARTING,
CPUHP_AP_ARM_MVEBU_COHERENCY,
CPUHP_AP_PERF_X86_UNCORE_STARTING,
Hello,
On Wed, 21 Dec 2016 20:19:57 +0100, Thomas Gleixner wrote:
> The mpic is either the main interrupt controller or sits behind a GIC. But
> there is no way that both variants are available on the same system.
By "both variants", you mean the MPIC acting as the main interrupt
controller on one side, and the MPIC acting as a "cascaded" controller,
child of the GIC on the other side ?
If that's what you meant, then indeed it's correct.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
On Wed, 21 Dec 2016, Thomas Petazzoni wrote:
> On Wed, 21 Dec 2016 20:19:57 +0100, Thomas Gleixner wrote:
> > The mpic is either the main interrupt controller or sits behind a GIC. But
> > there is no way that both variants are available on the same system.
>
> By "both variants", you mean the MPIC acting as the main interrupt
> controller on one side, and the MPIC acting as a "cascaded" controller,
> child of the GIC on the other side ?
>
> If that's what you meant, then indeed it's correct.
Yes. I'll rephrase that.
Thanks,
tglx
Commit-ID: 504dcba246a5bc451bd7f37d8da3de11310cad71
Gitweb: http://git.kernel.org/tip/504dcba246a5bc451bd7f37d8da3de11310cad71
Author: Thomas Gleixner <[email protected]>
AuthorDate: Wed, 21 Dec 2016 20:19:57 +0100
Committer: Thomas Gleixner <[email protected]>
CommitDate: Thu, 22 Dec 2016 11:37:56 +0100
irqchip/armada-xp: Consolidate hotplug state space
The mpic is either the main interrupt controller or is cascaded behind a
GIC. The mpic is single instance and the modes are mutually exclusive, so
there is no reason to have seperate cpu hotplug states.
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Thomas Petazzoni <[email protected]>
Cc: Sebastian Siewior <[email protected]>
Cc: Marc Zyngier <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Thomas Gleixner <[email protected]>
---
drivers/irqchip/irq-armada-370-xp.c | 2 +-
include/linux/cpuhotplug.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 9d9c2c4..eb0d4d4 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -583,7 +583,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
#endif
} else {
#ifdef CONFIG_SMP
- cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_CASC_STARTING,
+ cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_XP_STARTING,
"irqchip/armada/cascade:starting",
mpic_cascaded_starting_cpu, NULL);
#endif
diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h
index 45c786c..20bfefb 100644
--- a/include/linux/cpuhotplug.h
+++ b/include/linux/cpuhotplug.h
@@ -82,7 +82,6 @@ enum cpuhp_state {
CPUHP_AP_IRQ_GIC_STARTING,
CPUHP_AP_IRQ_HIP04_STARTING,
CPUHP_AP_IRQ_ARMADA_XP_STARTING,
- CPUHP_AP_IRQ_ARMADA_CASC_STARTING,
CPUHP_AP_IRQ_BCM2836_STARTING,
CPUHP_AP_ARM_MVEBU_COHERENCY,
CPUHP_AP_PERF_X86_UNCORE_STARTING,
Commit-ID: 008b69e4d52f2cbee3ed0d0502edd78155000b1a
Gitweb: http://git.kernel.org/tip/008b69e4d52f2cbee3ed0d0502edd78155000b1a
Author: Thomas Gleixner <[email protected]>
AuthorDate: Wed, 21 Dec 2016 20:19:57 +0100
Committer: Thomas Gleixner <[email protected]>
CommitDate: Sun, 25 Dec 2016 10:47:44 +0100
irqchip/armada-xp: Consolidate hotplug state space
The mpic is either the main interrupt controller or is cascaded behind a
GIC. The mpic is single instance and the modes are mutually exclusive, so
there is no reason to have seperate cpu hotplug states.
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Thomas Petazzoni <[email protected]>
Cc: Sebastian Siewior <[email protected]>
Cc: Marc Zyngier <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Thomas Gleixner <[email protected]>
---
drivers/irqchip/irq-armada-370-xp.c | 2 +-
include/linux/cpuhotplug.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 9d9c2c4..eb0d4d4 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -583,7 +583,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
#endif
} else {
#ifdef CONFIG_SMP
- cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_CASC_STARTING,
+ cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_XP_STARTING,
"irqchip/armada/cascade:starting",
mpic_cascaded_starting_cpu, NULL);
#endif
diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h
index 45c786c..20bfefb 100644
--- a/include/linux/cpuhotplug.h
+++ b/include/linux/cpuhotplug.h
@@ -82,7 +82,6 @@ enum cpuhp_state {
CPUHP_AP_IRQ_GIC_STARTING,
CPUHP_AP_IRQ_HIP04_STARTING,
CPUHP_AP_IRQ_ARMADA_XP_STARTING,
- CPUHP_AP_IRQ_ARMADA_CASC_STARTING,
CPUHP_AP_IRQ_BCM2836_STARTING,
CPUHP_AP_ARM_MVEBU_COHERENCY,
CPUHP_AP_PERF_X86_UNCORE_STARTING,