Hello
Since the first 3 patch of v1 was applied, it remains this two patchs for
enabling dwmac-sun8i on A83T
Changes since v1:
- Ordered compatible of syscon
- Renamed pins to emac-rgmii-pins
Corentin Labbe (2):
ARM: sun8i: a83t: Add dt node for the syscon control module
ARM: sun8i: a83t: add dwmac-sun8i ethernet driver
arch/arm/boot/dts/sun8i-a83t.dtsi | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
--
2.13.0
The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
Signed-off-by: Corentin Labbe <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 01a83406f9ae..7d719b4aeaa9 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -200,6 +200,14 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ emac_rgmii_pins: emac-rgmii-pins {
+ pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+ "PD11", "PD12", "PD13", "PD14", "PD18",
+ "PD19", "PD21", "PD22", "PD23";
+ function = "gmac";
+ drive-strength = <40>;
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
@@ -266,6 +274,26 @@
status = "disabled";
};
+ emac: ethernet@1c30000 {
+ compatible = "allwinner,sun8i-a83t-emac";
+ syscon = <&syscon>;
+ reg = <0x01c30000 0x104>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ resets = <&ccu 13>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu 27>;
+ clock-names = "stmmaceth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
gic: interrupt-controller@1c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
--
2.13.0
This patch add the dt node for the syscon register present on the
Allwinner A83T
Signed-off-by: Corentin Labbe <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 49aeb56970ba..01a83406f9ae 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -163,6 +163,12 @@
#size-cells = <1>;
ranges;
+ syscon: syscon@1c00000 {
+ compatible = "allwinner,sun8i-a83t-system-controller",
+ "syscon";
+ reg = <0x01c00000 0x1000>;
+ };
+
dma: dma-controller@1c02000 {
compatible = "allwinner,sun8i-a83t-dma";
reg = <0x01c02000 0x1000>;
--
2.13.0
On Wed, Jun 07, 2017 at 07:33:44PM +0200, Corentin Labbe wrote:
> This patch add the dt node for the syscon register present on the
> Allwinner A83T
>
> Signed-off-by: Corentin Labbe <[email protected]>
> Reviewed-by: Chen-Yu Tsai <[email protected]>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
On Wed, Jun 07, 2017 at 07:33:45PM +0200, Corentin Labbe wrote:
> The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
> This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
>
> Signed-off-by: Corentin Labbe <[email protected]>
> Reviewed-by: Chen-Yu Tsai <[email protected]>
> ---
> arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index 01a83406f9ae..7d719b4aeaa9 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -200,6 +200,14 @@
> #interrupt-cells = <3>;
> #gpio-cells = <3>;
>
> + emac_rgmii_pins: emac-rgmii-pins {
> + pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
> + "PD11", "PD12", "PD13", "PD14", "PD18",
> + "PD19", "PD21", "PD22", "PD23";
> + function = "gmac";
> + drive-strength = <40>;
> + };
> +
This is not used anywhere.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
On Thu, Jun 08, 2017 at 10:34:28AM +0200, Maxime Ripard wrote:
> On Wed, Jun 07, 2017 at 07:33:45PM +0200, Corentin Labbe wrote:
> > The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
> > This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
> >
> > Signed-off-by: Corentin Labbe <[email protected]>
> > Reviewed-by: Chen-Yu Tsai <[email protected]>
> > ---
> > arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
> > 1 file changed, 28 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > index 01a83406f9ae..7d719b4aeaa9 100644
> > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > @@ -200,6 +200,14 @@
> > #interrupt-cells = <3>;
> > #gpio-cells = <3>;
> >
> > + emac_rgmii_pins: emac-rgmii-pins {
> > + pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
> > + "PD11", "PD12", "PD13", "PD14", "PD18",
> > + "PD19", "PD21", "PD22", "PD23";
> > + function = "gmac";
> > + drive-strength = <40>;
> > + };
> > +
>
> This is not used anywhere.
>
But will be used by bpim3 board
On Thu, Jun 08, 2017 at 10:42:22AM +0200, Corentin Labbe wrote:
> On Thu, Jun 08, 2017 at 10:34:28AM +0200, Maxime Ripard wrote:
> > On Wed, Jun 07, 2017 at 07:33:45PM +0200, Corentin Labbe wrote:
> > > The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
> > > This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
> > >
> > > Signed-off-by: Corentin Labbe <[email protected]>
> > > Reviewed-by: Chen-Yu Tsai <[email protected]>
> > > ---
> > > arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
> > > 1 file changed, 28 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > > index 01a83406f9ae..7d719b4aeaa9 100644
> > > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> > > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > > @@ -200,6 +200,14 @@
> > > #interrupt-cells = <3>;
> > > #gpio-cells = <3>;
> > >
> > > + emac_rgmii_pins: emac-rgmii-pins {
> > > + pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
> > > + "PD11", "PD12", "PD13", "PD14", "PD18",
> > > + "PD19", "PD21", "PD22", "PD23";
> > > + function = "gmac";
> > > + drive-strength = <40>;
> > > + };
> > > +
> >
> > This is not used anywhere.
> >
> But will be used by bpim3 board
Then will add it when we'll add support for that board, until then,
it's dead code.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
On Thu, Jun 8, 2017 at 8:48 PM, Maxime Ripard
<[email protected]> wrote:
> On Thu, Jun 08, 2017 at 10:42:22AM +0200, Corentin Labbe wrote:
>> On Thu, Jun 08, 2017 at 10:34:28AM +0200, Maxime Ripard wrote:
>> > On Wed, Jun 07, 2017 at 07:33:45PM +0200, Corentin Labbe wrote:
>> > > The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
>> > > This patch enable the dwmac-sun8i on the Allwinner a83t SoC Device-tree.
>> > >
>> > > Signed-off-by: Corentin Labbe <[email protected]>
>> > > Reviewed-by: Chen-Yu Tsai <[email protected]>
>> > > ---
>> > > arch/arm/boot/dts/sun8i-a83t.dtsi | 28 ++++++++++++++++++++++++++++
>> > > 1 file changed, 28 insertions(+)
>> > >
>> > > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> > > index 01a83406f9ae..7d719b4aeaa9 100644
>> > > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
>> > > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
>> > > @@ -200,6 +200,14 @@
>> > > #interrupt-cells = <3>;
>> > > #gpio-cells = <3>;
>> > >
>> > > + emac_rgmii_pins: emac-rgmii-pins {
>> > > + pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
>> > > + "PD11", "PD12", "PD13", "PD14", "PD18",
>> > > + "PD19", "PD21", "PD22", "PD23";
>> > > + function = "gmac";
>> > > + drive-strength = <40>;
>> > > + };
>> > > +
>> >
>> > This is not used anywhere.
>> >
>> But will be used by bpim3 board
>
> Then will add it when we'll add support for that board, until then,
> it's dead code.
I'll include this in my A83T work branch and resend it when I get around to it.
Thanks
ChenYu