This patchset adds more device nodes for hi3660 and hikey960, including:
- cpu idle states
- L2 cache
- PMU
- OP-TEE
- reboot
- pstore
Patch 7 fixes an issue in mmc nodes, by adding 'reset'
HiKey960 is one of 96boards. For details information about it, please
refer to [1].
[1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960
Guodong Xu (3):
arm64: dts: hikey960: Add support for syscon-reboot-mode
arm64: dts: hikey960: Add pstore support
arm64: dts: hi3660: Reset the mmc hosts
Leo Yan (2):
arm64: dts: hi3660: enable idle states
arm64: dts: hi3660: add L2 cache topology
Victor Chong (1):
arm64: dts: hikey960: Add optee node
YiPing Xu (1):
arm64: dts: hi3660: add pmu dt node for hi3660
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 35 ++++++++
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 101 ++++++++++++++++++++++
2 files changed, 136 insertions(+)
--
2.10.2
From: Leo Yan <[email protected]>
On Hi3660 there have two clusters, one is CA53 cluster and another is
CA73 cluster. This two clusters have different idle states separately.
With Daniel Lezcano's patch (ARM: cpuidle: Support asymmetric idle
definition), now ARM idle driver can support different clusters with
different idle states.
Base on this, this patch is to bind two clusters idle states on Hi3660.
Except the "WFI" states are enabled by default for all CPUs, this patch
also binds below extra idle states:
- CA53 CPUs have two more states:
CPU_SLEEP: CPU power off state
CLUSTER_SLEEP_0: Cluster power off state
- CA73 CPUs have three more states:
CPU_NAP: CPU retention state
CPU_SLEEP: CPU power off state
CLUSTER_SLEEP_1: Cluster power off state
Cc: Daniel Lezcano <[email protected]>
Cc: Kevin Wang <[email protected]>
Signed-off-by: Leo Yan <[email protected]>
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 63 +++++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index c6a1961..8921310 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -58,6 +58,7 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu1: cpu@1 {
@@ -65,6 +66,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu2: cpu@2 {
@@ -72,6 +74,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu3: cpu@3 {
@@ -79,6 +82,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
cpu4: cpu@100 {
@@ -86,6 +90,11 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu5: cpu@101 {
@@ -93,6 +102,11 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu6: cpu@102 {
@@ -100,6 +114,11 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
};
cpu7: cpu@103 {
@@ -107,6 +126,50 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ cpu-idle-states = <
+ &CPU_NAP
+ &CPU_SLEEP
+ &CLUSTER_SLEEP_1
+ >;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_NAP: cpu-nap {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0000001>;
+ entry-latency-us = <7>;
+ exit-latency-us = <2>;
+ min-residency-us = <15>;
+ };
+
+ CPU_SLEEP: cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x0010000>;
+ entry-latency-us = <40>;
+ exit-latency-us = <70>;
+ min-residency-us = <3000>;
+ };
+
+ CLUSTER_SLEEP_0: cluster-sleep-0 {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <500>;
+ exit-latency-us = <5000>;
+ min-residency-us = <20000>;
+ };
+
+ CLUSTER_SLEEP_1: cluster-sleep-1 {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <1000>;
+ exit-latency-us = <5000>;
+ min-residency-us = <20000>;
+ };
};
};
--
2.10.2
From: YiPing Xu <[email protected]>
Add pmu dt node for hi3660
Signed-off-by: YiPing Xu <[email protected]>
Signed-off-by: Zhong Kaihua <[email protected]>
Signed-off-by: Leo Yan <[email protected]>
Tested-by: Jumana Mundichipparakkal <[email protected]>
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 1cdd03b..5fd5686 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -202,6 +202,26 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>,
+ <&cpu1>,
+ <&cpu2>,
+ <&cpu3>,
+ <&cpu4>,
+ <&cpu5>,
+ <&cpu6>,
+ <&cpu7>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
--
2.10.2
From: Victor Chong <[email protected]>
This patch adds op-tee node for hikey960
Signed-off-by: Victor Chong <[email protected]>
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 6609b0f..b96d865 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -159,6 +159,13 @@
startup-delay-us = <70000>;
enable-active-high;
};
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
};
&i2c0 {
--
2.10.2
Add support to hikey960 dts for the syscon-reboot-mode driver.
Cc: John Stultz <[email protected]>
Signed-off-by: Guodong Xu <[email protected]>
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index b96d865..ce5e874 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -39,6 +39,20 @@
reg = <0x0 0x0 0x0 0x0>;
};
+ reboot-mode-syscon@32100000 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x32100000 0x0 0x00001000>;
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x0>;
+
+ mode-normal = <0x77665501>;
+ mode-bootloader = <0x77665500>;
+ mode-recovery = <0x77665502>;
+ };
+ };
+
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
--
2.10.2
Add reset-names = "reset" into mmc nodes.
Signed-off-by: Guodong Xu <[email protected]>
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 5fd5686..41841f7 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -909,6 +909,7 @@
clock-names = "ciu", "biu";
clock-frequency = <3200000>;
resets = <&crg_rst 0x94 18>;
+ reset-names = "reset";
cd-gpios = <&gpio25 3 0>;
hisilicon,peripheral-syscon = <&sctrl>;
pinctrl-names = "default";
@@ -938,6 +939,7 @@
<&crg_ctrl HI3660_HCLK_GATE_SDIO0>;
clock-names = "ciu", "biu";
resets = <&crg_rst 0x94 20>;
+ reset-names = "reset";
card-detect-delay = <200>;
supports-highspeed;
keep-power-in-suspend;
--
2.10.2
This patch reserves some memory in the DTS and sets up a
pstore device tree node to enable pstore support on HiKey960.
Cc: John Stultz <[email protected]>
Signed-off-by: Guodong Xu <[email protected]>
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index ce5e874..7770ec7 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -39,6 +39,20 @@
reg = <0x0 0x0 0x0 0x0>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ramoops@32000000 {
+ compatible = "ramoops";
+ reg = <0x0 0x32000000 0x0 0x00100000>;
+ record-size = <0x00020000>;
+ console-size = <0x00020000>;
+ ftrace-size = <0x00020000>;
+ };
+ };
+
reboot-mode-syscon@32100000 {
compatible = "syscon", "simple-mfd";
reg = <0x0 0x32100000 0x0 0x00001000>;
--
2.10.2
From: Leo Yan <[email protected]>
This patch adds the L2 cache topology on 96boards Hikey960.
Signed-off-by: Leo Yan <[email protected]>
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8921310..1cdd03b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -58,6 +58,7 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -66,6 +67,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -74,6 +76,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -82,6 +85,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+ next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_0>;
};
@@ -90,6 +94,7 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -102,6 +107,7 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -114,6 +120,7 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -126,6 +133,7 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+ next-level-cache = <&A73_L2>;
cpu-idle-states = <
&CPU_NAP
&CPU_SLEEP
@@ -171,6 +179,14 @@
min-residency-us = <20000>;
};
};
+
+ A53_L2: l2-cache0 {
+ compatible = "cache";
+ };
+
+ A73_L2: l2-cache1 {
+ compatible = "cache";
+ };
};
gic: interrupt-controller@e82b0000 {
--
2.10.2